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authorJames Bottomley <jejb@parisc-linux.org>2006-08-23 12:00:04 -0400
committerMatthew Wilcox <willy@parisc-linux.org>2006-10-04 08:46:21 -0400
commit20f4d3cb9b94ce3fec9a6135b9ad075b82b24f41 (patch)
tree995dec90d251e8e57abca8fea552d8ae5314a493 /arch/parisc
parente45da35e180a4fc91307648d021a598495742c32 (diff)
[PARISC] parisc specific kmap API implementation for pa8800
This patch fixes the pa8800 at a gross level (there are still other subtle incoherency issues which can still cause crashes and HPMCs). What it does is try to force eject inequivalent aliases before they become visible to the L2 cache (which is where we get the incoherence problems). A new function (parisc_requires_coherency) is introduced in asm/processor.h to identify the pa8x00 processors (8800 and 8900) which have the issue. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'arch/parisc')
-rw-r--r--arch/parisc/kernel/cache.c45
1 files changed, 44 insertions, 1 deletions
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index bc7c4a4e26a1..7e8d697aef36 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -91,7 +91,8 @@ update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
91 91
92 flush_kernel_dcache_page(page); 92 flush_kernel_dcache_page(page);
93 clear_bit(PG_dcache_dirty, &page->flags); 93 clear_bit(PG_dcache_dirty, &page->flags);
94 } 94 } else if (parisc_requires_coherency())
95 flush_kernel_dcache_page(page);
95} 96}
96 97
97void 98void
@@ -370,3 +371,45 @@ void parisc_setup_cache_timing(void)
370 371
371 printk(KERN_INFO "Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus()); 372 printk(KERN_INFO "Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus());
372} 373}
374
375extern void purge_kernel_dcache_page(unsigned long);
376extern void clear_user_page_asm(void *page, unsigned long vaddr);
377
378void
379clear_user_page(void *page, unsigned long vaddr, struct page *pg)
380{
381 purge_kernel_dcache_page((unsigned long)page);
382 purge_tlb_start();
383 pdtlb_kernel(page);
384 purge_tlb_end();
385 clear_user_page_asm(page, vaddr);
386}
387
388void flush_kernel_dcache_page_addr(void *addr)
389{
390 flush_kernel_dcache_page_asm(addr);
391 purge_tlb_start();
392 pdtlb_kernel(addr);
393 purge_tlb_end();
394}
395EXPORT_SYMBOL(flush_kernel_dcache_page_addr);
396
397void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
398 struct page *pg)
399{
400 /* no coherency needed (all in kmap/kunmap) */
401 copy_user_page_asm(vto, vfrom);
402 if (!parisc_requires_coherency())
403 flush_kernel_dcache_page_asm(vto);
404}
405EXPORT_SYMBOL(copy_user_page);
406
407#ifdef CONFIG_PA8X00
408
409void kunmap_parisc(void *addr)
410{
411 if (parisc_requires_coherency())
412 flush_kernel_dcache_page_addr(addr);
413}
414EXPORT_SYMBOL(kunmap_parisc);
415#endif