diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2009-12-02 13:49:50 -0500 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2009-12-14 17:55:32 -0500 |
commit | 445c89514be242b1b0080056d50bdc1b72adeb5c (patch) | |
tree | 96ed062794ad0fb6a649713c83f009eea382e8b2 /arch/parisc | |
parent | 6b6b4792f89346e47437682c7ba3438e6681c0f9 (diff) |
locking: Convert raw_spinlock to arch_spinlock
The raw_spin* namespace was taken by lockdep for the architecture
specific implementations. raw_spin_* would be the ideal name space for
the spinlocks which are not converted to sleeping locks in preempt-rt.
Linus suggested to convert the raw_ to arch_ locks and cleanup the
name space instead of using an artifical name like core_spin,
atomic_spin or whatever
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Ingo Molnar <mingo@elte.hu>
Cc: linux-arch@vger.kernel.org
Diffstat (limited to 'arch/parisc')
-rw-r--r-- | arch/parisc/include/asm/atomic.h | 6 | ||||
-rw-r--r-- | arch/parisc/include/asm/spinlock.h | 8 | ||||
-rw-r--r-- | arch/parisc/include/asm/spinlock_types.h | 4 | ||||
-rw-r--r-- | arch/parisc/lib/bitops.c | 2 |
4 files changed, 10 insertions, 10 deletions
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h index 8bc9e96699b2..3a4ea778d4b6 100644 --- a/arch/parisc/include/asm/atomic.h +++ b/arch/parisc/include/asm/atomic.h | |||
@@ -27,18 +27,18 @@ | |||
27 | # define ATOMIC_HASH_SIZE 4 | 27 | # define ATOMIC_HASH_SIZE 4 |
28 | # define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) (a))/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ])) | 28 | # define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) (a))/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ])) |
29 | 29 | ||
30 | extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned; | 30 | extern arch_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned; |
31 | 31 | ||
32 | /* Can't use raw_spin_lock_irq because of #include problems, so | 32 | /* Can't use raw_spin_lock_irq because of #include problems, so |
33 | * this is the substitute */ | 33 | * this is the substitute */ |
34 | #define _atomic_spin_lock_irqsave(l,f) do { \ | 34 | #define _atomic_spin_lock_irqsave(l,f) do { \ |
35 | raw_spinlock_t *s = ATOMIC_HASH(l); \ | 35 | arch_spinlock_t *s = ATOMIC_HASH(l); \ |
36 | local_irq_save(f); \ | 36 | local_irq_save(f); \ |
37 | __raw_spin_lock(s); \ | 37 | __raw_spin_lock(s); \ |
38 | } while(0) | 38 | } while(0) |
39 | 39 | ||
40 | #define _atomic_spin_unlock_irqrestore(l,f) do { \ | 40 | #define _atomic_spin_unlock_irqrestore(l,f) do { \ |
41 | raw_spinlock_t *s = ATOMIC_HASH(l); \ | 41 | arch_spinlock_t *s = ATOMIC_HASH(l); \ |
42 | __raw_spin_unlock(s); \ | 42 | __raw_spin_unlock(s); \ |
43 | local_irq_restore(f); \ | 43 | local_irq_restore(f); \ |
44 | } while(0) | 44 | } while(0) |
diff --git a/arch/parisc/include/asm/spinlock.h b/arch/parisc/include/asm/spinlock.h index fae03e136fa8..69e8dca26744 100644 --- a/arch/parisc/include/asm/spinlock.h +++ b/arch/parisc/include/asm/spinlock.h | |||
@@ -5,7 +5,7 @@ | |||
5 | #include <asm/processor.h> | 5 | #include <asm/processor.h> |
6 | #include <asm/spinlock_types.h> | 6 | #include <asm/spinlock_types.h> |
7 | 7 | ||
8 | static inline int __raw_spin_is_locked(raw_spinlock_t *x) | 8 | static inline int __raw_spin_is_locked(arch_spinlock_t *x) |
9 | { | 9 | { |
10 | volatile unsigned int *a = __ldcw_align(x); | 10 | volatile unsigned int *a = __ldcw_align(x); |
11 | return *a == 0; | 11 | return *a == 0; |
@@ -15,7 +15,7 @@ static inline int __raw_spin_is_locked(raw_spinlock_t *x) | |||
15 | #define __raw_spin_unlock_wait(x) \ | 15 | #define __raw_spin_unlock_wait(x) \ |
16 | do { cpu_relax(); } while (__raw_spin_is_locked(x)) | 16 | do { cpu_relax(); } while (__raw_spin_is_locked(x)) |
17 | 17 | ||
18 | static inline void __raw_spin_lock_flags(raw_spinlock_t *x, | 18 | static inline void __raw_spin_lock_flags(arch_spinlock_t *x, |
19 | unsigned long flags) | 19 | unsigned long flags) |
20 | { | 20 | { |
21 | volatile unsigned int *a; | 21 | volatile unsigned int *a; |
@@ -33,7 +33,7 @@ static inline void __raw_spin_lock_flags(raw_spinlock_t *x, | |||
33 | mb(); | 33 | mb(); |
34 | } | 34 | } |
35 | 35 | ||
36 | static inline void __raw_spin_unlock(raw_spinlock_t *x) | 36 | static inline void __raw_spin_unlock(arch_spinlock_t *x) |
37 | { | 37 | { |
38 | volatile unsigned int *a; | 38 | volatile unsigned int *a; |
39 | mb(); | 39 | mb(); |
@@ -42,7 +42,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *x) | |||
42 | mb(); | 42 | mb(); |
43 | } | 43 | } |
44 | 44 | ||
45 | static inline int __raw_spin_trylock(raw_spinlock_t *x) | 45 | static inline int __raw_spin_trylock(arch_spinlock_t *x) |
46 | { | 46 | { |
47 | volatile unsigned int *a; | 47 | volatile unsigned int *a; |
48 | int ret; | 48 | int ret; |
diff --git a/arch/parisc/include/asm/spinlock_types.h b/arch/parisc/include/asm/spinlock_types.h index 3f72f47cf4b2..735caafb81f5 100644 --- a/arch/parisc/include/asm/spinlock_types.h +++ b/arch/parisc/include/asm/spinlock_types.h | |||
@@ -9,10 +9,10 @@ typedef struct { | |||
9 | volatile unsigned int lock[4]; | 9 | volatile unsigned int lock[4]; |
10 | # define __RAW_SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 } } | 10 | # define __RAW_SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 } } |
11 | #endif | 11 | #endif |
12 | } raw_spinlock_t; | 12 | } arch_spinlock_t; |
13 | 13 | ||
14 | typedef struct { | 14 | typedef struct { |
15 | raw_spinlock_t lock; | 15 | arch_spinlock_t lock; |
16 | volatile int counter; | 16 | volatile int counter; |
17 | } raw_rwlock_t; | 17 | } raw_rwlock_t; |
18 | 18 | ||
diff --git a/arch/parisc/lib/bitops.c b/arch/parisc/lib/bitops.c index e3eb739fab19..fdd7f583de54 100644 --- a/arch/parisc/lib/bitops.c +++ b/arch/parisc/lib/bitops.c | |||
@@ -12,7 +12,7 @@ | |||
12 | #include <asm/atomic.h> | 12 | #include <asm/atomic.h> |
13 | 13 | ||
14 | #ifdef CONFIG_SMP | 14 | #ifdef CONFIG_SMP |
15 | raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned = { | 15 | arch_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned = { |
16 | [0 ... (ATOMIC_HASH_SIZE-1)] = __RAW_SPIN_LOCK_UNLOCKED | 16 | [0 ... (ATOMIC_HASH_SIZE-1)] = __RAW_SPIN_LOCK_UNLOCKED |
17 | }; | 17 | }; |
18 | #endif | 18 | #endif |