aboutsummaryrefslogtreecommitdiffstats
path: root/arch/parisc
diff options
context:
space:
mode:
authorRussell King <rmk+kernel@arm.linux.org.uk>2009-12-18 11:40:18 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-02-20 11:41:46 -0500
commit4b3073e1c53a256275f1079c0fbfbe85883d9275 (patch)
treea0fa98cb75edbbc58c43bbe38ac4c6da0913ae6d /arch/parisc
parented42acaef1a9d51631a31b55e9ed52d400430492 (diff)
MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself
On VIVT ARM, when we have multiple shared mappings of the same file in the same MM, we need to ensure that we have coherency across all copies. We do this via make_coherent() by making the pages uncacheable. This used to work fine, until we allowed highmem with highpte - we now have a page table which is mapped as required, and is not available for modification via update_mmu_cache(). Ralf Beache suggested getting rid of the PTE value passed to update_mmu_cache(): On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables to construct a pointer to the pte again. Passing a pte_t * is much more elegant. Maybe we might even replace the pte argument with the pte_t? Ben Herrenschmidt would also like the pte pointer for PowerPC: Passing the ptep in there is exactly what I want. I want that -instead- of the PTE value, because I have issue on some ppc cases, for I$/D$ coherency, where set_pte_at() may decide to mask out the _PAGE_EXEC. So, pass in the mapped page table pointer into update_mmu_cache(), and remove the PTE value, updating all implementations and call sites to suit. Includes a fix from Stephen Rothwell: sparc: fix fallout from update_mmu_cache API change Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/parisc')
-rw-r--r--arch/parisc/include/asm/pgtable.h2
-rw-r--r--arch/parisc/kernel/cache.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index a27d2e200fb2..01c15035e783 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -410,7 +410,7 @@ extern void paging_init (void);
410 410
411#define PG_dcache_dirty PG_arch_1 411#define PG_dcache_dirty PG_arch_1
412 412
413extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); 413extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
414 414
415/* Encode and de-code a swap entry */ 415/* Encode and de-code a swap entry */
416 416
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index b6ed34de14e1..1054baa2fc69 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -68,9 +68,9 @@ flush_cache_all_local(void)
68EXPORT_SYMBOL(flush_cache_all_local); 68EXPORT_SYMBOL(flush_cache_all_local);
69 69
70void 70void
71update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) 71update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
72{ 72{
73 struct page *page = pte_page(pte); 73 struct page *page = pte_page(*ptep);
74 74
75 if (pfn_valid(page_to_pfn(page)) && page_mapping(page) && 75 if (pfn_valid(page_to_pfn(page)) && page_mapping(page) &&
76 test_bit(PG_dcache_dirty, &page->flags)) { 76 test_bit(PG_dcache_dirty, &page->flags)) {