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authorLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-30 21:57:33 -0400
committerLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-31 10:26:23 -0400
commit25985edcedea6396277003854657b5f3cb31a628 (patch)
treef026e810210a2ee7290caeb737c23cb6472b7c38 /arch/parisc
parent6aba74f2791287ec407e0f92487a725a25908067 (diff)
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'arch/parisc')
-rw-r--r--arch/parisc/include/asm/eisa_eeprom.h2
-rw-r--r--arch/parisc/kernel/entry.S10
-rw-r--r--arch/parisc/kernel/head.S2
-rw-r--r--arch/parisc/kernel/inventory.c2
-rw-r--r--arch/parisc/kernel/signal.c2
-rw-r--r--arch/parisc/kernel/syscall.S2
-rw-r--r--arch/parisc/kernel/syscall_table.S2
-rw-r--r--arch/parisc/math-emu/dfadd.c2
-rw-r--r--arch/parisc/math-emu/dfsub.c2
-rw-r--r--arch/parisc/math-emu/fmpyfadd.c8
-rw-r--r--arch/parisc/math-emu/sfadd.c2
-rw-r--r--arch/parisc/math-emu/sfsub.c2
12 files changed, 19 insertions, 19 deletions
diff --git a/arch/parisc/include/asm/eisa_eeprom.h b/arch/parisc/include/asm/eisa_eeprom.h
index 9c9da980402a..8ce8b85ca588 100644
--- a/arch/parisc/include/asm/eisa_eeprom.h
+++ b/arch/parisc/include/asm/eisa_eeprom.h
@@ -27,7 +27,7 @@ struct eeprom_header
27 u_int8_t ver_maj; 27 u_int8_t ver_maj;
28 u_int8_t ver_min; 28 u_int8_t ver_min;
29 u_int8_t num_slots; /* number of EISA slots in system */ 29 u_int8_t num_slots; /* number of EISA slots in system */
30 u_int16_t csum; /* checksum, I don't know how to calulate this */ 30 u_int16_t csum; /* checksum, I don't know how to calculate this */
31 u_int8_t pad[10]; 31 u_int8_t pad[10];
32} __attribute__ ((packed)); 32} __attribute__ ((packed));
33 33
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index e5477092a5d4..ead8d2a1034c 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -187,8 +187,8 @@
187 187
188 /* Register definitions for tlb miss handler macros */ 188 /* Register definitions for tlb miss handler macros */
189 189
190 va = r8 /* virtual address for which the trap occured */ 190 va = r8 /* virtual address for which the trap occurred */
191 spc = r24 /* space for which the trap occured */ 191 spc = r24 /* space for which the trap occurred */
192 192
193#ifndef CONFIG_64BIT 193#ifndef CONFIG_64BIT
194 194
@@ -882,7 +882,7 @@ ENTRY(syscall_exit_rfi)
882 * (we don't store them in the sigcontext), so set them 882 * (we don't store them in the sigcontext), so set them
883 * to "proper" values now (otherwise we'll wind up restoring 883 * to "proper" values now (otherwise we'll wind up restoring
884 * whatever was last stored in the task structure, which might 884 * whatever was last stored in the task structure, which might
885 * be inconsistent if an interrupt occured while on the gateway 885 * be inconsistent if an interrupt occurred while on the gateway
886 * page). Note that we may be "trashing" values the user put in 886 * page). Note that we may be "trashing" values the user put in
887 * them, but we don't support the user changing them. 887 * them, but we don't support the user changing them.
888 */ 888 */
@@ -1156,11 +1156,11 @@ ENDPROC(intr_save)
1156 */ 1156 */
1157 1157
1158 t0 = r1 /* temporary register 0 */ 1158 t0 = r1 /* temporary register 0 */
1159 va = r8 /* virtual address for which the trap occured */ 1159 va = r8 /* virtual address for which the trap occurred */
1160 t1 = r9 /* temporary register 1 */ 1160 t1 = r9 /* temporary register 1 */
1161 pte = r16 /* pte/phys page # */ 1161 pte = r16 /* pte/phys page # */
1162 prot = r17 /* prot bits */ 1162 prot = r17 /* prot bits */
1163 spc = r24 /* space for which the trap occured */ 1163 spc = r24 /* space for which the trap occurred */
1164 ptp = r25 /* page directory/page table pointer */ 1164 ptp = r25 /* page directory/page table pointer */
1165 1165
1166#ifdef CONFIG_64BIT 1166#ifdef CONFIG_64BIT
diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S
index 4dbdf0ed6fa0..145c5e4caaa0 100644
--- a/arch/parisc/kernel/head.S
+++ b/arch/parisc/kernel/head.S
@@ -131,7 +131,7 @@ $pgt_fill_loop:
131 ldo THREAD_SZ_ALGN(%r6),%sp 131 ldo THREAD_SZ_ALGN(%r6),%sp
132 132
133#ifdef CONFIG_SMP 133#ifdef CONFIG_SMP
134 /* Set the smp rendevous address into page zero. 134 /* Set the smp rendezvous address into page zero.
135 ** It would be safer to do this in init_smp_config() but 135 ** It would be safer to do this in init_smp_config() but
136 ** it's just way easier to deal with here because 136 ** it's just way easier to deal with here because
137 ** of 64-bit function ptrs and the address is local to this file. 137 ** of 64-bit function ptrs and the address is local to this file.
diff --git a/arch/parisc/kernel/inventory.c b/arch/parisc/kernel/inventory.c
index d228d8237879..08324aac3544 100644
--- a/arch/parisc/kernel/inventory.c
+++ b/arch/parisc/kernel/inventory.c
@@ -93,7 +93,7 @@ void __init setup_pdc(void)
93 case 0x6: /* 705, 710 */ 93 case 0x6: /* 705, 710 */
94 case 0x7: /* 715, 725 */ 94 case 0x7: /* 715, 725 */
95 case 0x8: /* 745, 747, 742 */ 95 case 0x8: /* 745, 747, 742 */
96 case 0xA: /* 712 and similiar */ 96 case 0xA: /* 712 and similar */
97 case 0xC: /* 715/64, at least */ 97 case 0xC: /* 715/64, at least */
98 98
99 pdc_type = PDC_TYPE_SNAKE; 99 pdc_type = PDC_TYPE_SNAKE;
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index 609a331878e7..12c1ed33dc18 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -291,7 +291,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
291 DBG(1,"setup_rt_frame: frame->uc = 0x%p\n", &frame->uc); 291 DBG(1,"setup_rt_frame: frame->uc = 0x%p\n", &frame->uc);
292 DBG(1,"setup_rt_frame: frame->uc.uc_mcontext = 0x%p\n", &frame->uc.uc_mcontext); 292 DBG(1,"setup_rt_frame: frame->uc.uc_mcontext = 0x%p\n", &frame->uc.uc_mcontext);
293 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, in_syscall); 293 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, in_syscall);
294 /* FIXME: Should probably be converted aswell for the compat case */ 294 /* FIXME: Should probably be converted as well for the compat case */
295 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); 295 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
296 } 296 }
297 297
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index 68e75ce838d6..82a52b2fb13f 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -605,7 +605,7 @@ cas_action:
605 copy %r0, %r21 605 copy %r0, %r21
606 606
6073: 6073:
608 /* Error occured on load or store */ 608 /* Error occurred on load or store */
609 /* Free lock */ 609 /* Free lock */
610 stw %r20, 0(%sr2,%r20) 610 stw %r20, 0(%sr2,%r20)
611#if ENABLE_LWS_DEBUG 611#if ENABLE_LWS_DEBUG
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 74867dfdabe5..4be85ee10b85 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -34,7 +34,7 @@
34/* Use ENTRY_SAME for 32-bit syscalls which are the same on wide and 34/* Use ENTRY_SAME for 32-bit syscalls which are the same on wide and
35 * narrow palinux. Use ENTRY_DIFF for those where a 32-bit specific 35 * narrow palinux. Use ENTRY_DIFF for those where a 32-bit specific
36 * implementation is required on wide palinux. Use ENTRY_COMP where 36 * implementation is required on wide palinux. Use ENTRY_COMP where
37 * the compatability layer has a useful 32-bit implementation. 37 * the compatibility layer has a useful 32-bit implementation.
38 */ 38 */
39#define ENTRY_SAME(_name_) .dword sys_##_name_ 39#define ENTRY_SAME(_name_) .dword sys_##_name_
40#define ENTRY_DIFF(_name_) .dword sys32_##_name_ 40#define ENTRY_DIFF(_name_) .dword sys32_##_name_
diff --git a/arch/parisc/math-emu/dfadd.c b/arch/parisc/math-emu/dfadd.c
index e147d7d3b0f4..d37e2d2cb6fe 100644
--- a/arch/parisc/math-emu/dfadd.c
+++ b/arch/parisc/math-emu/dfadd.c
@@ -303,7 +303,7 @@ dbl_fadd(
303 if(Dbl_iszero_hidden(resultp1)) 303 if(Dbl_iszero_hidden(resultp1))
304 { 304 {
305 /* Handle normalization */ 305 /* Handle normalization */
306 /* A straight foward algorithm would now shift the result 306 /* A straight forward algorithm would now shift the result
307 * and extension left until the hidden bit becomes one. Not 307 * and extension left until the hidden bit becomes one. Not
308 * all of the extension bits need participate in the shift. 308 * all of the extension bits need participate in the shift.
309 * Only the two most significant bits (round and guard) are 309 * Only the two most significant bits (round and guard) are
diff --git a/arch/parisc/math-emu/dfsub.c b/arch/parisc/math-emu/dfsub.c
index 87ebc60d465b..2e8b5a79bff7 100644
--- a/arch/parisc/math-emu/dfsub.c
+++ b/arch/parisc/math-emu/dfsub.c
@@ -306,7 +306,7 @@ dbl_fsub(
306 if(Dbl_iszero_hidden(resultp1)) 306 if(Dbl_iszero_hidden(resultp1))
307 { 307 {
308 /* Handle normalization */ 308 /* Handle normalization */
309 /* A straight foward algorithm would now shift the result 309 /* A straight forward algorithm would now shift the result
310 * and extension left until the hidden bit becomes one. Not 310 * and extension left until the hidden bit becomes one. Not
311 * all of the extension bits need participate in the shift. 311 * all of the extension bits need participate in the shift.
312 * Only the two most significant bits (round and guard) are 312 * Only the two most significant bits (round and guard) are
diff --git a/arch/parisc/math-emu/fmpyfadd.c b/arch/parisc/math-emu/fmpyfadd.c
index 5dd7f93a89be..b067c45c872d 100644
--- a/arch/parisc/math-emu/fmpyfadd.c
+++ b/arch/parisc/math-emu/fmpyfadd.c
@@ -531,7 +531,7 @@ dbl_fmpyfadd(
531 sign_save = Dbl_signextendedsign(resultp1); 531 sign_save = Dbl_signextendedsign(resultp1);
532 if (Dbl_iszero_hidden(resultp1)) { 532 if (Dbl_iszero_hidden(resultp1)) {
533 /* Handle normalization */ 533 /* Handle normalization */
534 /* A straight foward algorithm would now shift the 534 /* A straightforward algorithm would now shift the
535 * result and extension left until the hidden bit 535 * result and extension left until the hidden bit
536 * becomes one. Not all of the extension bits need 536 * becomes one. Not all of the extension bits need
537 * participate in the shift. Only the two most 537 * participate in the shift. Only the two most
@@ -1191,7 +1191,7 @@ unsigned int *status;
1191 sign_save = Dbl_signextendedsign(resultp1); 1191 sign_save = Dbl_signextendedsign(resultp1);
1192 if (Dbl_iszero_hidden(resultp1)) { 1192 if (Dbl_iszero_hidden(resultp1)) {
1193 /* Handle normalization */ 1193 /* Handle normalization */
1194 /* A straight foward algorithm would now shift the 1194 /* A straightforward algorithm would now shift the
1195 * result and extension left until the hidden bit 1195 * result and extension left until the hidden bit
1196 * becomes one. Not all of the extension bits need 1196 * becomes one. Not all of the extension bits need
1197 * participate in the shift. Only the two most 1197 * participate in the shift. Only the two most
@@ -1841,7 +1841,7 @@ unsigned int *status;
1841 sign_save = Sgl_signextendedsign(resultp1); 1841 sign_save = Sgl_signextendedsign(resultp1);
1842 if (Sgl_iszero_hidden(resultp1)) { 1842 if (Sgl_iszero_hidden(resultp1)) {
1843 /* Handle normalization */ 1843 /* Handle normalization */
1844 /* A straight foward algorithm would now shift the 1844 /* A straightforward algorithm would now shift the
1845 * result and extension left until the hidden bit 1845 * result and extension left until the hidden bit
1846 * becomes one. Not all of the extension bits need 1846 * becomes one. Not all of the extension bits need
1847 * participate in the shift. Only the two most 1847 * participate in the shift. Only the two most
@@ -2483,7 +2483,7 @@ unsigned int *status;
2483 sign_save = Sgl_signextendedsign(resultp1); 2483 sign_save = Sgl_signextendedsign(resultp1);
2484 if (Sgl_iszero_hidden(resultp1)) { 2484 if (Sgl_iszero_hidden(resultp1)) {
2485 /* Handle normalization */ 2485 /* Handle normalization */
2486 /* A straight foward algorithm would now shift the 2486 /* A straightforward algorithm would now shift the
2487 * result and extension left until the hidden bit 2487 * result and extension left until the hidden bit
2488 * becomes one. Not all of the extension bits need 2488 * becomes one. Not all of the extension bits need
2489 * participate in the shift. Only the two most 2489 * participate in the shift. Only the two most
diff --git a/arch/parisc/math-emu/sfadd.c b/arch/parisc/math-emu/sfadd.c
index 008d721b5d22..f802cd6c7869 100644
--- a/arch/parisc/math-emu/sfadd.c
+++ b/arch/parisc/math-emu/sfadd.c
@@ -298,7 +298,7 @@ sgl_fadd(
298 if(Sgl_iszero_hidden(result)) 298 if(Sgl_iszero_hidden(result))
299 { 299 {
300 /* Handle normalization */ 300 /* Handle normalization */
301 /* A straight foward algorithm would now shift the result 301 /* A straightforward algorithm would now shift the result
302 * and extension left until the hidden bit becomes one. Not 302 * and extension left until the hidden bit becomes one. Not
303 * all of the extension bits need participate in the shift. 303 * all of the extension bits need participate in the shift.
304 * Only the two most significant bits (round and guard) are 304 * Only the two most significant bits (round and guard) are
diff --git a/arch/parisc/math-emu/sfsub.c b/arch/parisc/math-emu/sfsub.c
index 24eef61c8e3b..5f90d0f31a52 100644
--- a/arch/parisc/math-emu/sfsub.c
+++ b/arch/parisc/math-emu/sfsub.c
@@ -301,7 +301,7 @@ sgl_fsub(
301 if(Sgl_iszero_hidden(result)) 301 if(Sgl_iszero_hidden(result))
302 { 302 {
303 /* Handle normalization */ 303 /* Handle normalization */
304 /* A straight foward algorithm would now shift the result 304 /* A straightforward algorithm would now shift the result
305 * and extension left until the hidden bit becomes one. Not 305 * and extension left until the hidden bit becomes one. Not
306 * all of the extension bits need participate in the shift. 306 * all of the extension bits need participate in the shift.
307 * Only the two most significant bits (round and guard) are 307 * Only the two most significant bits (round and guard) are