diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-26 15:48:06 -0500 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-26 15:48:06 -0500 |
commit | b0138a6cb7923a997d278b47c176778534d1095b (patch) | |
tree | 4fcb8822a69631baba568e4e1942847747123887 /arch/parisc/lib/memcpy.c | |
parent | 6572d6d7d0f965dda19d02af804ed3ae4b3bf1fc (diff) | |
parent | 1055a8af093fea7490445bd15cd671020e542035 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6: (78 commits)
[PARISC] Use symbolic last syscall in __NR_Linux_syscalls
[PARISC] Add missing statfs64 and fstatfs64 syscalls
Revert "[PARISC] Optimize TLB flush on SMP systems"
[PARISC] Compat signal fixes for 64-bit parisc
[PARISC] Reorder syscalls to match unistd.h
Revert "[PATCH] make kernel/signal.c:kill_proc_info() static"
[PARISC] fix sys_rt_sigqueueinfo
[PARISC] fix section mismatch warnings in harmony sound driver
[PARISC] do not export get_register/set_register
[PARISC] add ENTRY()/ENDPROC() and simplify assembly of HP/UX emulation code
[PARISC] convert to use CONFIG_64BIT instead of __LP64__
[PARISC] use CONFIG_64BIT instead of __LP64__
[PARISC] add ASM_EXCEPTIONTABLE_ENTRY() macro
[PARISC] more ENTRY(), ENDPROC(), END() conversions
[PARISC] fix ENTRY() and ENDPROC() for 64bit-parisc
[PARISC] Fixes /proc/cpuinfo cache output on B160L
[PARISC] implement standard ENTRY(), END() and ENDPROC()
[PARISC] kill ENTRY_SYS_CPUS
[PARISC] clean up debugging printks in smp.c
[PARISC] factor syscall_restart code out of do_signal
...
Fix conflict in include/linux/sched.h due to kill_proc_info() being made
publicly available to PARISC again.
Diffstat (limited to 'arch/parisc/lib/memcpy.c')
-rw-r--r-- | arch/parisc/lib/memcpy.c | 38 |
1 files changed, 10 insertions, 28 deletions
diff --git a/arch/parisc/lib/memcpy.c b/arch/parisc/lib/memcpy.c index 5575e41f9d60..2c43ebe99a9c 100644 --- a/arch/parisc/lib/memcpy.c +++ b/arch/parisc/lib/memcpy.c | |||
@@ -96,30 +96,18 @@ DECLARE_PER_CPU(struct exception_data, exception_data); | |||
96 | #define DPRINTF(fmt, args...) | 96 | #define DPRINTF(fmt, args...) |
97 | #endif | 97 | #endif |
98 | 98 | ||
99 | #ifndef __LP64__ | ||
100 | #define EXC_WORD ".word" | ||
101 | #else | ||
102 | #define EXC_WORD ".dword" | ||
103 | #endif | ||
104 | |||
105 | #define def_load_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \ | 99 | #define def_load_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \ |
106 | __asm__ __volatile__ ( \ | 100 | __asm__ __volatile__ ( \ |
107 | "1:\t" #_insn ",ma " #_sz "(" _s ",%1), %0\n" \ | 101 | "1:\t" #_insn ",ma " #_sz "(" _s ",%1), %0\n\t" \ |
108 | "\t.section __ex_table,\"aw\"\n" \ | 102 | ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \ |
109 | "\t" EXC_WORD "\t1b\n" \ | ||
110 | "\t" EXC_WORD "\t" #_e "\n" \ | ||
111 | "\t.previous\n" \ | ||
112 | : _tt(_t), "+r"(_a) \ | 103 | : _tt(_t), "+r"(_a) \ |
113 | : \ | 104 | : \ |
114 | : "r8") | 105 | : "r8") |
115 | 106 | ||
116 | #define def_store_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \ | 107 | #define def_store_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \ |
117 | __asm__ __volatile__ ( \ | 108 | __asm__ __volatile__ ( \ |
118 | "1:\t" #_insn ",ma %1, " #_sz "(" _s ",%0)\n" \ | 109 | "1:\t" #_insn ",ma %1, " #_sz "(" _s ",%0)\n\t" \ |
119 | "\t.section __ex_table,\"aw\"\n" \ | 110 | ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \ |
120 | "\t" EXC_WORD "\t1b\n" \ | ||
121 | "\t" EXC_WORD "\t" #_e "\n" \ | ||
122 | "\t.previous\n" \ | ||
123 | : "+r"(_a) \ | 111 | : "+r"(_a) \ |
124 | : _tt(_t) \ | 112 | : _tt(_t) \ |
125 | : "r8") | 113 | : "r8") |
@@ -133,22 +121,16 @@ DECLARE_PER_CPU(struct exception_data, exception_data); | |||
133 | 121 | ||
134 | #define def_load_insn(_insn,_tt,_s,_o,_a,_t,_e) \ | 122 | #define def_load_insn(_insn,_tt,_s,_o,_a,_t,_e) \ |
135 | __asm__ __volatile__ ( \ | 123 | __asm__ __volatile__ ( \ |
136 | "1:\t" #_insn " " #_o "(" _s ",%1), %0\n" \ | 124 | "1:\t" #_insn " " #_o "(" _s ",%1), %0\n\t" \ |
137 | "\t.section __ex_table,\"aw\"\n" \ | 125 | ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \ |
138 | "\t" EXC_WORD "\t1b\n" \ | ||
139 | "\t" EXC_WORD "\t" #_e "\n" \ | ||
140 | "\t.previous\n" \ | ||
141 | : _tt(_t) \ | 126 | : _tt(_t) \ |
142 | : "r"(_a) \ | 127 | : "r"(_a) \ |
143 | : "r8") | 128 | : "r8") |
144 | 129 | ||
145 | #define def_store_insn(_insn,_tt,_s,_t,_o,_a,_e) \ | 130 | #define def_store_insn(_insn,_tt,_s,_t,_o,_a,_e) \ |
146 | __asm__ __volatile__ ( \ | 131 | __asm__ __volatile__ ( \ |
147 | "1:\t" #_insn " %0, " #_o "(" _s ",%1)\n" \ | 132 | "1:\t" #_insn " %0, " #_o "(" _s ",%1)\n\t" \ |
148 | "\t.section __ex_table,\"aw\"\n" \ | 133 | ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \ |
149 | "\t" EXC_WORD "\t1b\n" \ | ||
150 | "\t" EXC_WORD "\t" #_e "\n" \ | ||
151 | "\t.previous\n" \ | ||
152 | : \ | 134 | : \ |
153 | : _tt(_t), "r"(_a) \ | 135 | : _tt(_t), "r"(_a) \ |
154 | : "r8") | 136 | : "r8") |
@@ -167,8 +149,8 @@ extern inline void prefetch_dst(const void *addr) | |||
167 | __asm__("ldd 0(" d_space ",%0), %%r0" : : "r" (addr)); | 149 | __asm__("ldd 0(" d_space ",%0), %%r0" : : "r" (addr)); |
168 | } | 150 | } |
169 | #else | 151 | #else |
170 | #define prefetch_src(addr) | 152 | #define prefetch_src(addr) do { } while(0) |
171 | #define prefetch_dst(addr) | 153 | #define prefetch_dst(addr) do { } while(0) |
172 | #endif | 154 | #endif |
173 | 155 | ||
174 | /* Copy from a not-aligned src to an aligned dst, using shifts. Handles 4 words | 156 | /* Copy from a not-aligned src to an aligned dst, using shifts. Handles 4 words |