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authorHelge Deller <deller@gmx.de>2013-05-02 16:41:45 -0400
committerHelge Deller <deller@gmx.de>2013-05-06 17:08:32 -0400
commit6a45716abbf9dc0f397946306db1f78b2eba3086 (patch)
treeba6f1e47ff957dfc07e538d1d19dfc4615425cae /arch/parisc/kernel
parent7f64fb41aad9a8504dd76e81b2391eae64e1498a (diff)
parisc: fix partly 16/64k PAGE_SIZE boot
This patch fixes partly PAGE_SIZEs of 16K or 64K by adjusting the assembler PTE lookup code and the assembler TEMPALIAS code. Furthermore some data alignments for PAGE_SIZE have been limited to 4K (or less) to not waste too much memory with greater page sizes. As a side note, the palo loader can (currently) only handle up to 10 ELF segments which is fixed with tighter aligning as well. My testings indicated that the ldci command in the sba iommu coding needed adjustment by the PAGE_SHIFT value and that the I/O PDIR Page size was only set to 4K for my machine (C3000). All this fixes partly the boot, but there are still quite some caching problems left. Examples are e.g. the symbios logic driver which is failing: sym0: <896> rev 0x7 at pci 0000:00:0f.0 irq 69 sym0: PA-RISC Firmware, ID 7, Fast-40, SE, parity checking CACHE TEST FAILED: DMA error (dstat=0x81).sym0: CACHE INCORRECTLY CONFIGURED. and the tulip network driver which doesn't seem to work correctly either: Sending BOOTP requests .net eth0: Setting full-duplex based on MII#1 link partner capability of 05e1 ..... timed out! Beside those kernel fixes glibc will need fixes too to be able to handle >4K page sizes. Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'arch/parisc/kernel')
-rw-r--r--arch/parisc/kernel/entry.S10
-rw-r--r--arch/parisc/kernel/hpmc.S4
-rw-r--r--arch/parisc/kernel/pacache.S33
-rw-r--r--arch/parisc/kernel/setup.c2
-rw-r--r--arch/parisc/kernel/syscall.S9
5 files changed, 37 insertions, 21 deletions
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index f33201bf8977..aa486e46ab97 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -400,7 +400,15 @@
400#if PT_NLEVELS == 3 400#if PT_NLEVELS == 3
401 extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index 401 extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index
402#else 402#else
403# if defined(CONFIG_64BIT)
404 extrd,u \va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
405 #else
406 # if PAGE_SIZE > 4096
407 extru \va,31-ASM_PGDIR_SHIFT,32-ASM_PGDIR_SHIFT,\index
408 # else
403 extru \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index 409 extru \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
410 # endif
411# endif
404#endif 412#endif
405 dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */ 413 dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */
406 copy %r0,\pte 414 copy %r0,\pte
@@ -615,7 +623,7 @@
615 623
616 .text 624 .text
617 625
618 .align PAGE_SIZE 626 .align 4096
619 627
620ENTRY(fault_vector_20) 628ENTRY(fault_vector_20)
621 /* First vector is invalid (0) */ 629 /* First vector is invalid (0) */
diff --git a/arch/parisc/kernel/hpmc.S b/arch/parisc/kernel/hpmc.S
index 5595a2f31181..e158b6fbf1b4 100644
--- a/arch/parisc/kernel/hpmc.S
+++ b/arch/parisc/kernel/hpmc.S
@@ -55,13 +55,13 @@
55 * IODC requires 7K byte stack. That leaves 1K byte for os_hpmc. 55 * IODC requires 7K byte stack. That leaves 1K byte for os_hpmc.
56 */ 56 */
57 57
58 .align PAGE_SIZE 58 .align 4096
59hpmc_stack: 59hpmc_stack:
60 .block 16384 60 .block 16384
61 61
62#define HPMC_IODC_BUF_SIZE 0x8000 62#define HPMC_IODC_BUF_SIZE 0x8000
63 63
64 .align PAGE_SIZE 64 .align 4096
65hpmc_iodc_buf: 65hpmc_iodc_buf:
66 .block HPMC_IODC_BUF_SIZE 66 .block HPMC_IODC_BUF_SIZE
67 67
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 312b48422a56..5e1de6072be5 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -563,6 +563,15 @@ ENDPROC(copy_page_asm)
563 * %r23 physical page (shifted for tlb insert) of "from" translation 563 * %r23 physical page (shifted for tlb insert) of "from" translation
564 */ 564 */
565 565
566 /* Drop prot bits and convert to page addr for iitlbt and idtlbt */
567 #define PAGE_ADD_SHIFT (PAGE_SHIFT-12)
568 .macro convert_phys_for_tlb_insert20 phys
569 extrd,u \phys, 56-PAGE_ADD_SHIFT, 32-PAGE_ADD_SHIFT, \phys
570#if _PAGE_SIZE_ENCODING_DEFAULT
571 depdi _PAGE_SIZE_ENCODING_DEFAULT, 63, (63-58), \phys
572#endif
573 .endm
574
566 /* 575 /*
567 * We can't do this since copy_user_page is used to bring in 576 * We can't do this since copy_user_page is used to bring in
568 * file data that might have instructions. Since the data would 577 * file data that might have instructions. Since the data would
@@ -589,15 +598,14 @@ ENTRY(copy_user_page_asm)
589 sub %r25, %r1, %r23 598 sub %r25, %r1, %r23
590 599
591 ldil L%(TMPALIAS_MAP_START), %r28 600 ldil L%(TMPALIAS_MAP_START), %r28
592 /* FIXME for different page sizes != 4k */
593#ifdef CONFIG_64BIT 601#ifdef CONFIG_64BIT
594#if (TMPALIAS_MAP_START >= 0x80000000) 602#if (TMPALIAS_MAP_START >= 0x80000000)
595 depdi 0, 31,32, %r28 /* clear any sign extension */ 603 depdi 0, 31,32, %r28 /* clear any sign extension */
596#endif 604#endif
597 extrd,u %r26,56,32, %r26 /* convert phys addr to tlb insert format */ 605 convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
598 extrd,u %r23,56,32, %r23 /* convert phys addr to tlb insert format */ 606 convert_phys_for_tlb_insert20 %r23 /* convert phys addr to tlb insert format */
599 depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */ 607 depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */
600 depdi 0, 63,12, %r28 /* Clear any offset bits */ 608 depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
601 copy %r28, %r29 609 copy %r28, %r29
602 depdi 1, 41,1, %r29 /* Form aliased virtual address 'from' */ 610 depdi 1, 41,1, %r29 /* Form aliased virtual address 'from' */
603#else 611#else
@@ -747,11 +755,10 @@ ENTRY(clear_user_page_asm)
747#ifdef CONFIG_64BIT 755#ifdef CONFIG_64BIT
748#if (TMPALIAS_MAP_START >= 0x80000000) 756#if (TMPALIAS_MAP_START >= 0x80000000)
749 depdi 0, 31,32, %r28 /* clear any sign extension */ 757 depdi 0, 31,32, %r28 /* clear any sign extension */
750 /* FIXME: page size dependend */
751#endif 758#endif
752 extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */ 759 convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
753 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ 760 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
754 depdi 0, 63,12, %r28 /* Clear any offset bits */ 761 depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
755#else 762#else
756 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 763 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
757 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 764 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
@@ -832,11 +839,10 @@ ENTRY(flush_dcache_page_asm)
832#ifdef CONFIG_64BIT 839#ifdef CONFIG_64BIT
833#if (TMPALIAS_MAP_START >= 0x80000000) 840#if (TMPALIAS_MAP_START >= 0x80000000)
834 depdi 0, 31,32, %r28 /* clear any sign extension */ 841 depdi 0, 31,32, %r28 /* clear any sign extension */
835 /* FIXME: page size dependend */
836#endif 842#endif
837 extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */ 843 convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
838 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ 844 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
839 depdi 0, 63,12, %r28 /* Clear any offset bits */ 845 depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
840#else 846#else
841 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 847 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
842 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 848 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
@@ -909,11 +915,10 @@ ENTRY(flush_icache_page_asm)
909#ifdef CONFIG_64BIT 915#ifdef CONFIG_64BIT
910#if (TMPALIAS_MAP_START >= 0x80000000) 916#if (TMPALIAS_MAP_START >= 0x80000000)
911 depdi 0, 31,32, %r28 /* clear any sign extension */ 917 depdi 0, 31,32, %r28 /* clear any sign extension */
912 /* FIXME: page size dependend */
913#endif 918#endif
914 extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */ 919 convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
915 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ 920 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
916 depdi 0, 63,12, %r28 /* Clear any offset bits */ 921 depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
917#else 922#else
918 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 923 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
919 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 924 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
@@ -959,7 +964,7 @@ ENTRY(flush_icache_page_asm)
959 fic,m %r1(%sr4,%r28) 964 fic,m %r1(%sr4,%r28)
960 fic,m %r1(%sr4,%r28) 965 fic,m %r1(%sr4,%r28)
961 fic,m %r1(%sr4,%r28) 966 fic,m %r1(%sr4,%r28)
962 cmpb,COND(<<) %r28, %r25,1b 967 cmpb,COND(<<) %r28, %r25,1b
963 fic,m %r1(%sr4,%r28) 968 fic,m %r1(%sr4,%r28)
964 969
965 sync 970 sync
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c
index a3328c2616b0..76b63e726a53 100644
--- a/arch/parisc/kernel/setup.c
+++ b/arch/parisc/kernel/setup.c
@@ -129,6 +129,8 @@ void __init setup_arch(char **cmdline_p)
129 printk(KERN_INFO "The 32-bit Kernel has started...\n"); 129 printk(KERN_INFO "The 32-bit Kernel has started...\n");
130#endif 130#endif
131 131
132 printk(KERN_INFO "Default page size is %dKB.\n", (int)(PAGE_SIZE / 1024));
133
132 pdc_console_init(); 134 pdc_console_init();
133 135
134#ifdef CONFIG_64BIT 136#ifdef CONFIG_64BIT
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index 5e055240f00b..b27f4aabe898 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -15,6 +15,7 @@
15#include <asm/thread_info.h> 15#include <asm/thread_info.h>
16#include <asm/assembly.h> 16#include <asm/assembly.h>
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/cache.h>
18 19
19#include <linux/linkage.h> 20#include <linux/linkage.h>
20 21
@@ -643,7 +644,7 @@ ENTRY(end_linux_gateway_page)
643 644
644 .section .rodata,"a" 645 .section .rodata,"a"
645 646
646 .align PAGE_SIZE 647 .align 8
647 /* Light-weight-syscall table */ 648 /* Light-weight-syscall table */
648 /* Start of lws table. */ 649 /* Start of lws table. */
649ENTRY(lws_table) 650ENTRY(lws_table)
@@ -652,13 +653,13 @@ ENTRY(lws_table)
652END(lws_table) 653END(lws_table)
653 /* End of lws table */ 654 /* End of lws table */
654 655
655 .align PAGE_SIZE 656 .align 8
656ENTRY(sys_call_table) 657ENTRY(sys_call_table)
657#include "syscall_table.S" 658#include "syscall_table.S"
658END(sys_call_table) 659END(sys_call_table)
659 660
660#ifdef CONFIG_64BIT 661#ifdef CONFIG_64BIT
661 .align PAGE_SIZE 662 .align 8
662ENTRY(sys_call_table64) 663ENTRY(sys_call_table64)
663#define SYSCALL_TABLE_64BIT 664#define SYSCALL_TABLE_64BIT
664#include "syscall_table.S" 665#include "syscall_table.S"
@@ -674,7 +675,7 @@ END(sys_call_table64)
674 with ldcw. 675 with ldcw.
675 */ 676 */
676 .section .data 677 .section .data
677 .align PAGE_SIZE 678 .align L1_CACHE_BYTES
678ENTRY(lws_lock_start) 679ENTRY(lws_lock_start)
679 /* lws locks */ 680 /* lws locks */
680 .rept 16 681 .rept 16