diff options
| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-04-23 12:44:10 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-04-23 12:44:10 -0400 |
| commit | 6b426e785cb81e53dc2fc4dcf997661472b470ef (patch) | |
| tree | 3dbde895f120e78f66b32ddd9c9cbe3d83a59637 /arch/parisc/kernel/vmlinux.lds.S | |
| parent | cb6aef2879b769644b35cffe9844c81c63809c8e (diff) | |
| parent | 223232de068593b40d267e340f24c017d31c018a (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6:
[PARISC] MAINTAINERS
[PARISC] Make ioremap default to _nocache
[PARISC] Add new entries to the syscall table
[PARISC] Further work for multiple page sizes
[PARISC] Fix up hil_kbd.c mismerge
[PARISC] defconfig updates
[PARISC] Document that we tolerate "Relaxed Ordering"
[PARISC] Misc. janitorial work
[PARISC] EISA regions must be mapped NO_CACHE
[PARISC] OSS ad1889: Match register names with ALSA driver
Diffstat (limited to 'arch/parisc/kernel/vmlinux.lds.S')
| -rw-r--r-- | arch/parisc/kernel/vmlinux.lds.S | 54 |
1 files changed, 32 insertions, 22 deletions
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S index 6d6436a6b624..94dcc03a28ed 100644 --- a/arch/parisc/kernel/vmlinux.lds.S +++ b/arch/parisc/kernel/vmlinux.lds.S | |||
| @@ -6,6 +6,7 @@ | |||
| 6 | * Copyright (C) 2000 Michael Ang <mang with subcarrier.org> | 6 | * Copyright (C) 2000 Michael Ang <mang with subcarrier.org> |
| 7 | * Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org> | 7 | * Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org> |
| 8 | * Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org> | 8 | * Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org> |
| 9 | * Copyright (C) 2006 Helge Deller <deller@gmx.de> | ||
| 9 | * | 10 | * |
| 10 | * | 11 | * |
| 11 | * This program is free software; you can redistribute it and/or modify | 12 | * This program is free software; you can redistribute it and/or modify |
| @@ -27,6 +28,7 @@ | |||
| 27 | /* needed for the processor specific cache alignment size */ | 28 | /* needed for the processor specific cache alignment size */ |
| 28 | #include <asm/cache.h> | 29 | #include <asm/cache.h> |
| 29 | #include <asm/page.h> | 30 | #include <asm/page.h> |
| 31 | #include <asm/asm-offsets.h> | ||
| 30 | 32 | ||
| 31 | /* ld script to make hppa Linux kernel */ | 33 | /* ld script to make hppa Linux kernel */ |
| 32 | #ifndef CONFIG_64BIT | 34 | #ifndef CONFIG_64BIT |
| @@ -68,7 +70,7 @@ SECTIONS | |||
| 68 | RODATA | 70 | RODATA |
| 69 | 71 | ||
| 70 | /* writeable */ | 72 | /* writeable */ |
| 71 | . = ALIGN(4096); /* Make sure this is page aligned so | 73 | . = ALIGN(ASM_PAGE_SIZE); /* Make sure this is page aligned so |
| 72 | that we can properly leave these | 74 | that we can properly leave these |
| 73 | as writable */ | 75 | as writable */ |
| 74 | data_start = .; | 76 | data_start = .; |
| @@ -81,23 +83,17 @@ SECTIONS | |||
| 81 | __start___unwind = .; /* unwind info */ | 83 | __start___unwind = .; /* unwind info */ |
| 82 | .PARISC.unwind : { *(.PARISC.unwind) } | 84 | .PARISC.unwind : { *(.PARISC.unwind) } |
| 83 | __stop___unwind = .; | 85 | __stop___unwind = .; |
| 84 | 86 | ||
| 87 | /* rarely changed data like cpu maps */ | ||
| 88 | . = ALIGN(16); | ||
| 89 | .data.read_mostly : { *(.data.read_mostly) } | ||
| 90 | |||
| 91 | . = ALIGN(L1_CACHE_BYTES); | ||
| 85 | .data : { /* Data */ | 92 | .data : { /* Data */ |
| 86 | *(.data) | 93 | *(.data) |
| 87 | *(.data.vm0.pmd) | ||
| 88 | *(.data.vm0.pgd) | ||
| 89 | *(.data.vm0.pte) | ||
| 90 | CONSTRUCTORS | 94 | CONSTRUCTORS |
| 91 | } | 95 | } |
| 92 | 96 | ||
| 93 | . = ALIGN(4096); | ||
| 94 | /* nosave data is really only used for software suspend...it's here | ||
| 95 | * just in case we ever implement it */ | ||
| 96 | __nosave_begin = .; | ||
| 97 | .data_nosave : { *(.data.nosave) } | ||
| 98 | . = ALIGN(4096); | ||
| 99 | __nosave_end = .; | ||
| 100 | |||
| 101 | . = ALIGN(L1_CACHE_BYTES); | 97 | . = ALIGN(L1_CACHE_BYTES); |
| 102 | .data.cacheline_aligned : { *(.data.cacheline_aligned) } | 98 | .data.cacheline_aligned : { *(.data.cacheline_aligned) } |
| 103 | 99 | ||
| @@ -105,12 +101,29 @@ SECTIONS | |||
| 105 | . = ALIGN(16); | 101 | . = ALIGN(16); |
| 106 | .data.lock_aligned : { *(.data.lock_aligned) } | 102 | .data.lock_aligned : { *(.data.lock_aligned) } |
| 107 | 103 | ||
| 108 | /* rarely changed data like cpu maps */ | 104 | . = ALIGN(ASM_PAGE_SIZE); |
| 109 | . = ALIGN(16); | 105 | /* nosave data is really only used for software suspend...it's here |
| 110 | .data.read_mostly : { *(.data.read_mostly) } | 106 | * just in case we ever implement it */ |
| 107 | __nosave_begin = .; | ||
| 108 | .data_nosave : { *(.data.nosave) } | ||
| 109 | . = ALIGN(ASM_PAGE_SIZE); | ||
| 110 | __nosave_end = .; | ||
| 111 | 111 | ||
| 112 | _edata = .; /* End of data section */ | 112 | _edata = .; /* End of data section */ |
| 113 | 113 | ||
| 114 | __bss_start = .; /* BSS */ | ||
| 115 | /* page table entries need to be PAGE_SIZE aligned */ | ||
| 116 | . = ALIGN(ASM_PAGE_SIZE); | ||
| 117 | .data.vmpages : { | ||
| 118 | *(.data.vm0.pmd) | ||
| 119 | *(.data.vm0.pgd) | ||
| 120 | *(.data.vm0.pte) | ||
| 121 | } | ||
| 122 | .bss : { *(.bss) *(COMMON) } | ||
| 123 | __bss_stop = .; | ||
| 124 | |||
| 125 | |||
| 126 | /* assembler code expects init_task to be 16k aligned */ | ||
| 114 | . = ALIGN(16384); /* init_task */ | 127 | . = ALIGN(16384); /* init_task */ |
| 115 | .data.init_task : { *(.data.init_task) } | 128 | .data.init_task : { *(.data.init_task) } |
| 116 | 129 | ||
| @@ -126,6 +139,7 @@ SECTIONS | |||
| 126 | .dlt : { *(.dlt) } | 139 | .dlt : { *(.dlt) } |
| 127 | #endif | 140 | #endif |
| 128 | 141 | ||
| 142 | /* reserve space for interrupt stack by aligning __init* to 16k */ | ||
| 129 | . = ALIGN(16384); | 143 | . = ALIGN(16384); |
| 130 | __init_begin = .; | 144 | __init_begin = .; |
| 131 | .init.text : { | 145 | .init.text : { |
| @@ -166,7 +180,7 @@ SECTIONS | |||
| 166 | from .altinstructions and .eh_frame */ | 180 | from .altinstructions and .eh_frame */ |
| 167 | .exit.text : { *(.exit.text) } | 181 | .exit.text : { *(.exit.text) } |
| 168 | .exit.data : { *(.exit.data) } | 182 | .exit.data : { *(.exit.data) } |
| 169 | . = ALIGN(4096); | 183 | . = ALIGN(ASM_PAGE_SIZE); |
| 170 | __initramfs_start = .; | 184 | __initramfs_start = .; |
| 171 | .init.ramfs : { *(.init.ramfs) } | 185 | .init.ramfs : { *(.init.ramfs) } |
| 172 | __initramfs_end = .; | 186 | __initramfs_end = .; |
| @@ -174,14 +188,10 @@ SECTIONS | |||
| 174 | __per_cpu_start = .; | 188 | __per_cpu_start = .; |
| 175 | .data.percpu : { *(.data.percpu) } | 189 | .data.percpu : { *(.data.percpu) } |
| 176 | __per_cpu_end = .; | 190 | __per_cpu_end = .; |
| 177 | . = ALIGN(4096); | 191 | . = ALIGN(ASM_PAGE_SIZE); |
| 178 | __init_end = .; | 192 | __init_end = .; |
| 179 | /* freed after init ends here */ | 193 | /* freed after init ends here */ |
| 180 | 194 | ||
| 181 | __bss_start = .; /* BSS */ | ||
| 182 | .bss : { *(.bss) *(COMMON) } | ||
| 183 | __bss_stop = .; | ||
| 184 | |||
| 185 | _end = . ; | 195 | _end = . ; |
| 186 | 196 | ||
| 187 | /* Sections to be discarded */ | 197 | /* Sections to be discarded */ |
