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authorGrant Grundler <grundler@parisc-linux.org>2005-10-21 22:46:48 -0400
committerKyle McMartin <kyle@parisc-linux.org>2005-10-21 22:46:48 -0400
commit413059f28e9949d9ad2d04d1070c63169798176e (patch)
treec4609bc151c3f88f7e8f2128e81c32356f842063 /arch/parisc/kernel/pacache.S
parent3499495205a676d85fcc2f3c28e35ec9b43c47e3 (diff)
[PARISC] Replace uses of __LP64__ with CONFIG_64BIT
2.6.12-rc4-pa3 s/__LP64__/CONFIG_64BIT/ and fixup config.h usage Signed-off-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'arch/parisc/kernel/pacache.S')
-rw-r--r--arch/parisc/kernel/pacache.S30
1 files changed, 16 insertions, 14 deletions
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 71ade44c4618..4a7d9c8903f4 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -26,7 +26,7 @@
26 * can be used. 26 * can be used.
27 */ 27 */
28 28
29#ifdef __LP64__ 29#ifdef CONFIG_64BIT
30#define ADDIB addib,* 30#define ADDIB addib,*
31#define CMPB cmpb,* 31#define CMPB cmpb,*
32#define ANDCM andcm,* 32#define ANDCM andcm,*
@@ -40,6 +40,8 @@
40 .level 2.0 40 .level 2.0
41#endif 41#endif
42 42
43#include <linux/config.h>
44
43#include <asm/psw.h> 45#include <asm/psw.h>
44#include <asm/assembly.h> 46#include <asm/assembly.h>
45#include <asm/pgtable.h> 47#include <asm/pgtable.h>
@@ -294,7 +296,7 @@ copy_user_page_asm:
294 .callinfo NO_CALLS 296 .callinfo NO_CALLS
295 .entry 297 .entry
296 298
297#ifdef __LP64__ 299#ifdef CONFIG_64BIT
298 /* PA8x00 CPUs can consume 2 loads or 1 store per cycle. 300 /* PA8x00 CPUs can consume 2 loads or 1 store per cycle.
299 * Unroll the loop by hand and arrange insn appropriately. 301 * Unroll the loop by hand and arrange insn appropriately.
300 * GCC probably can do this just as well. 302 * GCC probably can do this just as well.
@@ -454,7 +456,7 @@ copy_user_page_asm:
454 sub %r25, %r1, %r23 /* move physical addr into non shadowed reg */ 456 sub %r25, %r1, %r23 /* move physical addr into non shadowed reg */
455 457
456 ldil L%(TMPALIAS_MAP_START), %r28 458 ldil L%(TMPALIAS_MAP_START), %r28
457#ifdef __LP64__ 459#ifdef CONFIG_64BIT
458 extrd,u %r26,56,32, %r26 /* convert phys addr to tlb insert format */ 460 extrd,u %r26,56,32, %r26 /* convert phys addr to tlb insert format */
459 extrd,u %r23,56,32, %r23 /* convert phys addr to tlb insert format */ 461 extrd,u %r23,56,32, %r23 /* convert phys addr to tlb insert format */
460 depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */ 462 depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */
@@ -541,7 +543,7 @@ __clear_user_page_asm:
541 tophys_r1 %r26 543 tophys_r1 %r26
542 544
543 ldil L%(TMPALIAS_MAP_START), %r28 545 ldil L%(TMPALIAS_MAP_START), %r28
544#ifdef __LP64__ 546#ifdef CONFIG_64BIT
545#if (TMPALIAS_MAP_START >= 0x80000000) 547#if (TMPALIAS_MAP_START >= 0x80000000)
546 depdi 0, 31,32, %r28 /* clear any sign extension */ 548 depdi 0, 31,32, %r28 /* clear any sign extension */
547#endif 549#endif
@@ -558,7 +560,7 @@ __clear_user_page_asm:
558 560
559 pdtlb 0(%r28) 561 pdtlb 0(%r28)
560 562
561#ifdef __LP64__ 563#ifdef CONFIG_64BIT
562 ldi 32, %r1 /* PAGE_SIZE/128 == 32 */ 564 ldi 32, %r1 /* PAGE_SIZE/128 == 32 */
563 565
564 /* PREFETCH (Write) has not (yet) been proven to help here */ 566 /* PREFETCH (Write) has not (yet) been proven to help here */
@@ -583,7 +585,7 @@ __clear_user_page_asm:
583 ADDIB> -1, %r1, 1b 585 ADDIB> -1, %r1, 1b
584 ldo 128(%r28), %r28 586 ldo 128(%r28), %r28
585 587
586#else /* ! __LP64 */ 588#else /* ! CONFIG_64BIT */
587 589
588 ldi 64, %r1 /* PAGE_SIZE/64 == 64 */ 590 ldi 64, %r1 /* PAGE_SIZE/64 == 64 */
589 591
@@ -606,7 +608,7 @@ __clear_user_page_asm:
606 stw %r0, 60(%r28) 608 stw %r0, 60(%r28)
607 ADDIB> -1, %r1, 1b 609 ADDIB> -1, %r1, 1b
608 ldo 64(%r28), %r28 610 ldo 64(%r28), %r28
609#endif /* __LP64 */ 611#endif /* CONFIG_64BIT */
610 612
611 bv %r0(%r2) 613 bv %r0(%r2)
612 nop 614 nop
@@ -624,7 +626,7 @@ flush_kernel_dcache_page:
624 ldil L%dcache_stride, %r1 626 ldil L%dcache_stride, %r1
625 ldw R%dcache_stride(%r1), %r23 627 ldw R%dcache_stride(%r1), %r23
626 628
627#ifdef __LP64__ 629#ifdef CONFIG_64BIT
628 depdi,z 1, 63-PAGE_SHIFT,1, %r25 630 depdi,z 1, 63-PAGE_SHIFT,1, %r25
629#else 631#else
630 depwi,z 1, 31-PAGE_SHIFT,1, %r25 632 depwi,z 1, 31-PAGE_SHIFT,1, %r25
@@ -668,7 +670,7 @@ flush_user_dcache_page:
668 ldil L%dcache_stride, %r1 670 ldil L%dcache_stride, %r1
669 ldw R%dcache_stride(%r1), %r23 671 ldw R%dcache_stride(%r1), %r23
670 672
671#ifdef __LP64__ 673#ifdef CONFIG_64BIT
672 depdi,z 1,63-PAGE_SHIFT,1, %r25 674 depdi,z 1,63-PAGE_SHIFT,1, %r25
673#else 675#else
674 depwi,z 1,31-PAGE_SHIFT,1, %r25 676 depwi,z 1,31-PAGE_SHIFT,1, %r25
@@ -712,7 +714,7 @@ flush_user_icache_page:
712 ldil L%dcache_stride, %r1 714 ldil L%dcache_stride, %r1
713 ldw R%dcache_stride(%r1), %r23 715 ldw R%dcache_stride(%r1), %r23
714 716
715#ifdef __LP64__ 717#ifdef CONFIG_64BIT
716 depdi,z 1, 63-PAGE_SHIFT,1, %r25 718 depdi,z 1, 63-PAGE_SHIFT,1, %r25
717#else 719#else
718 depwi,z 1, 31-PAGE_SHIFT,1, %r25 720 depwi,z 1, 31-PAGE_SHIFT,1, %r25
@@ -757,7 +759,7 @@ purge_kernel_dcache_page:
757 ldil L%dcache_stride, %r1 759 ldil L%dcache_stride, %r1
758 ldw R%dcache_stride(%r1), %r23 760 ldw R%dcache_stride(%r1), %r23
759 761
760#ifdef __LP64__ 762#ifdef CONFIG_64BIT
761 depdi,z 1, 63-PAGE_SHIFT,1, %r25 763 depdi,z 1, 63-PAGE_SHIFT,1, %r25
762#else 764#else
763 depwi,z 1, 31-PAGE_SHIFT,1, %r25 765 depwi,z 1, 31-PAGE_SHIFT,1, %r25
@@ -805,7 +807,7 @@ flush_alias_page:
805 tophys_r1 %r26 807 tophys_r1 %r26
806 808
807 ldil L%(TMPALIAS_MAP_START), %r28 809 ldil L%(TMPALIAS_MAP_START), %r28
808#ifdef __LP64__ 810#ifdef CONFIG_64BIT
809 extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */ 811 extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */
810 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ 812 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
811 depdi 0, 63,12, %r28 /* Clear any offset bits */ 813 depdi 0, 63,12, %r28 /* Clear any offset bits */
@@ -822,7 +824,7 @@ flush_alias_page:
822 ldil L%dcache_stride, %r1 824 ldil L%dcache_stride, %r1
823 ldw R%dcache_stride(%r1), %r23 825 ldw R%dcache_stride(%r1), %r23
824 826
825#ifdef __LP64__ 827#ifdef CONFIG_64BIT
826 depdi,z 1, 63-PAGE_SHIFT,1, %r29 828 depdi,z 1, 63-PAGE_SHIFT,1, %r29
827#else 829#else
828 depwi,z 1, 31-PAGE_SHIFT,1, %r29 830 depwi,z 1, 31-PAGE_SHIFT,1, %r29
@@ -933,7 +935,7 @@ flush_kernel_icache_page:
933 ldil L%icache_stride, %r1 935 ldil L%icache_stride, %r1
934 ldw R%icache_stride(%r1), %r23 936 ldw R%icache_stride(%r1), %r23
935 937
936#ifdef __LP64__ 938#ifdef CONFIG_64BIT
937 depdi,z 1, 63-PAGE_SHIFT,1, %r25 939 depdi,z 1, 63-PAGE_SHIFT,1, %r25
938#else 940#else
939 depwi,z 1, 31-PAGE_SHIFT,1, %r25 941 depwi,z 1, 31-PAGE_SHIFT,1, %r25