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| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-04 11:18:34 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-04 11:18:34 -0400 |
| commit | 5a96c5d0c58ead9a0ece03ffe1c116dea6dafe9c (patch) | |
| tree | 17199c2c536f25a2b34e37045e9f7619a2dcbb3d /arch/parisc/kernel/cache.c | |
| parent | 13bbd8d90647132fc295d73b122567eb8987d298 (diff) | |
| parent | 5f024a251f0b3b179bbc8fc62f3a650e49359db5 (diff) | |
Merge master.kernel.org:/pub/scm/linux/kernel/git/willy/parisc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/willy/parisc-2.6: (41 commits)
[PARISC] Kill wall_jiffies use
[PARISC] Honour "panic_on_oops" sysctl
[PARISC] Fix fs/binfmt_som.c
[PARISC] Export clear_user_page to modules
[PARISC] Make DMA routines more stubby
[PARISC] Define pci_get_legacy_ide_irq
[PARISC] Fix CONFIG_DEBUG_SPINLOCK
[PARISC] Fix HPUX compat compile with current GCC
[PARISC] Fix iounmap compile warning
[PARISC] Add support for Quicksilver AGPGART
[PARISC] Move LBA and SBA register defines to the common ropes.h
[PARISC] Create shared <asm/ropes.h> header
[PARISC] Stash the lba_device in its struct device drvdata
[PARISC] Generalize IS_ASTRO et al to take a parisc_device like
[PARISC] Pretty print the name of the lba type on kernel boot
[PARISC] Remove some obsolete comments and I checked that Reo is similar to Ike
[PARISC] Add hardware found in the rp8400
[PARISC] Allow nested interrupts
[PARISC] Further updates to timer_interrupt()
[PARISC] remove halftick and copy clocktick to local var (gcc can optimize usage)
...
Diffstat (limited to 'arch/parisc/kernel/cache.c')
| -rw-r--r-- | arch/parisc/kernel/cache.c | 48 |
1 files changed, 44 insertions, 4 deletions
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c index bc7c4a4e26a1..0be51e92a2fc 100644 --- a/arch/parisc/kernel/cache.c +++ b/arch/parisc/kernel/cache.c | |||
| @@ -35,15 +35,12 @@ int icache_stride __read_mostly; | |||
| 35 | EXPORT_SYMBOL(dcache_stride); | 35 | EXPORT_SYMBOL(dcache_stride); |
| 36 | 36 | ||
| 37 | 37 | ||
| 38 | #if defined(CONFIG_SMP) | ||
| 39 | /* On some machines (e.g. ones with the Merced bus), there can be | 38 | /* On some machines (e.g. ones with the Merced bus), there can be |
| 40 | * only a single PxTLB broadcast at a time; this must be guaranteed | 39 | * only a single PxTLB broadcast at a time; this must be guaranteed |
| 41 | * by software. We put a spinlock around all TLB flushes to | 40 | * by software. We put a spinlock around all TLB flushes to |
| 42 | * ensure this. | 41 | * ensure this. |
| 43 | */ | 42 | */ |
| 44 | DEFINE_SPINLOCK(pa_tlb_lock); | 43 | DEFINE_SPINLOCK(pa_tlb_lock); |
| 45 | EXPORT_SYMBOL(pa_tlb_lock); | ||
| 46 | #endif | ||
| 47 | 44 | ||
| 48 | struct pdc_cache_info cache_info __read_mostly; | 45 | struct pdc_cache_info cache_info __read_mostly; |
| 49 | #ifndef CONFIG_PA20 | 46 | #ifndef CONFIG_PA20 |
| @@ -91,7 +88,8 @@ update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) | |||
| 91 | 88 | ||
| 92 | flush_kernel_dcache_page(page); | 89 | flush_kernel_dcache_page(page); |
| 93 | clear_bit(PG_dcache_dirty, &page->flags); | 90 | clear_bit(PG_dcache_dirty, &page->flags); |
| 94 | } | 91 | } else if (parisc_requires_coherency()) |
| 92 | flush_kernel_dcache_page(page); | ||
| 95 | } | 93 | } |
| 96 | 94 | ||
| 97 | void | 95 | void |
| @@ -370,3 +368,45 @@ void parisc_setup_cache_timing(void) | |||
| 370 | 368 | ||
| 371 | printk(KERN_INFO "Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus()); | 369 | printk(KERN_INFO "Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus()); |
| 372 | } | 370 | } |
| 371 | |||
| 372 | extern void purge_kernel_dcache_page(unsigned long); | ||
| 373 | extern void clear_user_page_asm(void *page, unsigned long vaddr); | ||
| 374 | |||
| 375 | void clear_user_page(void *page, unsigned long vaddr, struct page *pg) | ||
| 376 | { | ||
| 377 | purge_kernel_dcache_page((unsigned long)page); | ||
| 378 | purge_tlb_start(); | ||
| 379 | pdtlb_kernel(page); | ||
| 380 | purge_tlb_end(); | ||
| 381 | clear_user_page_asm(page, vaddr); | ||
| 382 | } | ||
| 383 | EXPORT_SYMBOL(clear_user_page); | ||
| 384 | |||
| 385 | void flush_kernel_dcache_page_addr(void *addr) | ||
| 386 | { | ||
| 387 | flush_kernel_dcache_page_asm(addr); | ||
| 388 | purge_tlb_start(); | ||
| 389 | pdtlb_kernel(addr); | ||
| 390 | purge_tlb_end(); | ||
| 391 | } | ||
| 392 | EXPORT_SYMBOL(flush_kernel_dcache_page_addr); | ||
| 393 | |||
| 394 | void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, | ||
| 395 | struct page *pg) | ||
| 396 | { | ||
| 397 | /* no coherency needed (all in kmap/kunmap) */ | ||
| 398 | copy_user_page_asm(vto, vfrom); | ||
| 399 | if (!parisc_requires_coherency()) | ||
| 400 | flush_kernel_dcache_page_asm(vto); | ||
| 401 | } | ||
| 402 | EXPORT_SYMBOL(copy_user_page); | ||
| 403 | |||
| 404 | #ifdef CONFIG_PA8X00 | ||
| 405 | |||
| 406 | void kunmap_parisc(void *addr) | ||
| 407 | { | ||
| 408 | if (parisc_requires_coherency()) | ||
| 409 | flush_kernel_dcache_page_addr(addr); | ||
| 410 | } | ||
| 411 | EXPORT_SYMBOL(kunmap_parisc); | ||
| 412 | #endif | ||
