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authorJames Bottomley <James.Bottomley@suse.de>2011-02-10 12:20:41 -0500
committerJames Bottomley <James.Bottomley@suse.de>2011-02-10 12:20:41 -0500
commite9a623be5c984a1e344b2bb94e36e592f2491de6 (patch)
tree01a50401f03fc89193261cd4737ace912b0d1047 /arch/parisc/include/asm
parent6148a47ac3872092d4bc4888838bec6dff16654d (diff)
parent8b4ae3342dbcb6a0def3a7b3ae7aee633a81e758 (diff)
Merge branch 'tmpalias-flush' into for-next
Diffstat (limited to 'arch/parisc/include/asm')
-rw-r--r--arch/parisc/include/asm/cacheflush.h7
-rw-r--r--arch/parisc/include/asm/pgtable.h14
2 files changed, 8 insertions, 13 deletions
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
index f388a85bba11..dc9286a4dcc7 100644
--- a/arch/parisc/include/asm/cacheflush.h
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -26,8 +26,6 @@ void flush_user_dcache_range_asm(unsigned long, unsigned long);
26void flush_kernel_dcache_range_asm(unsigned long, unsigned long); 26void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
27void flush_kernel_dcache_page_asm(void *); 27void flush_kernel_dcache_page_asm(void *);
28void flush_kernel_icache_page(void *); 28void flush_kernel_icache_page(void *);
29void flush_user_dcache_page(unsigned long);
30void flush_user_icache_page(unsigned long);
31void flush_user_dcache_range(unsigned long, unsigned long); 29void flush_user_dcache_range(unsigned long, unsigned long);
32void flush_user_icache_range(unsigned long, unsigned long); 30void flush_user_icache_range(unsigned long, unsigned long);
33 31
@@ -90,12 +88,15 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned
90void flush_cache_range(struct vm_area_struct *vma, 88void flush_cache_range(struct vm_area_struct *vma,
91 unsigned long start, unsigned long end); 89 unsigned long start, unsigned long end);
92 90
91/* defined in pacache.S exported in cache.c used by flush_anon_page */
92void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr);
93
93#define ARCH_HAS_FLUSH_ANON_PAGE 94#define ARCH_HAS_FLUSH_ANON_PAGE
94static inline void 95static inline void
95flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) 96flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
96{ 97{
97 if (PageAnon(page)) 98 if (PageAnon(page))
98 flush_user_dcache_page(vmaddr); 99 flush_dcache_page_asm(page_to_phys(page), vmaddr);
99} 100}
100 101
101#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE 102#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index 6f1f65d3c0ef..5d7b8ce9fdf3 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -138,8 +138,7 @@ struct vm_area_struct;
138#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */ 138#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
139#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */ 139#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
140#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */ 140#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
141#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */ 141/* bit 21 was formerly the FLUSH bit but is now unused */
142 /* for cache flushing only */
143#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */ 142#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
144 143
145/* N.B. The bits are defined in terms of a 32 bit word above, so the */ 144/* N.B. The bits are defined in terms of a 32 bit word above, so the */
@@ -173,7 +172,6 @@ struct vm_area_struct;
173#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT)) 172#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
174#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT)) 173#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
175#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT)) 174#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
176#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
177#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT)) 175#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
178#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT)) 176#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
179 177
@@ -213,7 +211,6 @@ struct vm_area_struct;
213#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) 211#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
214#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) 212#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
215#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ) 213#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
216#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
217 214
218 215
219/* 216/*
@@ -261,7 +258,7 @@ extern unsigned long *empty_zero_page;
261 258
262#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 259#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
263 260
264#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH)) 261#define pte_none(x) (pte_val(x) == 0)
265#define pte_present(x) (pte_val(x) & _PAGE_PRESENT) 262#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
266#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) 263#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
267 264
@@ -444,13 +441,10 @@ struct mm_struct;
444static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 441static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
445{ 442{
446 pte_t old_pte; 443 pte_t old_pte;
447 pte_t pte;
448 444
449 spin_lock(&pa_dbit_lock); 445 spin_lock(&pa_dbit_lock);
450 pte = old_pte = *ptep; 446 old_pte = *ptep;
451 pte_val(pte) &= ~_PAGE_PRESENT; 447 pte_clear(mm,addr,ptep);
452 pte_val(pte) |= _PAGE_FLUSH;
453 set_pte_at(mm,addr,ptep,pte);
454 spin_unlock(&pa_dbit_lock); 448 spin_unlock(&pa_dbit_lock);
455 449
456 return old_pte; 450 return old_pte;