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authorFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>2010-06-29 03:29:04 -0400
committerKyle McMartin <kyle@mcmartin.ca>2010-10-21 21:20:09 -0400
commitb97680c419b75b0c2cf6837a9f268e2ecbaf50f6 (patch)
tree6841d13169d7087f1b7fd90cce079a832922c805 /arch/parisc/include/asm/cache.h
parent2da83b90bbbac586fca2735f7da21966a31ec33f (diff)
parisc: remove homegrown L1_CACHE_ALIGN macro
Let's use the standard L1_CACHE_ALIGN macro instead. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Kyle McMartin <kyle@redhat.com>
Diffstat (limited to 'arch/parisc/include/asm/cache.h')
-rw-r--r--arch/parisc/include/asm/cache.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h
index 039880e7d2c9..47f11c707b65 100644
--- a/arch/parisc/include/asm/cache.h
+++ b/arch/parisc/include/asm/cache.h
@@ -24,8 +24,6 @@
24 24
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26 26
27#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
28
29#define SMP_CACHE_BYTES L1_CACHE_BYTES 27#define SMP_CACHE_BYTES L1_CACHE_BYTES
30 28
31#define ARCH_DMA_MINALIGN L1_CACHE_BYTES 29#define ARCH_DMA_MINALIGN L1_CACHE_BYTES