diff options
author | FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> | 2010-08-10 21:03:22 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-11 11:59:21 -0400 |
commit | a6eb9fe105d5de0053b261148cee56c94b4720ca (patch) | |
tree | 36e3f324a6a768397ef398674176c0f5f5365bff /arch/mn10300 | |
parent | cd1542c8197fc3c2eb3a8301505d5d9738fab1e4 (diff) |
dma-mapping: rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN
Now each architecture has the own dma_get_cache_alignment implementation.
dma_get_cache_alignment returns the minimum DMA alignment. Architectures
define it as ARCH_KMALLOC_MINALIGN (it's used to make sure that malloc'ed
buffer is DMA-safe; the buffer doesn't share a cache with the others). So
we can unify dma_get_cache_alignment implementations.
This patch:
dma_get_cache_alignment() needs to know if an architecture defines
ARCH_KMALLOC_MINALIGN or not (needs to know if architecture has DMA
alignment restriction). However, slab.h define ARCH_KMALLOC_MINALIGN if
architectures doesn't define it.
Let's rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN.
ARCH_KMALLOC_MINALIGN is used only in the internals of slab/slob/slub
(except for crypto).
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/mn10300')
-rw-r--r-- | arch/mn10300/include/asm/cache.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h index 6e2fe28dde4e..781bf613366d 100644 --- a/arch/mn10300/include/asm/cache.h +++ b/arch/mn10300/include/asm/cache.h | |||
@@ -21,7 +21,7 @@ | |||
21 | #define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES | 21 | #define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES |
22 | #endif | 22 | #endif |
23 | 23 | ||
24 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | 24 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |
25 | 25 | ||
26 | /* data cache purge registers | 26 | /* data cache purge registers |
27 | * - read from the register to unconditionally purge that cache line | 27 | * - read from the register to unconditionally purge that cache line |