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authorAkira Takeuchi <takeuchi.akr@jp.panasonic.com>2010-10-27 12:28:51 -0400
committerDavid Howells <dhowells@redhat.com>2010-10-27 12:28:51 -0400
commit965ea4bbb9ae926358273368144ba838c561bc38 (patch)
treec6ee08f2f2970bb500ccc7cf58de6beea870e4f8 /arch/mn10300
parentdccbf4853a31a3f774f38c402209d23388d99f52 (diff)
MN10300: SMP TLB flushing
Implement global TLB flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/mn10300')
-rw-r--r--arch/mn10300/include/asm/mmu_context.h22
-rw-r--r--arch/mn10300/include/asm/tlbflush.h81
-rw-r--r--arch/mn10300/mm/Makefile2
-rw-r--r--arch/mn10300/mm/tlb-smp.c214
4 files changed, 290 insertions, 29 deletions
diff --git a/arch/mn10300/include/asm/mmu_context.h b/arch/mn10300/include/asm/mmu_context.h
index 5fb3648968ae..c8f6c82672ad 100644
--- a/arch/mn10300/include/asm/mmu_context.h
+++ b/arch/mn10300/include/asm/mmu_context.h
@@ -36,6 +36,22 @@
36 36
37#define enter_lazy_tlb(mm, tsk) do {} while (0) 37#define enter_lazy_tlb(mm, tsk) do {} while (0)
38 38
39static inline void cpu_ran_vm(int cpu, struct mm_struct *mm)
40{
41#ifdef CONFIG_SMP
42 cpumask_set_cpu(cpu, mm_cpumask(mm));
43#endif
44}
45
46static inline bool cpu_maybe_ran_vm(int cpu, struct mm_struct *mm)
47{
48#ifdef CONFIG_SMP
49 return cpumask_test_and_set_cpu(cpu, mm_cpumask(mm));
50#else
51 return true;
52#endif
53}
54
39#ifdef CONFIG_MN10300_TLB_USE_PIDR 55#ifdef CONFIG_MN10300_TLB_USE_PIDR
40extern unsigned long mmu_context_cache[NR_CPUS]; 56extern unsigned long mmu_context_cache[NR_CPUS];
41#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()]) 57#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
@@ -127,7 +143,13 @@ static inline void activate_context(struct mm_struct *mm)
127static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 143static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
128 struct task_struct *tsk) 144 struct task_struct *tsk)
129{ 145{
146 int cpu = smp_processor_id();
147
130 if (prev != next) { 148 if (prev != next) {
149#ifdef CONFIG_SMP
150 per_cpu(cpu_tlbstate, cpu).active_mm = next;
151#endif
152 cpu_ran_vm(cpu, next);
131 PTBR = (unsigned long) next->pgd; 153 PTBR = (unsigned long) next->pgd;
132 activate_context(next); 154 activate_context(next);
133 } 155 }
diff --git a/arch/mn10300/include/asm/tlbflush.h b/arch/mn10300/include/asm/tlbflush.h
index c3c194d4031e..efddd6e1adea 100644
--- a/arch/mn10300/include/asm/tlbflush.h
+++ b/arch/mn10300/include/asm/tlbflush.h
@@ -11,6 +11,7 @@
11#ifndef _ASM_TLBFLUSH_H 11#ifndef _ASM_TLBFLUSH_H
12#define _ASM_TLBFLUSH_H 12#define _ASM_TLBFLUSH_H
13 13
14#include <linux/mm.h>
14#include <asm/processor.h> 15#include <asm/processor.h>
15 16
16struct tlb_state { 17struct tlb_state {
@@ -93,39 +94,61 @@ void local_flush_tlb_page(struct mm_struct *mm, unsigned long addr)
93 * - flush_tlb_range(mm, start, end) flushes a range of pages 94 * - flush_tlb_range(mm, start, end) flushes a range of pages
94 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables 95 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
95 */ 96 */
96#define flush_tlb_all() \ 97#ifdef CONFIG_SMP
97do { \ 98
98 preempt_disable(); \ 99#include <asm/smp.h>
99 local_flush_tlb_all(); \ 100
100 preempt_enable(); \ 101extern void flush_tlb_all(void);
101} while (0) 102extern void flush_tlb_current_task(void);
102 103extern void flush_tlb_mm(struct mm_struct *);
103#define flush_tlb_mm(mm) \ 104extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
104do { \ 105
105 preempt_disable(); \ 106#define flush_tlb() flush_tlb_current_task()
106 local_flush_tlb_all(); \ 107
107 preempt_enable(); \ 108static inline void flush_tlb_range(struct vm_area_struct *vma,
108} while (0) 109 unsigned long start, unsigned long end)
109 110{
110#define flush_tlb_range(vma, start, end) \ 111 flush_tlb_mm(vma->vm_mm);
111do { \ 112}
112 unsigned long __s __attribute__((unused)) = (start); \ 113
113 unsigned long __e __attribute__((unused)) = (end); \ 114#else /* CONFIG_SMP */
114 preempt_disable(); \ 115
115 local_flush_tlb_all(); \ 116static inline void flush_tlb_all(void)
116 preempt_enable(); \ 117{
117} while (0) 118 preempt_disable();
119 local_flush_tlb_all();
120 preempt_enable();
121}
122
123static inline void flush_tlb_mm(struct mm_struct *mm)
124{
125 preempt_disable();
126 local_flush_tlb_all();
127 preempt_enable();
128}
129
130static inline void flush_tlb_range(struct vm_area_struct *vma,
131 unsigned long start, unsigned long end)
132{
133 preempt_disable();
134 local_flush_tlb_all();
135 preempt_enable();
136}
118 137
119#define flush_tlb_page(vma, addr) local_flush_tlb_page((vma)->vm_mm, addr) 138#define flush_tlb_page(vma, addr) local_flush_tlb_page((vma)->vm_mm, addr)
120#define flush_tlb() flush_tlb_all() 139#define flush_tlb() flush_tlb_all()
121 140
122#define flush_tlb_kernel_range(start, end) \ 141#endif /* CONFIG_SMP */
123do { \
124 unsigned long __s __attribute__((unused)) = (start); \
125 unsigned long __e __attribute__((unused)) = (end); \
126 flush_tlb_all(); \
127} while (0)
128 142
129#define flush_tlb_pgtables(mm, start, end) do {} while (0) 143static inline void flush_tlb_kernel_range(unsigned long start,
144 unsigned long end)
145{
146 flush_tlb_all();
147}
148
149static inline void flush_tlb_pgtables(struct mm_struct *mm,
150 unsigned long start, unsigned long end)
151{
152}
130 153
131#endif /* _ASM_TLBFLUSH_H */ 154#endif /* _ASM_TLBFLUSH_H */
diff --git a/arch/mn10300/mm/Makefile b/arch/mn10300/mm/Makefile
index 184745f94c32..203fee23f7d7 100644
--- a/arch/mn10300/mm/Makefile
+++ b/arch/mn10300/mm/Makefile
@@ -18,3 +18,5 @@ cacheflush-$(CONFIG_MN10300_CACHE_DISABLED) := cache-disabled.o
18obj-y := \ 18obj-y := \
19 init.o fault.o pgtable.o extable.o tlb-mn10300.o mmu-context.o \ 19 init.o fault.o pgtable.o extable.o tlb-mn10300.o mmu-context.o \
20 misalignment.o dma-alloc.o $(cacheflush-y) 20 misalignment.o dma-alloc.o $(cacheflush-y)
21
22obj-$(CONFIG_SMP) += tlb-smp.o
diff --git a/arch/mn10300/mm/tlb-smp.c b/arch/mn10300/mm/tlb-smp.c
new file mode 100644
index 000000000000..0b6a5ad1960e
--- /dev/null
+++ b/arch/mn10300/mm/tlb-smp.c
@@ -0,0 +1,214 @@
1/* SMP TLB support routines.
2 *
3 * Copyright (C) 2006-2008 Panasonic Corporation
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#include <linux/interrupt.h>
16#include <linux/spinlock.h>
17#include <linux/init.h>
18#include <linux/jiffies.h>
19#include <linux/cpumask.h>
20#include <linux/err.h>
21#include <linux/kernel.h>
22#include <linux/delay.h>
23#include <linux/sched.h>
24#include <linux/profile.h>
25#include <linux/smp.h>
26#include <asm/tlbflush.h>
27#include <asm/system.h>
28#include <asm/bitops.h>
29#include <asm/processor.h>
30#include <asm/bug.h>
31#include <asm/exceptions.h>
32#include <asm/hardirq.h>
33#include <asm/fpu.h>
34#include <asm/mmu_context.h>
35#include <asm/thread_info.h>
36#include <asm/cpu-regs.h>
37#include <asm/intctl-regs.h>
38
39/*
40 * For flush TLB
41 */
42#define FLUSH_ALL 0xffffffff
43
44static cpumask_t flush_cpumask;
45static struct mm_struct *flush_mm;
46static unsigned long flush_va;
47static DEFINE_SPINLOCK(tlbstate_lock);
48
49DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
50 &init_mm, 0
51};
52
53static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
54 unsigned long va);
55static void do_flush_tlb_all(void *info);
56
57/**
58 * smp_flush_tlb - Callback to invalidate the TLB.
59 * @unused: Callback context (ignored).
60 */
61void smp_flush_tlb(void *unused)
62{
63 unsigned long cpu_id;
64
65 cpu_id = get_cpu();
66
67 if (!cpu_isset(cpu_id, flush_cpumask))
68 /* This was a BUG() but until someone can quote me the line
69 * from the intel manual that guarantees an IPI to multiple
70 * CPUs is retried _only_ on the erroring CPUs its staying as a
71 * return
72 *
73 * BUG();
74 */
75 goto out;
76
77 if (flush_va == FLUSH_ALL)
78 local_flush_tlb();
79 else
80 local_flush_tlb_page(flush_mm, flush_va);
81
82 smp_mb__before_clear_bit();
83 cpu_clear(cpu_id, flush_cpumask);
84 smp_mb__after_clear_bit();
85out:
86 put_cpu();
87}
88
89/**
90 * flush_tlb_others - Tell the specified CPUs to invalidate their TLBs
91 * @cpumask: The list of CPUs to target.
92 * @mm: The VM context to flush from (if va!=FLUSH_ALL).
93 * @va: Virtual address to flush or FLUSH_ALL to flush everything.
94 */
95static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
96 unsigned long va)
97{
98 cpumask_t tmp;
99
100 /* A couple of sanity checks (to be removed):
101 * - mask must not be empty
102 * - current CPU must not be in mask
103 * - we do not send IPIs to as-yet unbooted CPUs.
104 */
105 BUG_ON(!mm);
106 BUG_ON(cpus_empty(cpumask));
107 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
108
109 cpus_and(tmp, cpumask, cpu_online_map);
110 BUG_ON(!cpus_equal(cpumask, tmp));
111
112 /* I'm not happy about this global shared spinlock in the MM hot path,
113 * but we'll see how contended it is.
114 *
115 * Temporarily this turns IRQs off, so that lockups are detected by the
116 * NMI watchdog.
117 */
118 spin_lock(&tlbstate_lock);
119
120 flush_mm = mm;
121 flush_va = va;
122#if NR_CPUS <= BITS_PER_LONG
123 atomic_set_mask(cpumask.bits[0], &flush_cpumask.bits[0]);
124#else
125#error Not supported.
126#endif
127
128 /* FIXME: if NR_CPUS>=3, change send_IPI_mask */
129 smp_call_function(smp_flush_tlb, NULL, 1);
130
131 while (!cpus_empty(flush_cpumask))
132 /* Lockup detection does not belong here */
133 smp_mb();
134
135 flush_mm = NULL;
136 flush_va = 0;
137 spin_unlock(&tlbstate_lock);
138}
139
140/**
141 * flush_tlb_mm - Invalidate TLB of specified VM context
142 * @mm: The VM context to invalidate.
143 */
144void flush_tlb_mm(struct mm_struct *mm)
145{
146 cpumask_t cpu_mask;
147
148 preempt_disable();
149 cpu_mask = mm->cpu_vm_mask;
150 cpu_clear(smp_processor_id(), cpu_mask);
151
152 local_flush_tlb();
153 if (!cpus_empty(cpu_mask))
154 flush_tlb_others(cpu_mask, mm, FLUSH_ALL);
155
156 preempt_enable();
157}
158
159/**
160 * flush_tlb_current_task - Invalidate TLB of current task
161 */
162void flush_tlb_current_task(void)
163{
164 struct mm_struct *mm = current->mm;
165 cpumask_t cpu_mask;
166
167 preempt_disable();
168 cpu_mask = mm->cpu_vm_mask;
169 cpu_clear(smp_processor_id(), cpu_mask);
170
171 local_flush_tlb();
172 if (!cpus_empty(cpu_mask))
173 flush_tlb_others(cpu_mask, mm, FLUSH_ALL);
174
175 preempt_enable();
176}
177
178/**
179 * flush_tlb_page - Invalidate TLB of page
180 * @vma: The VM context to invalidate the page for.
181 * @va: The virtual address of the page to invalidate.
182 */
183void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
184{
185 struct mm_struct *mm = vma->vm_mm;
186 cpumask_t cpu_mask;
187
188 preempt_disable();
189 cpu_mask = mm->cpu_vm_mask;
190 cpu_clear(smp_processor_id(), cpu_mask);
191
192 local_flush_tlb_page(mm, va);
193 if (!cpus_empty(cpu_mask))
194 flush_tlb_others(cpu_mask, mm, va);
195
196 preempt_enable();
197}
198
199/**
200 * do_flush_tlb_all - Callback to completely invalidate a TLB
201 * @unused: Callback context (ignored).
202 */
203static void do_flush_tlb_all(void *unused)
204{
205 local_flush_tlb_all();
206}
207
208/**
209 * flush_tlb_all - Completely invalidate TLBs on all CPUs
210 */
211void flush_tlb_all(void)
212{
213 on_each_cpu(do_flush_tlb_all, 0, 1);
214}