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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-21 17:37:27 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-21 17:37:27 -0400
commite36f561a2c88394ef2708f1ab300fe8a79e9f651 (patch)
tree385f378c4240955e4356d49686a8ef606a82a7c1 /arch/mn10300
parent70ada77920723fbc2b35e9b301022fb1e166b41b (diff)
parentdf9ee29270c11dba7d0fe0b83ce47a4d8e8d2101 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflags
* git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflags: Fix IRQ flag handling naming MIPS: Add missing #inclusions of <linux/irq.h> smc91x: Add missing #inclusion of <linux/irq.h> Drop a couple of unnecessary asm/system.h inclusions SH: Add missing consts to sys_execve() declaration Blackfin: Rename IRQ flags handling functions Blackfin: Add missing dep to asm/irqflags.h Blackfin: Rename DES PC2() symbol to avoid collision Blackfin: Split the BF532 BFIN_*_FIO_FLAG() functions to their own header Blackfin: Split PLL code from mach-specific cdef headers
Diffstat (limited to 'arch/mn10300')
-rw-r--r--arch/mn10300/include/asm/irqflags.h123
-rw-r--r--arch/mn10300/include/asm/system.h109
-rw-r--r--arch/mn10300/kernel/entry.S1
3 files changed, 125 insertions, 108 deletions
diff --git a/arch/mn10300/include/asm/irqflags.h b/arch/mn10300/include/asm/irqflags.h
new file mode 100644
index 000000000000..5e529a117cb2
--- /dev/null
+++ b/arch/mn10300/include/asm/irqflags.h
@@ -0,0 +1,123 @@
1/* MN10300 IRQ flag handling
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRQFLAGS_H
13#define _ASM_IRQFLAGS_H
14
15#include <asm/cpu-regs.h>
16
17/*
18 * interrupt control
19 * - "disabled": run in IM1/2
20 * - level 0 - GDB stub
21 * - level 1 - virtual serial DMA (if present)
22 * - level 5 - normal interrupt priority
23 * - level 6 - timer interrupt
24 * - "enabled": run in IM7
25 */
26#ifdef CONFIG_MN10300_TTYSM
27#define MN10300_CLI_LEVEL EPSW_IM_2
28#else
29#define MN10300_CLI_LEVEL EPSW_IM_1
30#endif
31
32#ifndef __ASSEMBLY__
33
34static inline unsigned long arch_local_save_flags(void)
35{
36 unsigned long flags;
37
38 asm volatile("mov epsw,%0" : "=d"(flags));
39 return flags;
40}
41
42static inline void arch_local_irq_disable(void)
43{
44 asm volatile(
45 " and %0,epsw \n"
46 " or %1,epsw \n"
47 " nop \n"
48 " nop \n"
49 " nop \n"
50 :
51 : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL)
52 : "memory");
53}
54
55static inline unsigned long arch_local_irq_save(void)
56{
57 unsigned long flags;
58
59 flags = arch_local_save_flags();
60 arch_local_irq_disable();
61 return flags;
62}
63
64/*
65 * we make sure arch_irq_enable() doesn't cause priority inversion
66 */
67extern unsigned long __mn10300_irq_enabled_epsw;
68
69static inline void arch_local_irq_enable(void)
70{
71 unsigned long tmp;
72
73 asm volatile(
74 " mov epsw,%0 \n"
75 " and %1,%0 \n"
76 " or %2,%0 \n"
77 " mov %0,epsw \n"
78 : "=&d"(tmp)
79 : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw)
80 : "memory");
81}
82
83static inline void arch_local_irq_restore(unsigned long flags)
84{
85 asm volatile(
86 " mov %0,epsw \n"
87 " nop \n"
88 " nop \n"
89 " nop \n"
90 :
91 : "d"(flags)
92 : "memory", "cc");
93}
94
95static inline bool arch_irqs_disabled_flags(unsigned long flags)
96{
97 return (flags & EPSW_IM) <= MN10300_CLI_LEVEL;
98}
99
100static inline bool arch_irqs_disabled(void)
101{
102 return arch_irqs_disabled_flags(arch_local_save_flags());
103}
104
105/*
106 * Hook to save power by halting the CPU
107 * - called from the idle loop
108 * - must reenable interrupts (which takes three instruction cycles to complete)
109 */
110static inline void arch_safe_halt(void)
111{
112 asm volatile(
113 " or %0,epsw \n"
114 " nop \n"
115 " nop \n"
116 " bset %2,(%1) \n"
117 :
118 : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)
119 : "cc");
120}
121
122#endif /* __ASSEMBLY__ */
123#endif /* _ASM_IRQFLAGS_H */
diff --git a/arch/mn10300/include/asm/system.h b/arch/mn10300/include/asm/system.h
index 3636c054dcd5..9f7c7e17c01e 100644
--- a/arch/mn10300/include/asm/system.h
+++ b/arch/mn10300/include/asm/system.h
@@ -17,6 +17,7 @@
17#ifndef __ASSEMBLY__ 17#ifndef __ASSEMBLY__
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/irqflags.h>
20 21
21struct task_struct; 22struct task_struct;
22struct thread_struct; 23struct thread_struct;
@@ -81,114 +82,6 @@ do { \
81 82
82/*****************************************************************************/ 83/*****************************************************************************/
83/* 84/*
84 * interrupt control
85 * - "disabled": run in IM1/2
86 * - level 0 - GDB stub
87 * - level 1 - virtual serial DMA (if present)
88 * - level 5 - normal interrupt priority
89 * - level 6 - timer interrupt
90 * - "enabled": run in IM7
91 */
92#ifdef CONFIG_MN10300_TTYSM
93#define MN10300_CLI_LEVEL EPSW_IM_2
94#else
95#define MN10300_CLI_LEVEL EPSW_IM_1
96#endif
97
98#define local_save_flags(x) \
99do { \
100 typecheck(unsigned long, x); \
101 asm volatile( \
102 " mov epsw,%0 \n" \
103 : "=d"(x) \
104 ); \
105} while (0)
106
107#define local_irq_disable() \
108do { \
109 asm volatile( \
110 " and %0,epsw \n" \
111 " or %1,epsw \n" \
112 " nop \n" \
113 " nop \n" \
114 " nop \n" \
115 : \
116 : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL) \
117 ); \
118} while (0)
119
120#define local_irq_save(x) \
121do { \
122 local_save_flags(x); \
123 local_irq_disable(); \
124} while (0)
125
126/*
127 * we make sure local_irq_enable() doesn't cause priority inversion
128 */
129#ifndef __ASSEMBLY__
130
131extern unsigned long __mn10300_irq_enabled_epsw;
132
133#endif
134
135#define local_irq_enable() \
136do { \
137 unsigned long tmp; \
138 \
139 asm volatile( \
140 " mov epsw,%0 \n" \
141 " and %1,%0 \n" \
142 " or %2,%0 \n" \
143 " mov %0,epsw \n" \
144 : "=&d"(tmp) \
145 : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw) \
146 : "cc" \
147 ); \
148} while (0)
149
150#define local_irq_restore(x) \
151do { \
152 typecheck(unsigned long, x); \
153 asm volatile( \
154 " mov %0,epsw \n" \
155 " nop \n" \
156 " nop \n" \
157 " nop \n" \
158 : \
159 : "d"(x) \
160 : "memory", "cc" \
161 ); \
162} while (0)
163
164#define irqs_disabled() \
165({ \
166 unsigned long flags; \
167 local_save_flags(flags); \
168 (flags & EPSW_IM) <= MN10300_CLI_LEVEL; \
169})
170
171/* hook to save power by halting the CPU
172 * - called from the idle loop
173 * - must reenable interrupts (which takes three instruction cycles to complete)
174 */
175#define safe_halt() \
176do { \
177 asm volatile(" or %0,epsw \n" \
178 " nop \n" \
179 " nop \n" \
180 " bset %2,(%1) \n" \
181 : \
182 : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)\
183 : "cc" \
184 ); \
185} while (0)
186
187#define STI or EPSW_IE|EPSW_IM,epsw
188#define CLI and ~EPSW_IM,epsw; or EPSW_IE|MN10300_CLI_LEVEL,epsw; nop; nop; nop
189
190/*****************************************************************************/
191/*
192 * MN10300 doesn't actually have an exchange instruction 85 * MN10300 doesn't actually have an exchange instruction
193 */ 86 */
194#ifndef __ASSEMBLY__ 87#ifndef __ASSEMBLY__
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index d9ed5a15c547..3d394b4eefba 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -16,6 +16,7 @@
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17#include <asm/smp.h> 17#include <asm/smp.h>
18#include <asm/system.h> 18#include <asm/system.h>
19#include <asm/irqflags.h>
19#include <asm/thread_info.h> 20#include <asm/thread_info.h>
20#include <asm/intctl-regs.h> 21#include <asm/intctl-regs.h>
21#include <asm/busctl-regs.h> 22#include <asm/busctl-regs.h>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-06 03:57:29 -0500