MN10300: And Panasonic AM34 subarch and implement SMP

Implement the Panasonic MN10300 AM34 CPU subarch and implement SMP support for
MN10300.  Also implement support for the MN2WS0060 processor and the ASB2364
evaluation board which are AM34 based.

Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>

5 files changed, 56 insertions, 48 deletions

diff --git a/arch/mn10300/unit-asb2305/include/unit/clock.h b/arch/mn10300/unit-asb2305/include/unit/clock.h
index 67be3f2eb18e..29e3425431cf 100644
--- a/arch/mn10300/unit-asb2305/include/unit/clock.h
+++ b/arch/mn10300/unit-asb2305/include/unit/clock.h
@@ -14,32 +14,11 @@
 
 #ifndef __ASSEMBLY__
 
-#ifdef CONFIG_MN10300_RTC
-
-extern unsigned long mn10300_ioclk;     /* IOCLK (crystal speed) in HZ */
-extern unsigned long mn10300_iobclk;
-extern unsigned long mn10300_tsc_per_HZ;
-
-#define MN10300_IOCLK           mn10300_ioclk
-/* If this processors has a another clock, uncomment the below. */
-/* #define MN10300_IOBCLK       mn10300_iobclk */
-
-#else /* !CONFIG_MN10300_RTC */
-
 #define MN10300_IOCLK           33333333UL
 /* #define MN10300_IOBCLK       66666666UL */
 
-#endif /* !CONFIG_MN10300_RTC */
-
-#define MN10300_JCCLK           MN10300_IOCLK
-#define MN10300_TSCCLK          MN10300_IOCLK
-
-#ifdef CONFIG_MN10300_RTC
-#define MN10300_TSC_PER_HZ      mn10300_tsc_per_HZ
-#else /* !CONFIG_MN10300_RTC */
-#define MN10300_TSC_PER_HZ      (MN10300_TSCCLK/HZ)
-#endif /* !CONFIG_MN10300_RTC */
-
 #endif /* !__ASSEMBLY__ */
 
+#define MN10300_WDCLK           MN10300_IOCLK
+
 #endif /* _ASM_UNIT_CLOCK_H */
diff --git a/arch/mn10300/unit-asb2305/include/unit/serial.h b/arch/mn10300/unit-asb2305/include/unit/serial.h
index 8086cc092cec..88c08219315f 100644
--- a/arch/mn10300/unit-asb2305/include/unit/serial.h
+++ b/arch/mn10300/unit-asb2305/include/unit/serial.h
@@ -21,6 +21,11 @@
 #define SERIAL_IRQ      XIRQ0   /* Dual serial (PC16552)        (Hi) */
 
 /*
+ * The ASB2305 has an 18.432 MHz clock the UART
+ */
+#define BASE_BAUD       (18432000 / 16)
+
+/*
  * dispose of the /dev/ttyS0 serial port
  */
 #ifndef CONFIG_GDBSTUB_ON_TTYSx
diff --git a/arch/mn10300/unit-asb2305/include/unit/timex.h b/arch/mn10300/unit-asb2305/include/unit/timex.h
index 0860186eedb2..cd8bc14e3ca3 100644
--- a/arch/mn10300/unit-asb2305/include/unit/timex.h
+++ b/arch/mn10300/unit-asb2305/include/unit/timex.h
@@ -1,4 +1,4 @@
-/* ASB2305 timer specifcations
+/* ASB2305-specific timer specifications
  *
  * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  * Written by David Howells (dhowells@redhat.com)
@@ -17,6 +17,7 @@
 
 #include <asm/timer-regs.h>
 #include <unit/clock.h>
+#include <asm/param.h>
 
 /*
  * jiffies counter specifications
@@ -29,32 +30,43 @@
 #define TMJCBR                  TM01BR
 #define TMJCIRQ                 TM1IRQ
 #define TMJCICR                 TM1ICR
-#define TMJCICR_LEVEL           GxICR_LEVEL_5
 
 #ifndef __ASSEMBLY__
 
+#define MN10300_SRC_IOCLK       MN10300_IOCLK
+
+#ifndef HZ
+# error HZ undeclared.
+#endif /* !HZ */
+/* use as little prescaling as possible to avoid losing accuracy */
+#if (MN10300_SRC_IOCLK + HZ / 2) / HZ - 1 <= TMJCBR_MAX
+# define IOCLK_PRESCALE         1
+# define JC_TIMER_CLKSRC        TM0MD_SRC_IOCLK
+# define TSC_TIMER_CLKSRC       TM4MD_SRC_IOCLK
+#elif (MN10300_SRC_IOCLK / 8 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
+# define IOCLK_PRESCALE         8
+# define JC_TIMER_CLKSRC        TM0MD_SRC_IOCLK_8
+# define TSC_TIMER_CLKSRC       TM4MD_SRC_IOCLK_8
+#elif (MN10300_SRC_IOCLK / 32 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
+# define IOCLK_PRESCALE         32
+# define JC_TIMER_CLKSRC        TM0MD_SRC_IOCLK_32
+# define TSC_TIMER_CLKSRC       TM4MD_SRC_IOCLK_32
+#else
+# error You lose.
+#endif
+
+#define MN10300_JCCLK           (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
+#define MN10300_TSCCLK          (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
+
+#define MN10300_JC_PER_HZ       ((MN10300_JCCLK + HZ / 2) / HZ)
+#define MN10300_TSC_PER_HZ      ((MN10300_TSCCLK + HZ / 2) / HZ)
+
 static inline void startup_jiffies_counter(void)
 {
-        unsigned rate;
         u16 md, t16;
 
-        /* use as little prescaling as possible to avoid losing accuracy */
-        md = TM0MD_SRC_IOCLK;
-        rate = MN10300_JCCLK / HZ;
-
-        if (rate > TMJCBR_MAX) {
-                md = TM0MD_SRC_IOCLK_8;
-                rate = MN10300_JCCLK / 8 / HZ;
-
-                if (rate > TMJCBR_MAX) {
-                        md = TM0MD_SRC_IOCLK_32;
-                        rate = MN10300_JCCLK / 32 / HZ;
-
-                        BUG_ON(rate > TMJCBR_MAX);
-                }
-        }
-
-        TMJCBR = rate - 1;
+        md = JC_TIMER_CLKSRC;
+        TMJCBR = MN10300_JC_PER_HZ - 1;
         t16 = TMJCBR;
 
         TMJCMD =
@@ -93,29 +105,39 @@ static inline void shutdown_jiffies_counter(void)
 
 static inline void startup_timestamp_counter(void)
 {
+        u32 t32;
+
         /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
          * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
          */
         TM45BR = TMTSCBR_MAX;
+        t32 = TM45BR;
 
-        TM4MD = TM4MD_SRC_IOCLK;
+        TM4MD = TSC_TIMER_CLKSRC;
         TM4MD |= TM4MD_INIT_COUNTER;
         TM4MD &= ~TM4MD_INIT_COUNTER;
         TM4ICR = 0;
+        t32 = TM4ICR;
 
         TM5MD = TM5MD_SRC_TM4CASCADE;
         TM5MD |= TM5MD_INIT_COUNTER;
         TM5MD &= ~TM5MD_INIT_COUNTER;
         TM5ICR = 0;
+        t32 = TM5ICR;
 
         TM5MD |= TM5MD_COUNT_ENABLE;
         TM4MD |= TM4MD_COUNT_ENABLE;
+        t32 = TM5MD;
+        t32 = TM4MD;
 }
 
 static inline void shutdown_timestamp_counter(void)
 {
+        u8 t8;
         TM4MD = 0;
         TM5MD = 0;
+        t8 = TM4MD;
+        t8 = TM5MD;
 }
 
 /*
@@ -126,7 +148,7 @@ typedef unsigned long cycles_t;
 
 static inline cycles_t read_timestamp_counter(void)
 {
-        return (cycles_t) TMTSCBC;
+        return (cycles_t)TMTSCBC;
 }
 
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c
index 6d8720a0a599..a4954fe82094 100644
--- a/arch/mn10300/unit-asb2305/pci.c
+++ b/arch/mn10300/unit-asb2305/pci.c
@@ -503,7 +503,7 @@ asmlinkage void __init unit_pci_init(void)
         struct pci_ops *o = &pci_direct_ampci;
         u32 x;
 
-        set_intr_level(XIRQ1, GxICR_LEVEL_3);
+        set_intr_level(XIRQ1, NUM2GxICR_LEVEL(CONFIG_PCI_IRQ_LEVEL));
 
         memset(&bus, 0, sizeof(bus));
 
diff --git a/arch/mn10300/unit-asb2305/unit-init.c b/arch/mn10300/unit-asb2305/unit-init.c
index a76c8e0ab90f..e1becd6b7571 100644
--- a/arch/mn10300/unit-asb2305/unit-init.c
+++ b/arch/mn10300/unit-asb2305/unit-init.c
@@ -26,8 +26,10 @@ asmlinkage void __init unit_init(void)
 {
 #ifndef CONFIG_GDBSTUB_ON_TTYSx
         /* set the 16550 interrupt line to level 3 if not being used for GDB */
-        set_intr_level(XIRQ0, GxICR_LEVEL_3);
+#ifdef CONFIG_EXT_SERIAL_IRQ_LEVEL
+        set_intr_level(XIRQ0, NUM2GxICR_LEVEL(CONFIG_EXT_SERIAL_IRQ_LEVEL));
 #endif
+#endif /* CONFIG_GDBSTUB_ON_TTYSx */
 }
 
 /*
@@ -51,7 +53,7 @@ void __init unit_init_IRQ(void)
                 switch (GET_XIRQ_TRIGGER(extnum)) {
                 case XIRQ_TRIGGER_HILEVEL:
                 case XIRQ_TRIGGER_LOWLEVEL:
-                        set_intr_postackable(XIRQ2IRQ(extnum));
+                        mn10300_set_lateack_irq_type(XIRQ2IRQ(extnum));
                         break;
                 default:
                         break;