Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300

* git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300: (44 commits)
  MN10300: Save frame pointer in thread_info struct rather than global var
  MN10300: Change "Matsushita" to "Panasonic".
  MN10300: Create a defconfig for the ASB2364 board
  MN10300: Update the ASB2303 defconfig
  MN10300: ASB2364: Add support for SMSC911X and SMC911X
  MN10300: ASB2364: Handle the IRQ multiplexer in the FPGA
  MN10300: Generic time support
  MN10300: Specify an ELF HWCAP flag for MN10300 Atomic Operations Unit support
  MN10300: Map userspace atomic op regs as a vmalloc page
  MN10300: And Panasonic AM34 subarch and implement SMP
  MN10300: Delete idle_timestamp from irq_cpustat_t
  MN10300: Make various interrupt priority settings configurable
  MN10300: Optimise do_csum()
  MN10300: Implement atomic ops using atomic ops unit
  MN10300: Make the FPU operate in non-lazy mode under SMP
  MN10300: SMP TLB flushing
  MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control
  MN10300: Make the use of PIDR to mark TLB entries controllable
  MN10300: Rename __flush_tlb*() to local_flush_tlb*()
  MN10300: AM34 erratum requires MMUCTR read and write on exception entry
  ...

1 files changed, 11 insertions, 30 deletions

diff --git a/arch/mn10300/mm/mmu-context.c b/arch/mn10300/mm/mmu-context.c
index 36ba02191d40..a4f7d3dcc6e6 100644
--- a/arch/mn10300/mm/mmu-context.c
+++ b/arch/mn10300/mm/mmu-context.c
@@ -13,40 +13,15 @@
 #include <asm/mmu_context.h>
 #include <asm/tlbflush.h>
 
+#ifdef CONFIG_MN10300_TLB_USE_PIDR
 /*
  * list of the MMU contexts last allocated on each CPU
  */
 unsigned long mmu_context_cache[NR_CPUS] = {
-        [0 ... NR_CPUS - 1] = MMU_CONTEXT_FIRST_VERSION * 2 - 1,
+        [0 ... NR_CPUS - 1] =
+        MMU_CONTEXT_FIRST_VERSION * 2 - (1 - MMU_CONTEXT_TLBPID_LOCK_NR),
 };
-
-/*
- * flush the specified TLB entry
- */
-void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
-{
-        unsigned long pteu, cnx, flags;
-
-        addr &= PAGE_MASK;
-
-        /* make sure the context doesn't migrate and defend against
-         * interference from vmalloc'd regions */
-        local_irq_save(flags);
-
-        cnx = mm_context(vma->vm_mm);
-
-        if (cnx != MMU_NO_CONTEXT) {
-                pteu = addr | (cnx & 0x000000ffUL);
-                IPTEU = pteu;
-                DPTEU = pteu;
-                if (IPTEL & xPTEL_V)
-                        IPTEL = 0;
-                if (DPTEL & xPTEL_V)
-                        DPTEL = 0;
-        }
-
-        local_irq_restore(flags);
-}
+#endif /* CONFIG_MN10300_TLB_USE_PIDR */
 
 /*
  * preemptively set a TLB entry
@@ -63,10 +38,16 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t *pte
          * interference from vmalloc'd regions */
         local_irq_save(flags);
 
+        cnx = ~MMU_NO_CONTEXT;
+#ifdef CONFIG_MN10300_TLB_USE_PIDR
         cnx = mm_context(vma->vm_mm);
+#endif
 
         if (cnx != MMU_NO_CONTEXT) {
-                pteu = addr | (cnx & 0x000000ffUL);
+                pteu = addr;
+#ifdef CONFIG_MN10300_TLB_USE_PIDR
+                pteu |= cnx & MMU_CONTEXT_TLBPID_MASK;
+#endif
                 if (!(pte_val(pte) & _PAGE_NX)) {
                         IPTEU = pteu;
                         if (IPTEL & xPTEL_V)