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authorDavid Howells <dhowells@redhat.com>2008-02-08 07:19:31 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-08 12:22:30 -0500
commitb920de1b77b72ca9432ac3f97edb26541e65e5dd (patch)
tree40fa9be1470e929c47927dea7eddf184c0204229 /arch/mn10300/lib/__lshrdi3.S
parentef3d534754f31fed9c3b976fee1ece1b3bc38282 (diff)
mn10300: add the MN10300/AM33 architecture to the kernel
Add architecture support for the MN10300/AM33 CPUs produced by MEI to the kernel. This patch also adds board support for the ASB2303 with the ASB2308 daughter board, and the ASB2305. The only processor supported is the MN103E010, which is an AM33v2 core plus on-chip devices. [akpm@linux-foundation.org: nuke cvs control strings] Signed-off-by: Masakazu Urade <urade.masakazu@jp.panasonic.com> Signed-off-by: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/mn10300/lib/__lshrdi3.S')
-rw-r--r--arch/mn10300/lib/__lshrdi3.S52
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/mn10300/lib/__lshrdi3.S b/arch/mn10300/lib/__lshrdi3.S
new file mode 100644
index 000000000000..a686aef31e90
--- /dev/null
+++ b/arch/mn10300/lib/__lshrdi3.S
@@ -0,0 +1,52 @@
1/* MN10300 64-bit logical right shift
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <asm/cache.h>
13
14 .text
15 .balign L1_CACHE_BYTES
16
17###############################################################################
18#
19# unsigned long long __lshrdi3(unsigned long long value [D1:D0],
20# unsigned by [(12,SP)])
21#
22###############################################################################
23 .globl __lshrdi3
24 .type __lshrdi3,@function
25__lshrdi3:
26 mov (12,sp),a0
27 and +63,a0
28 beq __lshrdi3_zero
29
30 cmp +31,a0
31 bhi __lshrdi3_32plus
32
33 # the count is in the range 1-31
34 lsr a0,d0
35
36 mov +32,a1
37 sub a0,a1,a1 # a1 = 32 - count
38 asl a1,d1,a1 # get underflow from MSW -> LSW
39
40 or_lsr a1,d0,a0,d1 # insert underflow into LSW and
41 # shift the MSW
42 rets
43
44 .balign L1_CACHE_BYTES
45 # the count is in the range 32-63
46__lshrdi3_32plus:
47 lsr a0,d1,d0
48 clr d1
49__lshrdi3_zero:
50 rets
51
52 .size __lshrdi3, .-__lshrdi3