diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-27 21:53:26 -0400 | 
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-27 21:53:26 -0400 | 
| commit | bdab225015fbbb45ccd8913f5d7c01b2bf67d8b2 (patch) | |
| tree | 5ef62301face958977a084bf2b6c5300296a25f2 /arch/mn10300/kernel/rtc.c | |
| parent | 7c5814c7199851c5fe9395d08fc1ab3c8c1531ea (diff) | |
| parent | 7c7fcf762e405eb040ee10d22d656a791f616122 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300
* git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300: (44 commits)
  MN10300: Save frame pointer in thread_info struct rather than global var
  MN10300: Change "Matsushita" to "Panasonic".
  MN10300: Create a defconfig for the ASB2364 board
  MN10300: Update the ASB2303 defconfig
  MN10300: ASB2364: Add support for SMSC911X and SMC911X
  MN10300: ASB2364: Handle the IRQ multiplexer in the FPGA
  MN10300: Generic time support
  MN10300: Specify an ELF HWCAP flag for MN10300 Atomic Operations Unit support
  MN10300: Map userspace atomic op regs as a vmalloc page
  MN10300: And Panasonic AM34 subarch and implement SMP
  MN10300: Delete idle_timestamp from irq_cpustat_t
  MN10300: Make various interrupt priority settings configurable
  MN10300: Optimise do_csum()
  MN10300: Implement atomic ops using atomic ops unit
  MN10300: Make the FPU operate in non-lazy mode under SMP
  MN10300: SMP TLB flushing
  MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control
  MN10300: Make the use of PIDR to mark TLB entries controllable
  MN10300: Rename __flush_tlb*() to local_flush_tlb*()
  MN10300: AM34 erratum requires MMUCTR read and write on exception entry
  ...
Diffstat (limited to 'arch/mn10300/kernel/rtc.c')
| -rw-r--r-- | arch/mn10300/kernel/rtc.c | 41 | 
1 files changed, 10 insertions, 31 deletions
diff --git a/arch/mn10300/kernel/rtc.c b/arch/mn10300/kernel/rtc.c index 4eef0e7224f6..e9e20f9a4dd3 100644 --- a/arch/mn10300/kernel/rtc.c +++ b/arch/mn10300/kernel/rtc.c  | |||
| @@ -20,18 +20,22 @@ | |||
| 20 | DEFINE_SPINLOCK(rtc_lock); | 20 | DEFINE_SPINLOCK(rtc_lock); | 
| 21 | EXPORT_SYMBOL(rtc_lock); | 21 | EXPORT_SYMBOL(rtc_lock); | 
| 22 | 22 | ||
| 23 | /* time for RTC to update itself in ioclks */ | 23 | /* | 
| 24 | static unsigned long mn10300_rtc_update_period; | 24 | * Read the current RTC time | 
| 25 | 25 | */ | |
| 26 | void read_persistent_clock(struct timespec *ts) | 26 | void read_persistent_clock(struct timespec *ts) | 
| 27 | { | 27 | { | 
| 28 | struct rtc_time tm; | 28 | struct rtc_time tm; | 
| 29 | 29 | ||
| 30 | get_rtc_time(&tm); | 30 | get_rtc_time(&tm); | 
| 31 | 31 | ||
| 32 | ts->tv_sec = mktime(tm.tm_year, tm.tm_mon, tm.tm_mday, | ||
| 33 | tm.tm_hour, tm.tm_min, tm.tm_sec); | ||
| 34 | ts->tv_nsec = 0; | 32 | ts->tv_nsec = 0; | 
| 33 | ts->tv_sec = mktime(tm.tm_year, tm.tm_mon, tm.tm_mday, | ||
| 34 | tm.tm_hour, tm.tm_min, tm.tm_sec); | ||
| 35 | |||
| 36 | /* if rtc is way off in the past, set something reasonable */ | ||
| 37 | if (ts->tv_sec < 0) | ||
| 38 | ts->tv_sec = mktime(2009, 1, 1, 12, 0, 0); | ||
| 35 | } | 39 | } | 
| 36 | 40 | ||
| 37 | /* | 41 | /* | 
| @@ -115,39 +119,14 @@ int update_persistent_clock(struct timespec now) | |||
| 115 | */ | 119 | */ | 
| 116 | void __init calibrate_clock(void) | 120 | void __init calibrate_clock(void) | 
| 117 | { | 121 | { | 
| 118 | unsigned long count0, counth, count1; | ||
| 119 | unsigned char status; | 122 | unsigned char status; | 
| 120 | 123 | ||
| 121 | /* make sure the RTC is running and is set to operate in 24hr mode */ | 124 | /* make sure the RTC is running and is set to operate in 24hr mode */ | 
| 122 | status = RTSRC; | 125 | status = RTSRC; | 
| 123 | RTCRB |= RTCRB_SET; | 126 | RTCRB |= RTCRB_SET; | 
| 124 | RTCRB |= RTCRB_TM_24HR; | 127 | RTCRB |= RTCRB_TM_24HR; | 
| 128 | RTCRB &= ~RTCRB_DM_BINARY; | ||
| 125 | RTCRA |= RTCRA_DVR; | 129 | RTCRA |= RTCRA_DVR; | 
| 126 | RTCRA &= ~RTCRA_DVR; | 130 | RTCRA &= ~RTCRA_DVR; | 
| 127 | RTCRB &= ~RTCRB_SET; | 131 | RTCRB &= ~RTCRB_SET; | 
| 128 | |||
| 129 | /* work out the clock speed by counting clock cycles between ends of | ||
| 130 | * the RTC update cycle - track the RTC through one complete update | ||
| 131 | * cycle (1 second) | ||
| 132 | */ | ||
| 133 | startup_timestamp_counter(); | ||
| 134 | |||
| 135 | while (!(RTCRA & RTCRA_UIP)) {} | ||
| 136 | while ((RTCRA & RTCRA_UIP)) {} | ||
| 137 | |||
| 138 | count0 = TMTSCBC; | ||
| 139 | |||
| 140 | while (!(RTCRA & RTCRA_UIP)) {} | ||
| 141 | |||
| 142 | counth = TMTSCBC; | ||
| 143 | |||
| 144 | while ((RTCRA & RTCRA_UIP)) {} | ||
| 145 | |||
| 146 | count1 = TMTSCBC; | ||
| 147 | |||
| 148 | shutdown_timestamp_counter(); | ||
| 149 | |||
| 150 | MN10300_TSCCLK = count0 - count1; /* the timers count down */ | ||
| 151 | mn10300_rtc_update_period = counth - count1; | ||
| 152 | MN10300_TSC_PER_HZ = MN10300_TSCCLK / HZ; | ||
| 153 | } | 132 | } | 
