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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-27 21:53:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-27 21:53:26 -0400
commitbdab225015fbbb45ccd8913f5d7c01b2bf67d8b2 (patch)
tree5ef62301face958977a084bf2b6c5300296a25f2 /arch/mn10300/kernel/mn10300-serial-low.S
parent7c5814c7199851c5fe9395d08fc1ab3c8c1531ea (diff)
parent7c7fcf762e405eb040ee10d22d656a791f616122 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300
* git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300: (44 commits) MN10300: Save frame pointer in thread_info struct rather than global var MN10300: Change "Matsushita" to "Panasonic". MN10300: Create a defconfig for the ASB2364 board MN10300: Update the ASB2303 defconfig MN10300: ASB2364: Add support for SMSC911X and SMC911X MN10300: ASB2364: Handle the IRQ multiplexer in the FPGA MN10300: Generic time support MN10300: Specify an ELF HWCAP flag for MN10300 Atomic Operations Unit support MN10300: Map userspace atomic op regs as a vmalloc page MN10300: And Panasonic AM34 subarch and implement SMP MN10300: Delete idle_timestamp from irq_cpustat_t MN10300: Make various interrupt priority settings configurable MN10300: Optimise do_csum() MN10300: Implement atomic ops using atomic ops unit MN10300: Make the FPU operate in non-lazy mode under SMP MN10300: SMP TLB flushing MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control MN10300: Make the use of PIDR to mark TLB entries controllable MN10300: Rename __flush_tlb*() to local_flush_tlb*() MN10300: AM34 erratum requires MMUCTR read and write on exception entry ...
Diffstat (limited to 'arch/mn10300/kernel/mn10300-serial-low.S')
-rw-r--r--arch/mn10300/kernel/mn10300-serial-low.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mn10300/kernel/mn10300-serial-low.S b/arch/mn10300/kernel/mn10300-serial-low.S
index 66702d256610..dfc1b6f2fa9a 100644
--- a/arch/mn10300/kernel/mn10300-serial-low.S
+++ b/arch/mn10300/kernel/mn10300-serial-low.S
@@ -39,7 +39,7 @@
39############################################################################### 39###############################################################################
40 .balign L1_CACHE_BYTES 40 .balign L1_CACHE_BYTES
41ENTRY(mn10300_serial_vdma_interrupt) 41ENTRY(mn10300_serial_vdma_interrupt)
42 or EPSW_IE,psw # permit overriding by 42# or EPSW_IE,psw # permit overriding by
43 # debugging interrupts 43 # debugging interrupts
44 movm [d2,d3,a2,a3,exreg0],(sp) 44 movm [d2,d3,a2,a3,exreg0],(sp)
45 45
@@ -164,7 +164,7 @@ mnsc_vdma_tx_noint:
164 rti 164 rti
165 165
166mnsc_vdma_tx_empty: 166mnsc_vdma_tx_empty:
167 mov +(GxICR_LEVEL_1|GxICR_DETECT),d2 167 mov +(NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL)|GxICR_DETECT),d2
168 movhu d2,(e3) # disable the interrupt 168 movhu d2,(e3) # disable the interrupt
169 movhu (e3),d2 # flush 169 movhu (e3),d2 # flush
170 170
@@ -175,7 +175,7 @@ mnsc_vdma_tx_break:
175 movhu (SCxCTR,e2),d2 # turn on break mode 175 movhu (SCxCTR,e2),d2 # turn on break mode
176 or SC01CTR_BKE,d2 176 or SC01CTR_BKE,d2
177 movhu d2,(SCxCTR,e2) 177 movhu d2,(SCxCTR,e2)
178 mov +(GxICR_LEVEL_1|GxICR_DETECT),d2 178 mov +(NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL)|GxICR_DETECT),d2
179 movhu d2,(e3) # disable transmit interrupts on this 179 movhu d2,(e3) # disable transmit interrupts on this
180 # channel 180 # channel
181 movhu (e3),d2 # flush 181 movhu (e3),d2 # flush