mn10300: add the MN10300/AM33 architecture to the kernel

Add architecture support for the MN10300/AM33 CPUs produced by MEI to the
kernel.

This patch also adds board support for the ASB2303 with the ASB2308 daughter
board, and the ASB2305.  The only processor supported is the MN103E010, which
is an AM33v2 core plus on-chip devices.

[akpm@linux-foundation.org: nuke cvs control strings]
Signed-off-by: Masakazu Urade <urade.masakazu@jp.panasonic.com>
Signed-off-by: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

1 files changed, 105 insertions, 0 deletions

diff --git a/arch/mn10300/kernel/gdb-cache.S b/arch/mn10300/kernel/gdb-cache.S
new file mode 100644
index 000000000000..1108badc3d32
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-cache.S
@@ -0,0 +1,105 @@
+###############################################################################
+#
+# MN10300 Low-level cache purging routines for gdbstub
+#
+# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+# Written by David Howells (dhowells@redhat.com)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public Licence
+# as published by the Free Software Foundation; either version
+# 2 of the Licence, or (at your option) any later version.
+#
+###############################################################################
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/smp.h>
+#include <asm/cache.h>
+#include <asm/cpu-regs.h>
+#include <asm/exceptions.h>
+#include <asm/frame.inc>
+#include <asm/serial-regs.h>
+
+        .text
+
+###############################################################################
+#
+# GDB stub cache purge
+#
+###############################################################################
+        .type   gdbstub_purge_cache,@function
+ENTRY(gdbstub_purge_cache)
+        #######################################################################
+        # read the addresses tagged in the cache's tag RAM and attempt to flush
+        # those addresses specifically
+        # - we rely on the hardware to filter out invalid tag entry addresses
+        mov     DCACHE_TAG(0,0),a0              # dcache tag RAM access address
+        mov     DCACHE_PURGE(0,0),a1            # dcache purge request address
+        mov     L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1  # total number of entries
+
+mn10300_dcache_flush_loop:
+        mov     (a0),d0
+        and     L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0
+        or      L1_CACHE_TAG_VALID,d0           # retain valid entries in the
+                                                # cache
+        mov     d0,(a1)                         # conditional purge
+
+mn10300_dcache_flush_skip:
+        add     L1_CACHE_BYTES,a0
+        add     L1_CACHE_BYTES,a1
+        add     -1,d1
+        bne     mn10300_dcache_flush_loop
+
+;;      # unconditionally flush and invalidate the dcache
+;;      mov     DCACHE_PURGE(0,0),a1            # dcache purge request address
+;;      mov     L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1     # total number of
+;;                                                      # entries
+;;
+;; gdbstub_purge_cache__dcache_loop:
+;;      mov     (a1),d0                         # unconditional purge
+;;
+;;      add     L1_CACHE_BYTES,a1
+;;      add     -1,d1
+;;      bne     gdbstub_purge_cache__dcache_loop
+
+        #######################################################################
+        # now invalidate the icache
+        mov     CHCTR,a0
+        movhu   (a0),a1
+
+        mov     epsw,d1
+        and     ~EPSW_IE,epsw
+        nop
+        nop
+
+        # disable the icache
+        and     ~CHCTR_ICEN,d0
+        movhu   d0,(a0)
+
+        # and wait for it to calm down
+        setlb
+        movhu   (a0),d0
+        btst    CHCTR_ICBUSY,d0
+        lne
+
+        # invalidate
+        or      CHCTR_ICINV,d0
+        movhu   d0,(a0)
+
+        # wait for the cache to finish
+        mov     CHCTR,a0
+        setlb
+        movhu   (a0),d0
+        btst    CHCTR_ICBUSY,d0
+        lne
+
+        # and reenable it
+        movhu   a1,(a0)
+        movhu   (a0),d0                 # read back to flush
+                                        # (SIGILLs all over without this)
+
+        mov     d1,epsw
+
+        ret     [],0
+
+        .size   gdbstub_purge_cache,.-gdbstub_purge_cache