diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-24 13:07:50 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-24 13:07:50 -0400 |
commit | 3dab04e6978e358ad2307bca563fabd6c5d2c58b (patch) | |
tree | 893e9bc5041e7f722722fe13a3b145396f2554d8 /arch/mn10300/include/asm/smp.h | |
parent | 6d1e9a42e7176bbce9348274784b2e5f69223936 (diff) | |
parent | 5a4b65ab506398ba5a35c37e06edddd387cc0add (diff) |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300:
MN10300: gcc 4.6 vs am33 inline assembly
MN10300: Deprecate gdbstub
MN10300: Allow KGDB to use the MN10300 serial ports
MN10300: Emulate single stepping in KGDB on MN10300
MN10300: Generalise kernel debugger kernel halt, reboot or power off hook
KGDB: Notify GDB of machine halt, reboot or power off
MN10300: Use KGDB
MN10300: Create generic kernel debugger hooks
MN10300: Create general kernel debugger cache flushing
MN10300: Introduce a general config option for kernel debugger hooks
MN10300: The icache invalidate functions should disable the icache first
MN10300: gdbstub: Restrict single-stepping to non-preemptable non-SMP configs
Diffstat (limited to 'arch/mn10300/include/asm/smp.h')
-rw-r--r-- | arch/mn10300/include/asm/smp.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/mn10300/include/asm/smp.h b/arch/mn10300/include/asm/smp.h index a3930e43a958..6745dbe64944 100644 --- a/arch/mn10300/include/asm/smp.h +++ b/arch/mn10300/include/asm/smp.h | |||
@@ -34,7 +34,7 @@ | |||
34 | #define LOCAL_TIMER_IPI 193 | 34 | #define LOCAL_TIMER_IPI 193 |
35 | #define FLUSH_CACHE_IPI 194 | 35 | #define FLUSH_CACHE_IPI 194 |
36 | #define CALL_FUNCTION_NMI_IPI 195 | 36 | #define CALL_FUNCTION_NMI_IPI 195 |
37 | #define GDB_NMI_IPI 196 | 37 | #define DEBUGGER_NMI_IPI 196 |
38 | 38 | ||
39 | #define SMP_BOOT_IRQ 195 | 39 | #define SMP_BOOT_IRQ 195 |
40 | 40 | ||
@@ -43,6 +43,7 @@ | |||
43 | #define LOCAL_TIMER_GxICR_LV GxICR_LEVEL_4 | 43 | #define LOCAL_TIMER_GxICR_LV GxICR_LEVEL_4 |
44 | #define FLUSH_CACHE_GxICR_LV GxICR_LEVEL_0 | 44 | #define FLUSH_CACHE_GxICR_LV GxICR_LEVEL_0 |
45 | #define SMP_BOOT_GxICR_LV GxICR_LEVEL_0 | 45 | #define SMP_BOOT_GxICR_LV GxICR_LEVEL_0 |
46 | #define DEBUGGER_GxICR_LV CONFIG_DEBUGGER_IRQ_LEVEL | ||
46 | 47 | ||
47 | #define TIME_OUT_COUNT_BOOT_IPI 100 | 48 | #define TIME_OUT_COUNT_BOOT_IPI 100 |
48 | #define DELAY_TIME_BOOT_IPI 75000 | 49 | #define DELAY_TIME_BOOT_IPI 75000 |
@@ -61,8 +62,9 @@ | |||
61 | * An alternate way of dealing with this could be to use the EPSW.S bits to | 62 | * An alternate way of dealing with this could be to use the EPSW.S bits to |
62 | * cache this information for systems with up to four CPUs. | 63 | * cache this information for systems with up to four CPUs. |
63 | */ | 64 | */ |
65 | #define arch_smp_processor_id() (CPUID) | ||
64 | #if 0 | 66 | #if 0 |
65 | #define raw_smp_processor_id() (CPUID) | 67 | #define raw_smp_processor_id() (arch_smp_processor_id()) |
66 | #else | 68 | #else |
67 | #define raw_smp_processor_id() (current_thread_info()->cpu) | 69 | #define raw_smp_processor_id() (current_thread_info()->cpu) |
68 | #endif | 70 | #endif |