diff options
author | Akira Takeuchi <takeuchi.akr@jp.panasonic.com> | 2010-10-27 12:28:49 -0400 |
---|---|---|
committer | David Howells <dhowells@redhat.com> | 2010-10-27 12:28:49 -0400 |
commit | a9bc60ebfd5766ce5f6095d0fed3d9978990122f (patch) | |
tree | d6044bbb56bbb06fb6f13fab9f079a20938d0960 /arch/mn10300/include/asm/mmu_context.h | |
parent | 492e675116003b99dfcf0fa70084027e86bc0161 (diff) |
MN10300: Make the use of PIDR to mark TLB entries controllable
Make controllable the use of the PIDR register to mark TLB entries as belonging
to particular processes.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/mn10300/include/asm/mmu_context.h')
-rw-r--r-- | arch/mn10300/include/asm/mmu_context.h | 59 |
1 files changed, 30 insertions, 29 deletions
diff --git a/arch/mn10300/include/asm/mmu_context.h b/arch/mn10300/include/asm/mmu_context.h index 24d63f0f7377..5fb3648968ae 100644 --- a/arch/mn10300/include/asm/mmu_context.h +++ b/arch/mn10300/include/asm/mmu_context.h | |||
@@ -27,28 +27,22 @@ | |||
27 | #include <asm/tlbflush.h> | 27 | #include <asm/tlbflush.h> |
28 | #include <asm-generic/mm_hooks.h> | 28 | #include <asm-generic/mm_hooks.h> |
29 | 29 | ||
30 | #define MMU_CONTEXT_TLBPID_NR 256 | ||
30 | #define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL | 31 | #define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL |
31 | #define MMU_CONTEXT_VERSION_MASK 0xffffff00UL | 32 | #define MMU_CONTEXT_VERSION_MASK 0xffffff00UL |
32 | #define MMU_CONTEXT_FIRST_VERSION 0x00000100UL | 33 | #define MMU_CONTEXT_FIRST_VERSION 0x00000100UL |
33 | #define MMU_NO_CONTEXT 0x00000000UL | 34 | #define MMU_NO_CONTEXT 0x00000000UL |
34 | 35 | #define MMU_CONTEXT_TLBPID_LOCK_NR 0 | |
35 | extern unsigned long mmu_context_cache[NR_CPUS]; | ||
36 | #define mm_context(mm) (mm->context.tlbpid[smp_processor_id()]) | ||
37 | 36 | ||
38 | #define enter_lazy_tlb(mm, tsk) do {} while (0) | 37 | #define enter_lazy_tlb(mm, tsk) do {} while (0) |
39 | 38 | ||
40 | #ifdef CONFIG_SMP | 39 | #ifdef CONFIG_MN10300_TLB_USE_PIDR |
41 | #define cpu_ran_vm(cpu, mm) \ | 40 | extern unsigned long mmu_context_cache[NR_CPUS]; |
42 | cpumask_set_cpu((cpu), mm_cpumask(mm)) | 41 | #define mm_context(mm) (mm->context.tlbpid[smp_processor_id()]) |
43 | #define cpu_maybe_ran_vm(cpu, mm) \ | ||
44 | cpumask_test_and_set_cpu((cpu), mm_cpumask(mm)) | ||
45 | #else | ||
46 | #define cpu_ran_vm(cpu, mm) do {} while (0) | ||
47 | #define cpu_maybe_ran_vm(cpu, mm) true | ||
48 | #endif /* CONFIG_SMP */ | ||
49 | 42 | ||
50 | /* | 43 | /** |
51 | * allocate an MMU context | 44 | * allocate_mmu_context - Allocate storage for the arch-specific MMU data |
45 | * @mm: The userspace VM context being set up | ||
52 | */ | 46 | */ |
53 | static inline unsigned long allocate_mmu_context(struct mm_struct *mm) | 47 | static inline unsigned long allocate_mmu_context(struct mm_struct *mm) |
54 | { | 48 | { |
@@ -101,34 +95,41 @@ static inline int init_new_context(struct task_struct *tsk, | |||
101 | } | 95 | } |
102 | 96 | ||
103 | /* | 97 | /* |
104 | * destroy context related info for an mm_struct that is about to be put to | ||
105 | * rest | ||
106 | */ | ||
107 | #define destroy_context(mm) do { } while (0) | ||
108 | |||
109 | /* | ||
110 | * after we have set current->mm to a new value, this activates the context for | 98 | * after we have set current->mm to a new value, this activates the context for |
111 | * the new mm so we see the new mappings. | 99 | * the new mm so we see the new mappings. |
112 | */ | 100 | */ |
113 | static inline void activate_context(struct mm_struct *mm, int cpu) | 101 | static inline void activate_context(struct mm_struct *mm) |
114 | { | 102 | { |
115 | PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK; | 103 | PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK; |
116 | } | 104 | } |
105 | #else /* CONFIG_MN10300_TLB_USE_PIDR */ | ||
117 | 106 | ||
118 | /* | 107 | #define init_new_context(tsk, mm) (0) |
119 | * change between virtual memory sets | 108 | #define activate_context(mm) local_flush_tlb() |
109 | |||
110 | #endif /* CONFIG_MN10300_TLB_USE_PIDR */ | ||
111 | |||
112 | /** | ||
113 | * destroy_context - Destroy mm context information | ||
114 | * @mm: The MM being destroyed. | ||
115 | * | ||
116 | * Destroy context related info for an mm_struct that is about to be put to | ||
117 | * rest | ||
118 | */ | ||
119 | #define destroy_context(mm) do {} while (0) | ||
120 | |||
121 | /** | ||
122 | * switch_mm - Change between userspace virtual memory contexts | ||
123 | * @prev: The outgoing MM context. | ||
124 | * @next: The incoming MM context. | ||
125 | * @tsk: The incoming task. | ||
120 | */ | 126 | */ |
121 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | 127 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, |
122 | struct task_struct *tsk) | 128 | struct task_struct *tsk) |
123 | { | 129 | { |
124 | int cpu = smp_processor_id(); | ||
125 | |||
126 | if (prev != next) { | 130 | if (prev != next) { |
127 | cpu_ran_vm(cpu, next); | ||
128 | activate_context(next, cpu); | ||
129 | PTBR = (unsigned long) next->pgd; | 131 | PTBR = (unsigned long) next->pgd; |
130 | } else if (!cpu_maybe_ran_vm(cpu, next)) { | 132 | activate_context(next); |
131 | activate_context(next, cpu); | ||
132 | } | 133 | } |
133 | } | 134 | } |
134 | 135 | ||