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authorMarkos Chandras <markos.chandras@imgtec.com>2014-07-21 09:35:55 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-08-19 12:24:41 -0400
commitca4d24f7954f3746742ba350c2276ff777f21173 (patch)
tree174ebfe73bf37249315458ab89fd81d4535d01b4 /arch/mips
parentf85b71ceabb9d8d8a9e34b045b5c43ffde3623b3 (diff)
MIPS: Malta: EVA: Rename 'eva_entry' to 'platform_eva_init'
Rename 'eva_entry' to 'platform_eva_init' as required by the new 'eva_init' macro in the eva.h header. Since this macro is now used in a platform dependent way, it must not depend on its caller so move the t1 register initialization inside this macro. Also set the .reorder assembler option in case the caller may have previously set .noreorder. This may allow a few assembler optimizations. Finally include missing headers and document the register usage for this macro. Reviewed-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Patchwork: http://patchwork.linux-mips.org/patch/7423/ Signed-off-by: James Hogan <james.hogan@imgtec.com>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/mach-malta/kernel-entry-init.h22
1 files changed, 16 insertions, 6 deletions
diff --git a/arch/mips/include/asm/mach-malta/kernel-entry-init.h b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
index 77eeda77e73c..0cf8622db27f 100644
--- a/arch/mips/include/asm/mach-malta/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
@@ -10,14 +10,15 @@
10#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H 10#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
11#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H 11#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
12 12
13#include <asm/regdef.h>
14#include <asm/mipsregs.h>
15
13 /* 16 /*
14 * Prepare segments for EVA boot: 17 * Prepare segments for EVA boot:
15 * 18 *
16 * This is in case the processor boots in legacy configuration 19 * This is in case the processor boots in legacy configuration
17 * (SI_EVAReset is de-asserted and CONFIG5.K == 0) 20 * (SI_EVAReset is de-asserted and CONFIG5.K == 0)
18 * 21 *
19 * On entry, t1 is loaded with CP0_CONFIG
20 *
21 * ========================= Mappings ============================= 22 * ========================= Mappings =============================
22 * Virtual memory Physical memory Mapping 23 * Virtual memory Physical memory Mapping
23 * 0x00000000 - 0x7fffffff 0x80000000 - 0xfffffffff MUSUK (kuseg) 24 * 0x00000000 - 0x7fffffff 0x80000000 - 0xfffffffff MUSUK (kuseg)
@@ -30,12 +31,20 @@
30 * 31 *
31 * 32 *
32 * Lowmem is expanded to 2GB 33 * Lowmem is expanded to 2GB
34 *
35 * The following code uses the t0, t1, t2 and ra registers without
36 * previously preserving them.
37 *
33 */ 38 */
34 .macro eva_entry 39 .macro platform_eva_init
40
41 .set push
42 .set reorder
35 /* 43 /*
36 * Get Config.K0 value and use it to program 44 * Get Config.K0 value and use it to program
37 * the segmentation registers 45 * the segmentation registers
38 */ 46 */
47 mfc0 t1, CP0_CONFIG
39 andi t1, 0x7 /* CCA */ 48 andi t1, 0x7 /* CCA */
40 move t2, t1 49 move t2, t1
41 ins t2, t1, 16, 3 50 ins t2, t1, 16, 3
@@ -77,6 +86,8 @@
77 mtc0 t0, $16, 5 86 mtc0 t0, $16, 5
78 sync 87 sync
79 jal mips_ihb 88 jal mips_ihb
89
90 .set pop
80 .endm 91 .endm
81 92
82 .macro kernel_entry_setup 93 .macro kernel_entry_setup
@@ -95,7 +106,7 @@
95 sll t0, t0, 6 /* SC bit */ 106 sll t0, t0, 6 /* SC bit */
96 bgez t0, 9f 107 bgez t0, 9f
97 108
98 eva_entry 109 platform_eva_init
99 b 0f 110 b 0f
1009: 1119:
101 /* Assume we came from YAMON... */ 112 /* Assume we came from YAMON... */
@@ -127,8 +138,7 @@ nonsc_processor:
127#ifdef CONFIG_EVA 138#ifdef CONFIG_EVA
128 sync 139 sync
129 ehb 140 ehb
130 mfc0 t1, CP0_CONFIG 141 platform_eva_init
131 eva_entry
132#endif 142#endif
133 .endm 143 .endm
134 144