diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2009-03-30 08:49:44 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-03-30 08:49:44 -0400 |
commit | c87e09096dcd1ea3da8dfe434ee694fac51031c8 (patch) | |
tree | d988b5b545173c79ac013977720d62c7d26ec337 /arch/mips | |
parent | 3e168ae286f5203d4b4aae0ae15c0d6282bcdd21 (diff) |
MIPS: Enable GENERIC_HARDIRQS_NO__DO_IRQ for all platforms
__do_IRQ() is deprecated and will go away.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 12 | ||||
-rw-r--r-- | arch/mips/alchemy/Kconfig | 1 | ||||
-rw-r--r-- | arch/mips/kernel/irq-msc01.c | 6 | ||||
-rw-r--r-- | arch/mips/kernel/irq_cpu.c | 3 | ||||
-rw-r--r-- | arch/mips/sgi-ip32/ip32-irq.c | 63 | ||||
-rw-r--r-- | arch/mips/sibyte/bcm1480/irq.c | 2 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/irq.c | 2 | ||||
-rw-r--r-- | arch/mips/sni/a20r.c | 2 | ||||
-rw-r--r-- | arch/mips/sni/pcimt.c | 2 | ||||
-rw-r--r-- | arch/mips/sni/pcit.c | 4 | ||||
-rw-r--r-- | arch/mips/sni/rm200.c | 2 | ||||
-rw-r--r-- | arch/mips/txx9/Kconfig | 1 |
12 files changed, 59 insertions, 41 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 206cb7953b0c..dc787190430a 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -77,7 +77,6 @@ config MIPS_COBALT | |||
77 | select SYS_SUPPORTS_32BIT_KERNEL | 77 | select SYS_SUPPORTS_32BIT_KERNEL |
78 | select SYS_SUPPORTS_64BIT_KERNEL | 78 | select SYS_SUPPORTS_64BIT_KERNEL |
79 | select SYS_SUPPORTS_LITTLE_ENDIAN | 79 | select SYS_SUPPORTS_LITTLE_ENDIAN |
80 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
81 | 80 | ||
82 | config MACH_DECSTATION | 81 | config MACH_DECSTATION |
83 | bool "DECstations" | 82 | bool "DECstations" |
@@ -132,7 +131,6 @@ config MACH_JAZZ | |||
132 | select SYS_SUPPORTS_32BIT_KERNEL | 131 | select SYS_SUPPORTS_32BIT_KERNEL |
133 | select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL | 132 | select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL |
134 | select SYS_SUPPORTS_100HZ | 133 | select SYS_SUPPORTS_100HZ |
135 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
136 | help | 134 | help |
137 | This a family of machines based on the MIPS R4030 chipset which was | 135 | This a family of machines based on the MIPS R4030 chipset which was |
138 | used by several vendors to build RISC/os and Windows NT workstations. | 136 | used by several vendors to build RISC/os and Windows NT workstations. |
@@ -154,7 +152,6 @@ config LASAT | |||
154 | select SYS_SUPPORTS_32BIT_KERNEL | 152 | select SYS_SUPPORTS_32BIT_KERNEL |
155 | select SYS_SUPPORTS_64BIT_KERNEL if BROKEN | 153 | select SYS_SUPPORTS_64BIT_KERNEL if BROKEN |
156 | select SYS_SUPPORTS_LITTLE_ENDIAN | 154 | select SYS_SUPPORTS_LITTLE_ENDIAN |
157 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
158 | 155 | ||
159 | config LEMOTE_FULONG | 156 | config LEMOTE_FULONG |
160 | bool "Lemote Fulong mini-PC" | 157 | bool "Lemote Fulong mini-PC" |
@@ -175,7 +172,6 @@ config LEMOTE_FULONG | |||
175 | select SYS_SUPPORTS_LITTLE_ENDIAN | 172 | select SYS_SUPPORTS_LITTLE_ENDIAN |
176 | select SYS_SUPPORTS_HIGHMEM | 173 | select SYS_SUPPORTS_HIGHMEM |
177 | select SYS_HAS_EARLY_PRINTK | 174 | select SYS_HAS_EARLY_PRINTK |
178 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
179 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | 175 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
180 | select CPU_HAS_WB | 176 | select CPU_HAS_WB |
181 | help | 177 | help |
@@ -250,7 +246,6 @@ config MACH_VR41XX | |||
250 | select CEVT_R4K | 246 | select CEVT_R4K |
251 | select CSRC_R4K | 247 | select CSRC_R4K |
252 | select SYS_HAS_CPU_VR41XX | 248 | select SYS_HAS_CPU_VR41XX |
253 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
254 | 249 | ||
255 | config NXP_STB220 | 250 | config NXP_STB220 |
256 | bool "NXP STB220 board" | 251 | bool "NXP STB220 board" |
@@ -364,7 +359,6 @@ config SGI_IP27 | |||
364 | select SYS_SUPPORTS_BIG_ENDIAN | 359 | select SYS_SUPPORTS_BIG_ENDIAN |
365 | select SYS_SUPPORTS_NUMA | 360 | select SYS_SUPPORTS_NUMA |
366 | select SYS_SUPPORTS_SMP | 361 | select SYS_SUPPORTS_SMP |
367 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
368 | help | 362 | help |
369 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics | 363 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics |
370 | workstations. To compile a Linux kernel that runs on these, say Y | 364 | workstations. To compile a Linux kernel that runs on these, say Y |
@@ -563,7 +557,6 @@ config MIKROTIK_RB532 | |||
563 | select CEVT_R4K | 557 | select CEVT_R4K |
564 | select CSRC_R4K | 558 | select CSRC_R4K |
565 | select DMA_NONCOHERENT | 559 | select DMA_NONCOHERENT |
566 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
567 | select HW_HAS_PCI | 560 | select HW_HAS_PCI |
568 | select IRQ_CPU | 561 | select IRQ_CPU |
569 | select SYS_HAS_CPU_MIPS32_R1 | 562 | select SYS_HAS_CPU_MIPS32_R1 |
@@ -700,8 +693,7 @@ config SCHED_OMIT_FRAME_POINTER | |||
700 | default y | 693 | default y |
701 | 694 | ||
702 | config GENERIC_HARDIRQS_NO__DO_IRQ | 695 | config GENERIC_HARDIRQS_NO__DO_IRQ |
703 | bool | 696 | def_bool y |
704 | default n | ||
705 | 697 | ||
706 | # | 698 | # |
707 | # Select some configuration options automatically based on user selections. | 699 | # Select some configuration options automatically based on user selections. |
@@ -920,7 +912,6 @@ config SOC_PNX833X | |||
920 | select SYS_SUPPORTS_32BIT_KERNEL | 912 | select SYS_SUPPORTS_32BIT_KERNEL |
921 | select SYS_SUPPORTS_LITTLE_ENDIAN | 913 | select SYS_SUPPORTS_LITTLE_ENDIAN |
922 | select SYS_SUPPORTS_BIG_ENDIAN | 914 | select SYS_SUPPORTS_BIG_ENDIAN |
923 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
924 | select GENERIC_GPIO | 915 | select GENERIC_GPIO |
925 | select CPU_MIPSR2_IRQ_VI | 916 | select CPU_MIPSR2_IRQ_VI |
926 | 917 | ||
@@ -939,7 +930,6 @@ config SOC_PNX8550 | |||
939 | select SYS_HAS_CPU_MIPS32_R1 | 930 | select SYS_HAS_CPU_MIPS32_R1 |
940 | select SYS_HAS_EARLY_PRINTK | 931 | select SYS_HAS_EARLY_PRINTK |
941 | select SYS_SUPPORTS_32BIT_KERNEL | 932 | select SYS_SUPPORTS_32BIT_KERNEL |
942 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
943 | select GENERIC_GPIO | 933 | select GENERIC_GPIO |
944 | 934 | ||
945 | config SWAP_IO_SPACE | 935 | config SWAP_IO_SPACE |
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig index 2fc5c13e890f..8128aebfb155 100644 --- a/arch/mips/alchemy/Kconfig +++ b/arch/mips/alchemy/Kconfig | |||
@@ -134,5 +134,4 @@ config SOC_AU1X00 | |||
134 | select SYS_HAS_CPU_MIPS32_R1 | 134 | select SYS_HAS_CPU_MIPS32_R1 |
135 | select SYS_SUPPORTS_32BIT_KERNEL | 135 | select SYS_SUPPORTS_32BIT_KERNEL |
136 | select SYS_SUPPORTS_APM_EMULATION | 136 | select SYS_SUPPORTS_APM_EMULATION |
137 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
138 | select ARCH_REQUIRE_GPIOLIB | 137 | select ARCH_REQUIRE_GPIOLIB |
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 963c16d266ab..6a8cd28133d5 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c | |||
@@ -140,14 +140,16 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma | |||
140 | 140 | ||
141 | switch (imp->im_type) { | 141 | switch (imp->im_type) { |
142 | case MSC01_IRQ_EDGE: | 142 | case MSC01_IRQ_EDGE: |
143 | set_irq_chip(irqbase+n, &msc_edgeirq_type); | 143 | set_irq_chip_and_handler_name(irqbase + n, |
144 | &msc_edgeirq_type, handle_edge_irq, "edge"); | ||
144 | if (cpu_has_veic) | 145 | if (cpu_has_veic) |
145 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); | 146 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); |
146 | else | 147 | else |
147 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); | 148 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); |
148 | break; | 149 | break; |
149 | case MSC01_IRQ_LEVEL: | 150 | case MSC01_IRQ_LEVEL: |
150 | set_irq_chip(irqbase+n, &msc_levelirq_type); | 151 | set_irq_chip_and_handler_name(irqbase+n, |
152 | &msc_levelirq_type, handle_level_irq, "level"); | ||
151 | if (cpu_has_veic) | 153 | if (cpu_has_veic) |
152 | MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); | 154 | MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); |
153 | else | 155 | else |
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 0ee2567b780d..55c8a3ca507b 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c | |||
@@ -112,7 +112,8 @@ void __init mips_cpu_irq_init(void) | |||
112 | */ | 112 | */ |
113 | if (cpu_has_mipsmt) | 113 | if (cpu_has_mipsmt) |
114 | for (i = irq_base; i < irq_base + 2; i++) | 114 | for (i = irq_base; i < irq_base + 2; i++) |
115 | set_irq_chip(i, &mips_mt_cpu_irq_controller); | 115 | set_irq_chip_and_handler(i, &mips_mt_cpu_irq_controller, |
116 | handle_percpu_irq); | ||
116 | 117 | ||
117 | for (i = irq_base + 2; i < irq_base + 8; i++) | 118 | for (i = irq_base + 2; i < irq_base + 8; i++) |
118 | set_irq_chip_and_handler(i, &mips_cpu_irq_controller, | 119 | set_irq_chip_and_handler(i, &mips_cpu_irq_controller, |
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index 0d6b6663d5f6..0aefc5319a03 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c | |||
@@ -325,16 +325,11 @@ static void mask_and_ack_maceisa_irq(unsigned int irq) | |||
325 | { | 325 | { |
326 | unsigned long mace_int; | 326 | unsigned long mace_int; |
327 | 327 | ||
328 | switch (irq) { | 328 | /* edge triggered */ |
329 | case MACEISA_PARALLEL_IRQ: | 329 | mace_int = mace->perif.ctrl.istat; |
330 | case MACEISA_SERIAL1_TDMAPR_IRQ: | 330 | mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ)); |
331 | case MACEISA_SERIAL2_TDMAPR_IRQ: | 331 | mace->perif.ctrl.istat = mace_int; |
332 | /* edge triggered */ | 332 | |
333 | mace_int = mace->perif.ctrl.istat; | ||
334 | mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ)); | ||
335 | mace->perif.ctrl.istat = mace_int; | ||
336 | break; | ||
337 | } | ||
338 | disable_maceisa_irq(irq); | 333 | disable_maceisa_irq(irq); |
339 | } | 334 | } |
340 | 335 | ||
@@ -344,7 +339,16 @@ static void end_maceisa_irq(unsigned irq) | |||
344 | enable_maceisa_irq(irq); | 339 | enable_maceisa_irq(irq); |
345 | } | 340 | } |
346 | 341 | ||
347 | static struct irq_chip ip32_maceisa_interrupt = { | 342 | static struct irq_chip ip32_maceisa_level_interrupt = { |
343 | .name = "IP32 MACE ISA", | ||
344 | .ack = disable_maceisa_irq, | ||
345 | .mask = disable_maceisa_irq, | ||
346 | .mask_ack = disable_maceisa_irq, | ||
347 | .unmask = enable_maceisa_irq, | ||
348 | .end = end_maceisa_irq, | ||
349 | }; | ||
350 | |||
351 | static struct irq_chip ip32_maceisa_edge_interrupt = { | ||
348 | .name = "IP32 MACE ISA", | 352 | .name = "IP32 MACE ISA", |
349 | .ack = mask_and_ack_maceisa_irq, | 353 | .ack = mask_and_ack_maceisa_irq, |
350 | .mask = disable_maceisa_irq, | 354 | .mask = disable_maceisa_irq, |
@@ -500,27 +504,50 @@ void __init arch_init_irq(void) | |||
500 | for (irq = CRIME_IRQ_BASE; irq <= IP32_IRQ_MAX; irq++) { | 504 | for (irq = CRIME_IRQ_BASE; irq <= IP32_IRQ_MAX; irq++) { |
501 | switch (irq) { | 505 | switch (irq) { |
502 | case MACE_VID_IN1_IRQ ... MACE_PCI_BRIDGE_IRQ: | 506 | case MACE_VID_IN1_IRQ ... MACE_PCI_BRIDGE_IRQ: |
503 | set_irq_chip(irq, &ip32_mace_interrupt); | 507 | set_irq_chip_and_handler_name(irq,&ip32_mace_interrupt, |
508 | handle_level_irq, "level"); | ||
504 | break; | 509 | break; |
510 | |||
505 | case MACEPCI_SCSI0_IRQ ... MACEPCI_SHARED2_IRQ: | 511 | case MACEPCI_SCSI0_IRQ ... MACEPCI_SHARED2_IRQ: |
506 | set_irq_chip(irq, &ip32_macepci_interrupt); | 512 | set_irq_chip_and_handler_name(irq, |
513 | &ip32_macepci_interrupt, handle_level_irq, | ||
514 | "level"); | ||
507 | break; | 515 | break; |
516 | |||
508 | case CRIME_GBE0_IRQ ... CRIME_GBE3_IRQ: | 517 | case CRIME_GBE0_IRQ ... CRIME_GBE3_IRQ: |
509 | set_irq_chip(irq, &crime_edge_interrupt); | 518 | set_irq_chip_and_handler_name(irq, |
519 | &crime_edge_interrupt, handle_edge_irq, "edge"); | ||
510 | break; | 520 | break; |
511 | case CRIME_CPUERR_IRQ: | 521 | case CRIME_CPUERR_IRQ: |
512 | case CRIME_MEMERR_IRQ: | 522 | case CRIME_MEMERR_IRQ: |
513 | set_irq_chip(irq, &crime_level_interrupt); | 523 | set_irq_chip_and_handler_name(irq, |
524 | &crime_level_interrupt, handle_level_irq, | ||
525 | "level"); | ||
514 | break; | 526 | break; |
527 | |||
515 | case CRIME_RE_EMPTY_E_IRQ ... CRIME_RE_IDLE_E_IRQ: | 528 | case CRIME_RE_EMPTY_E_IRQ ... CRIME_RE_IDLE_E_IRQ: |
516 | case CRIME_SOFT0_IRQ ... CRIME_SOFT2_IRQ: | 529 | case CRIME_SOFT0_IRQ ... CRIME_SOFT2_IRQ: |
517 | set_irq_chip(irq, &crime_edge_interrupt); | 530 | set_irq_chip_and_handler_name(irq, |
531 | &crime_edge_interrupt, handle_edge_irq, "edge"); | ||
518 | break; | 532 | break; |
533 | |||
519 | case CRIME_VICE_IRQ: | 534 | case CRIME_VICE_IRQ: |
520 | set_irq_chip(irq, &crime_edge_interrupt); | 535 | set_irq_chip_and_handler_name(irq, |
536 | &crime_edge_interrupt, handle_edge_irq, "edge"); | ||
537 | break; | ||
538 | |||
539 | case MACEISA_PARALLEL_IRQ: | ||
540 | case MACEISA_SERIAL1_TDMAPR_IRQ: | ||
541 | case MACEISA_SERIAL2_TDMAPR_IRQ: | ||
542 | set_irq_chip_and_handler_name(irq, | ||
543 | &ip32_maceisa_edge_interrupt, handle_edge_irq, | ||
544 | "edge"); | ||
521 | break; | 545 | break; |
546 | |||
522 | default: | 547 | default: |
523 | set_irq_chip(irq, &ip32_maceisa_interrupt); | 548 | set_irq_chip_and_handler_name(irq, |
549 | &ip32_maceisa_level_interrupt, handle_level_irq, | ||
550 | "level"); | ||
524 | break; | 551 | break; |
525 | } | 552 | } |
526 | } | 553 | } |
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 12b465d404df..352352b3cb2f 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -236,7 +236,7 @@ void __init init_bcm1480_irqs(void) | |||
236 | int i; | 236 | int i; |
237 | 237 | ||
238 | for (i = 0; i < BCM1480_NR_IRQS; i++) { | 238 | for (i = 0; i < BCM1480_NR_IRQS; i++) { |
239 | set_irq_chip(i, &bcm1480_irq_type); | 239 | set_irq_chip_and_handler(i, &bcm1480_irq_type, handle_level_irq); |
240 | bcm1480_irq_owner[i] = 0; | 240 | bcm1480_irq_owner[i] = 0; |
241 | } | 241 | } |
242 | } | 242 | } |
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 808ac2959b8c..c08ff582da6f 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -220,7 +220,7 @@ void __init init_sb1250_irqs(void) | |||
220 | int i; | 220 | int i; |
221 | 221 | ||
222 | for (i = 0; i < SB1250_NR_IRQS; i++) { | 222 | for (i = 0; i < SB1250_NR_IRQS; i++) { |
223 | set_irq_chip(i, &sb1250_irq_type); | 223 | set_irq_chip_and_handler(i, &sb1250_irq_type, handle_level_irq); |
224 | sb1250_irq_owner[i] = 0; | 224 | sb1250_irq_owner[i] = 0; |
225 | } | 225 | } |
226 | } | 226 | } |
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c index 3f8cf5eb2f06..7dd76fb3b645 100644 --- a/arch/mips/sni/a20r.c +++ b/arch/mips/sni/a20r.c | |||
@@ -219,7 +219,7 @@ void __init sni_a20r_irq_init(void) | |||
219 | int i; | 219 | int i; |
220 | 220 | ||
221 | for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++) | 221 | for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++) |
222 | set_irq_chip(i, &a20r_irq_type); | 222 | set_irq_chip_and_handler(i, &a20r_irq_type, handle_level_irq); |
223 | sni_hwint = a20r_hwint; | 223 | sni_hwint = a20r_hwint; |
224 | change_c0_status(ST0_IM, IE_IRQ0); | 224 | change_c0_status(ST0_IM, IE_IRQ0); |
225 | setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); | 225 | setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); |
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 834650f371e0..74e6c67982fb 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c | |||
@@ -304,7 +304,7 @@ void __init sni_pcimt_irq_init(void) | |||
304 | mips_cpu_irq_init(); | 304 | mips_cpu_irq_init(); |
305 | /* Actually we've got more interrupts to handle ... */ | 305 | /* Actually we've got more interrupts to handle ... */ |
306 | for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++) | 306 | for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++) |
307 | set_irq_chip(i, &pcimt_irq_type); | 307 | set_irq_chip_and_handler(i, &pcimt_irq_type, handle_level_irq); |
308 | sni_hwint = sni_pcimt_hwint; | 308 | sni_hwint = sni_pcimt_hwint; |
309 | change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3); | 309 | change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3); |
310 | } | 310 | } |
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index e5f12cf96e8e..071a9573ac7f 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c | |||
@@ -246,7 +246,7 @@ void __init sni_pcit_irq_init(void) | |||
246 | 246 | ||
247 | mips_cpu_irq_init(); | 247 | mips_cpu_irq_init(); |
248 | for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) | 248 | for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) |
249 | set_irq_chip(i, &pcit_irq_type); | 249 | set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq); |
250 | *(volatile u32 *)SNI_PCIT_INT_REG = 0; | 250 | *(volatile u32 *)SNI_PCIT_INT_REG = 0; |
251 | sni_hwint = sni_pcit_hwint; | 251 | sni_hwint = sni_pcit_hwint; |
252 | change_c0_status(ST0_IM, IE_IRQ1); | 252 | change_c0_status(ST0_IM, IE_IRQ1); |
@@ -259,7 +259,7 @@ void __init sni_pcit_cplus_irq_init(void) | |||
259 | 259 | ||
260 | mips_cpu_irq_init(); | 260 | mips_cpu_irq_init(); |
261 | for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) | 261 | for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) |
262 | set_irq_chip(i, &pcit_irq_type); | 262 | set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq); |
263 | *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; | 263 | *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; |
264 | sni_hwint = sni_pcit_hwint_cplus; | 264 | sni_hwint = sni_pcit_hwint_cplus; |
265 | change_c0_status(ST0_IM, IE_IRQ0); | 265 | change_c0_status(ST0_IM, IE_IRQ0); |
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index 5310aa75afa4..b4352a0c8151 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c | |||
@@ -487,7 +487,7 @@ void __init sni_rm200_irq_init(void) | |||
487 | mips_cpu_irq_init(); | 487 | mips_cpu_irq_init(); |
488 | /* Actually we've got more interrupts to handle ... */ | 488 | /* Actually we've got more interrupts to handle ... */ |
489 | for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++) | 489 | for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++) |
490 | set_irq_chip(i, &rm200_irq_type); | 490 | set_irq_chip_and_handler(i, &rm200_irq_type, handle_level_irq); |
491 | sni_hwint = sni_rm200_hwint; | 491 | sni_hwint = sni_rm200_hwint; |
492 | change_c0_status(ST0_IM, IE_IRQ0); | 492 | change_c0_status(ST0_IM, IE_IRQ0); |
493 | setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq); | 493 | setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq); |
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index 226e8bb2f0a1..0db7cf38ed8b 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig | |||
@@ -20,7 +20,6 @@ config MACH_TXX9 | |||
20 | select SYS_SUPPORTS_32BIT_KERNEL | 20 | select SYS_SUPPORTS_32BIT_KERNEL |
21 | select SYS_SUPPORTS_LITTLE_ENDIAN | 21 | select SYS_SUPPORTS_LITTLE_ENDIAN |
22 | select SYS_SUPPORTS_BIG_ENDIAN | 22 | select SYS_SUPPORTS_BIG_ENDIAN |
23 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
24 | 23 | ||
25 | config TOSHIBA_JMR3927 | 24 | config TOSHIBA_JMR3927 |
26 | bool "Toshiba JMR-TX3927 board" | 25 | bool "Toshiba JMR-TX3927 board" |