diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 18:07:19 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 18:07:19 -0400 |
commit | b4beb4bf9934d151bf4581a54ae028927374cb2a (patch) | |
tree | 28475f62b18784e1d10b05e901799d02c054587f /arch/mips | |
parent | f3c3f0670501fee130f22193369249deea8cc630 (diff) | |
parent | 3945fe9314af718946f71185901c28dd349469c7 (diff) |
Merge branch 'for-linus/i2c-3.2' of git://git.fluff.org/bjdooks/linux
* 'for-linus/i2c-3.2' of git://git.fluff.org/bjdooks/linux: (47 commits)
i2c-s3c2410: Add device tree support
i2c-s3c2410: Keep a copy of platform data and use it
i2c-nomadik: cosmetic coding style corrections
i2c-au1550: dev_pm_ops conversion
i2c-au1550: increase timeout waiting for master done
i2c-au1550: remove unused ack_timeout
i2c-au1550: remove usage of volatile keyword
i2c-tegra: __iomem annotation fix
i2c-eg20t: Add initialize processing in case i2c-error occurs
i2c-eg20t: Fix flag setting issue
i2c-eg20t: add stop sequence in case wait-event timeout occurs
i2c-eg20t: Separate error processing
i2c-eg20t: Fix 10bit access issue
i2c-eg20t: Modify returned value s32 to long
i2c-eg20t: Fix bus-idle waiting issue
i2c-designware: Fix PCI core warning on suspend/resume
i2c-designware: Add runtime power management support
i2c-designware: Add support for Designware core behind PCI devices.
i2c-designware: Push all register reads/writes into the core code.
i2c-designware: Support multiple cores using same ISR
...
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/include/asm/mach-au1x00/au1xxx_psc.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h index 892b7f168eb4..5a5cb7386427 100644 --- a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h +++ b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h | |||
@@ -394,19 +394,6 @@ typedef struct psc_spi { | |||
394 | #define PSC_SPITXRX_LC (1 << 29) | 394 | #define PSC_SPITXRX_LC (1 << 29) |
395 | #define PSC_SPITXRX_SR (1 << 28) | 395 | #define PSC_SPITXRX_SR (1 << 28) |
396 | 396 | ||
397 | /* PSC in SMBus (I2C) Mode. */ | ||
398 | typedef struct psc_smb { | ||
399 | u32 psc_sel; | ||
400 | u32 psc_ctrl; | ||
401 | u32 psc_smbcfg; | ||
402 | u32 psc_smbmsk; | ||
403 | u32 psc_smbpcr; | ||
404 | u32 psc_smbstat; | ||
405 | u32 psc_smbevnt; | ||
406 | u32 psc_smbtxrx; | ||
407 | u32 psc_smbtmr; | ||
408 | } psc_smb_t; | ||
409 | |||
410 | /* SMBus Config Register. */ | 397 | /* SMBus Config Register. */ |
411 | #define PSC_SMBCFG_RT_MASK (3 << 30) | 398 | #define PSC_SMBCFG_RT_MASK (3 << 30) |
412 | #define PSC_SMBCFG_RT_FIFO1 (0 << 30) | 399 | #define PSC_SMBCFG_RT_FIFO1 (0 << 30) |