diff options
author | Jayachandran C <jchandra@broadcom.com> | 2013-12-21 06:22:26 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-01-24 16:39:49 -0500 |
commit | 98d4884ca55883e8b16180bd969a8bccaa885c80 (patch) | |
tree | ca7424268b4ef49d1472895bf2bb50d57b38d4fe /arch/mips | |
parent | e7aa6c66b0acc34caba3af485f1a039bfa8aef07 (diff) |
MIPS: Netlogic: Add cpu to node mapping for XLP9XX
XLP9XX has 20 cores per node, opposed to 8 on earlier XLP8XX.
Update code that calculates node id from cpu id to handle this.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6283/
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/include/asm/mach-netlogic/multi-node.h | 11 | ||||
-rw-r--r-- | arch/mips/include/asm/netlogic/mips-extns.h | 7 | ||||
-rw-r--r-- | arch/mips/netlogic/common/irq.c | 6 | ||||
-rw-r--r-- | arch/mips/netlogic/common/smp.c | 8 | ||||
-rw-r--r-- | arch/mips/netlogic/xlp/setup.c | 5 | ||||
-rw-r--r-- | arch/mips/netlogic/xlp/wakeup.c | 4 | ||||
-rw-r--r-- | arch/mips/netlogic/xlr/wakeup.c | 2 | ||||
-rw-r--r-- | arch/mips/pci/msi-xlp.c | 4 |
8 files changed, 33 insertions, 14 deletions
diff --git a/arch/mips/include/asm/mach-netlogic/multi-node.h b/arch/mips/include/asm/mach-netlogic/multi-node.h index df9869d13afd..9ed8dacdc37c 100644 --- a/arch/mips/include/asm/mach-netlogic/multi-node.h +++ b/arch/mips/include/asm/mach-netlogic/multi-node.h | |||
@@ -47,9 +47,16 @@ | |||
47 | #endif | 47 | #endif |
48 | #endif | 48 | #endif |
49 | 49 | ||
50 | #define NLM_CORES_PER_NODE 8 | ||
51 | #define NLM_THREADS_PER_CORE 4 | 50 | #define NLM_THREADS_PER_CORE 4 |
52 | #define NLM_CPUS_PER_NODE (NLM_CORES_PER_NODE * NLM_THREADS_PER_CORE) | 51 | #ifdef CONFIG_CPU_XLR |
52 | #define nlm_cores_per_node() 8 | ||
53 | #else | ||
54 | extern unsigned int xlp_cores_per_node; | ||
55 | #define nlm_cores_per_node() xlp_cores_per_node | ||
56 | #endif | ||
57 | |||
58 | #define nlm_threads_per_node() (nlm_cores_per_node() * NLM_THREADS_PER_CORE) | ||
59 | #define nlm_cpuid_to_node(c) ((c) / nlm_threads_per_node()) | ||
53 | 60 | ||
54 | struct nlm_soc_info { | 61 | struct nlm_soc_info { |
55 | unsigned long coremask; /* cores enabled on the soc */ | 62 | unsigned long coremask; /* cores enabled on the soc */ |
diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h index f299d31d7c1a..de9aada6f4c1 100644 --- a/arch/mips/include/asm/netlogic/mips-extns.h +++ b/arch/mips/include/asm/netlogic/mips-extns.h | |||
@@ -146,7 +146,12 @@ static inline int hard_smp_processor_id(void) | |||
146 | 146 | ||
147 | static inline int nlm_nodeid(void) | 147 | static inline int nlm_nodeid(void) |
148 | { | 148 | { |
149 | return (__read_32bit_c0_register($15, 1) >> 5) & 0x3; | 149 | uint32_t prid = read_c0_prid(); |
150 | |||
151 | if ((prid & 0xff00) == PRID_IMP_NETLOGIC_XLP9XX) | ||
152 | return (__read_32bit_c0_register($15, 1) >> 7) & 0x7; | ||
153 | else | ||
154 | return (__read_32bit_c0_register($15, 1) >> 5) & 0x3; | ||
150 | } | 155 | } |
151 | 156 | ||
152 | static inline unsigned int nlm_core_id(void) | 157 | static inline unsigned int nlm_core_id(void) |
diff --git a/arch/mips/netlogic/common/irq.c b/arch/mips/netlogic/common/irq.c index 3800bf6551ab..8092bb320618 100644 --- a/arch/mips/netlogic/common/irq.c +++ b/arch/mips/netlogic/common/irq.c | |||
@@ -223,7 +223,7 @@ static void nlm_init_node_irqs(int node) | |||
223 | continue; | 223 | continue; |
224 | 224 | ||
225 | nlm_pic_init_irt(nodep->picbase, irt, i, | 225 | nlm_pic_init_irt(nodep->picbase, irt, i, |
226 | node * NLM_CPUS_PER_NODE, 0); | 226 | node * nlm_threads_per_node(), 0); |
227 | nlm_setup_pic_irq(node, i, i, irt); | 227 | nlm_setup_pic_irq(node, i, i, irt); |
228 | } | 228 | } |
229 | } | 229 | } |
@@ -232,8 +232,8 @@ void nlm_smp_irq_init(int hwcpuid) | |||
232 | { | 232 | { |
233 | int node, cpu; | 233 | int node, cpu; |
234 | 234 | ||
235 | node = hwcpuid / NLM_CPUS_PER_NODE; | 235 | node = nlm_cpuid_to_node(hwcpuid); |
236 | cpu = hwcpuid % NLM_CPUS_PER_NODE; | 236 | cpu = hwcpuid % nlm_threads_per_node(); |
237 | 237 | ||
238 | if (cpu == 0 && node != 0) | 238 | if (cpu == 0 && node != 0) |
239 | nlm_init_node_irqs(node); | 239 | nlm_init_node_irqs(node); |
diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c index c0eded01fde9..6baae15cc7b1 100644 --- a/arch/mips/netlogic/common/smp.c +++ b/arch/mips/netlogic/common/smp.c | |||
@@ -63,7 +63,7 @@ void nlm_send_ipi_single(int logical_cpu, unsigned int action) | |||
63 | uint64_t picbase; | 63 | uint64_t picbase; |
64 | 64 | ||
65 | cpu = cpu_logical_map(logical_cpu); | 65 | cpu = cpu_logical_map(logical_cpu); |
66 | node = cpu / NLM_CPUS_PER_NODE; | 66 | node = nlm_cpuid_to_node(cpu); |
67 | picbase = nlm_get_node(node)->picbase; | 67 | picbase = nlm_get_node(node)->picbase; |
68 | 68 | ||
69 | if (action & SMP_CALL_FUNCTION) | 69 | if (action & SMP_CALL_FUNCTION) |
@@ -152,7 +152,7 @@ void nlm_boot_secondary(int logical_cpu, struct task_struct *idle) | |||
152 | int cpu, node; | 152 | int cpu, node; |
153 | 153 | ||
154 | cpu = cpu_logical_map(logical_cpu); | 154 | cpu = cpu_logical_map(logical_cpu); |
155 | node = cpu / NLM_CPUS_PER_NODE; | 155 | node = nlm_cpuid_to_node(logical_cpu); |
156 | nlm_next_sp = (unsigned long)__KSTK_TOS(idle); | 156 | nlm_next_sp = (unsigned long)__KSTK_TOS(idle); |
157 | nlm_next_gp = (unsigned long)task_thread_info(idle); | 157 | nlm_next_gp = (unsigned long)task_thread_info(idle); |
158 | 158 | ||
@@ -164,7 +164,7 @@ void nlm_boot_secondary(int logical_cpu, struct task_struct *idle) | |||
164 | void __init nlm_smp_setup(void) | 164 | void __init nlm_smp_setup(void) |
165 | { | 165 | { |
166 | unsigned int boot_cpu; | 166 | unsigned int boot_cpu; |
167 | int num_cpus, i, ncore; | 167 | int num_cpus, i, ncore, node; |
168 | volatile u32 *cpu_ready = nlm_get_boot_data(BOOT_CPU_READY); | 168 | volatile u32 *cpu_ready = nlm_get_boot_data(BOOT_CPU_READY); |
169 | char buf[64]; | 169 | char buf[64]; |
170 | 170 | ||
@@ -187,6 +187,8 @@ void __init nlm_smp_setup(void) | |||
187 | __cpu_number_map[i] = num_cpus; | 187 | __cpu_number_map[i] = num_cpus; |
188 | __cpu_logical_map[num_cpus] = i; | 188 | __cpu_logical_map[num_cpus] = i; |
189 | set_cpu_possible(num_cpus, true); | 189 | set_cpu_possible(num_cpus, true); |
190 | node = nlm_cpuid_to_node(i); | ||
191 | cpumask_set_cpu(num_cpus, &nlm_get_node(node)->cpumask); | ||
190 | ++num_cpus; | 192 | ++num_cpus; |
191 | } | 193 | } |
192 | } | 194 | } |
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c index 310d88a82abe..2a39bbeb45b0 100644 --- a/arch/mips/netlogic/xlp/setup.c +++ b/arch/mips/netlogic/xlp/setup.c | |||
@@ -51,6 +51,7 @@ uint64_t nlm_io_base; | |||
51 | struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; | 51 | struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; |
52 | cpumask_t nlm_cpumask = CPU_MASK_CPU0; | 52 | cpumask_t nlm_cpumask = CPU_MASK_CPU0; |
53 | unsigned int nlm_threads_per_core; | 53 | unsigned int nlm_threads_per_core; |
54 | unsigned int xlp_cores_per_node; | ||
54 | 55 | ||
55 | static void nlm_linux_exit(void) | 56 | static void nlm_linux_exit(void) |
56 | { | 57 | { |
@@ -154,6 +155,10 @@ void __init prom_init(void) | |||
154 | void *reset_vec; | 155 | void *reset_vec; |
155 | 156 | ||
156 | nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE); | 157 | nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE); |
158 | if (cpu_is_xlp9xx()) | ||
159 | xlp_cores_per_node = 32; | ||
160 | else | ||
161 | xlp_cores_per_node = 8; | ||
157 | nlm_init_boot_cpu(); | 162 | nlm_init_boot_cpu(); |
158 | xlp_mmu_init(); | 163 | xlp_mmu_init(); |
159 | nlm_node_init(0); | 164 | nlm_node_init(0); |
diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c index a5d6647e5fe8..bbd53f8e92db 100644 --- a/arch/mips/netlogic/xlp/wakeup.c +++ b/arch/mips/netlogic/xlp/wakeup.c | |||
@@ -165,7 +165,7 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask) | |||
165 | nodep->coremask = 1; | 165 | nodep->coremask = 1; |
166 | 166 | ||
167 | pr_info("Node %d - SYS/FUSE coremask %x\n", n, syscoremask); | 167 | pr_info("Node %d - SYS/FUSE coremask %x\n", n, syscoremask); |
168 | for (core = 0; core < NLM_CORES_PER_NODE; core++) { | 168 | for (core = 0; core < nlm_cores_per_node(); core++) { |
169 | /* we will be on node 0 core 0 */ | 169 | /* we will be on node 0 core 0 */ |
170 | if (n == 0 && core == 0) | 170 | if (n == 0 && core == 0) |
171 | continue; | 171 | continue; |
@@ -175,7 +175,7 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask) | |||
175 | continue; | 175 | continue; |
176 | 176 | ||
177 | /* see if at least the first hw thread is enabled */ | 177 | /* see if at least the first hw thread is enabled */ |
178 | cpu = (n * NLM_CORES_PER_NODE + core) | 178 | cpu = (n * nlm_cores_per_node() + core) |
179 | * NLM_THREADS_PER_CORE; | 179 | * NLM_THREADS_PER_CORE; |
180 | if (!cpumask_test_cpu(cpu, wakeup_mask)) | 180 | if (!cpumask_test_cpu(cpu, wakeup_mask)) |
181 | continue; | 181 | continue; |
diff --git a/arch/mips/netlogic/xlr/wakeup.c b/arch/mips/netlogic/xlr/wakeup.c index 9fb81fa6272a..ec60e7169389 100644 --- a/arch/mips/netlogic/xlr/wakeup.c +++ b/arch/mips/netlogic/xlr/wakeup.c | |||
@@ -70,7 +70,7 @@ int xlr_wakeup_secondary_cpus(void) | |||
70 | 70 | ||
71 | /* Fill up the coremask early */ | 71 | /* Fill up the coremask early */ |
72 | nodep->coremask = 1; | 72 | nodep->coremask = 1; |
73 | for (i = 1; i < NLM_CORES_PER_NODE; i++) { | 73 | for (i = 1; i < nlm_cores_per_node(); i++) { |
74 | for (j = 1000000; j > 0; j--) { | 74 | for (j = 1000000; j > 0; j--) { |
75 | if (cpu_ready[i * NLM_THREADS_PER_CORE]) | 75 | if (cpu_ready[i * NLM_THREADS_PER_CORE]) |
76 | break; | 76 | break; |
diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c index 66a244a73a82..afd8405e0188 100644 --- a/arch/mips/pci/msi-xlp.c +++ b/arch/mips/pci/msi-xlp.c | |||
@@ -280,7 +280,7 @@ static int xlp_setup_msi(uint64_t lnkbase, int node, int link, | |||
280 | irt = PIC_IRT_PCIE_LINK_INDEX(link); | 280 | irt = PIC_IRT_PCIE_LINK_INDEX(link); |
281 | nlm_setup_pic_irq(node, lirq, lirq, irt); | 281 | nlm_setup_pic_irq(node, lirq, lirq, irt); |
282 | nlm_pic_init_irt(nlm_get_node(node)->picbase, irt, lirq, | 282 | nlm_pic_init_irt(nlm_get_node(node)->picbase, irt, lirq, |
283 | node * NLM_CPUS_PER_NODE, 1 /*en */); | 283 | node * nlm_threads_per_node(), 1 /*en */); |
284 | } | 284 | } |
285 | 285 | ||
286 | /* allocate a MSI vec, and tell the bridge about it */ | 286 | /* allocate a MSI vec, and tell the bridge about it */ |
@@ -443,7 +443,7 @@ void __init xlp_init_node_msi_irqs(int node, int link) | |||
443 | msixvec = link * XLP_MSIXVEC_PER_LINK + i; | 443 | msixvec = link * XLP_MSIXVEC_PER_LINK + i; |
444 | irt = PIC_IRT_PCIE_MSIX_INDEX(msixvec); | 444 | irt = PIC_IRT_PCIE_MSIX_INDEX(msixvec); |
445 | nlm_pic_init_irt(nodep->picbase, irt, PIC_PCIE_MSIX_IRQ(link), | 445 | nlm_pic_init_irt(nodep->picbase, irt, PIC_PCIE_MSIX_IRQ(link), |
446 | node * NLM_CPUS_PER_NODE, 1 /* enable */); | 446 | node * nlm_threads_per_node(), 1 /* enable */); |
447 | 447 | ||
448 | /* Initialize MSI-X extended irq space for the link */ | 448 | /* Initialize MSI-X extended irq space for the link */ |
449 | irq = nlm_irq_to_xirq(node, nlm_link_msixirq(link, i)); | 449 | irq = nlm_irq_to_xirq(node, nlm_link_msixirq(link, i)); |