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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-21 00:04:47 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-21 00:04:47 -0400
commit3b59bf081622b6446db77ad06c93fe23677bc533 (patch)
tree3f4bb5a27c90cc86994a1f6d3c53fbf9208003cb /arch/mips
parente45836fafe157df137a837093037f741ad8f4c90 (diff)
parentbbdb32cb5b73597386913d052165423b9d736145 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking merge from David Miller: "1) Move ixgbe driver over to purely page based buffering on receive. From Alexander Duyck. 2) Add receive packet steering support to e1000e, from Bruce Allan. 3) Convert TCP MD5 support over to RCU, from Eric Dumazet. 4) Reduce cpu usage in handling out-of-order TCP packets on modern systems, also from Eric Dumazet. 5) Support the IP{,V6}_UNICAST_IF socket options, making the wine folks happy, from Erich Hoover. 6) Support VLAN trunking from guests in hyperv driver, from Haiyang Zhang. 7) Support byte-queue-limtis in r8169, from Igor Maravic. 8) Outline code intended for IP_RECVTOS in IP_PKTOPTIONS existed but was never properly implemented, Jiri Benc fixed that. 9) 64-bit statistics support in r8169 and 8139too, from Junchang Wang. 10) Support kernel side dump filtering by ctmark in netfilter ctnetlink, from Pablo Neira Ayuso. 11) Support byte-queue-limits in gianfar driver, from Paul Gortmaker. 12) Add new peek socket options to assist with socket migration, from Pavel Emelyanov. 13) Add sch_plug packet scheduler whose queue is controlled by userland daemons using explicit freeze and release commands. From Shriram Rajagopalan. 14) Fix FCOE checksum offload handling on transmit, from Yi Zou." * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1846 commits) Fix pppol2tp getsockname() Remove printk from rds_sendmsg ipv6: fix incorrent ipv6 ipsec packet fragment cpsw: Hook up default ndo_change_mtu. net: qmi_wwan: fix build error due to cdc-wdm dependecy netdev: driver: ethernet: Add TI CPSW driver netdev: driver: ethernet: add cpsw address lookup engine support phy: add am79c874 PHY support mlx4_core: fix race on comm channel bonding: send igmp report for its master fs_enet: Add MPC5125 FEC support and PHY interface selection net: bpf_jit: fix BPF_S_LDX_B_MSH compilation net: update the usage of CHECKSUM_UNNECESSARY fcoe: use CHECKSUM_UNNECESSARY instead of CHECKSUM_PARTIAL on tx net: do not do gso for CHECKSUM_UNNECESSARY in netif_needs_gso ixgbe: Fix issues with SR-IOV loopback when flow control is disabled net/hyperv: Fix the code handling tx busy ixgbe: fix namespace issues when FCoE/DCB is not enabled rtlwifi: Remove unused ETH_ADDR_LEN defines igbvf: Use ETH_ALEN ... Fix up fairly trivial conflicts in drivers/isdn/gigaset/interface.c and drivers/net/usb/{Kconfig,qmi_wwan.c} as per David.
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/bcm47xx/Makefile2
-rw-r--r--arch/mips/bcm47xx/nvram.c3
-rw-r--r--arch/mips/bcm47xx/setup.c188
-rw-r--r--arch/mips/bcm47xx/sprom.c620
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/bcm47xx.h3
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/nvram.h2
-rw-r--r--arch/mips/include/asm/socket.h4
-rw-r--r--arch/mips/pci/pci-bcm47xx.c49
8 files changed, 709 insertions, 162 deletions
diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile
index 4add17349ff9..4389de182eb4 100644
--- a/arch/mips/bcm47xx/Makefile
+++ b/arch/mips/bcm47xx/Makefile
@@ -3,5 +3,5 @@
3# under Linux. 3# under Linux.
4# 4#
5 5
6obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o 6obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o sprom.o
7obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o 7obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c
index a84e3bb7387f..d43ceff5be47 100644
--- a/arch/mips/bcm47xx/nvram.c
+++ b/arch/mips/bcm47xx/nvram.c
@@ -107,8 +107,7 @@ int nvram_getenv(char *name, char *val, size_t val_len)
107 value = eq + 1; 107 value = eq + 1;
108 if ((eq - var) == strlen(name) && 108 if ((eq - var) == strlen(name) &&
109 strncmp(var, name, (eq - var)) == 0) { 109 strncmp(var, name, (eq - var)) == 0) {
110 snprintf(val, val_len, "%s", value); 110 return snprintf(val, val_len, "%s", value);
111 return 0;
112 } 111 }
113 } 112 }
114 return NVRAM_ERR_ENVNOTFOUND; 113 return NVRAM_ERR_ENVNOTFOUND;
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index aab6b0c40a75..19780aa91708 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -3,7 +3,7 @@
3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> 3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4 * Copyright (C) 2006 Michael Buesch <m@bues.ch> 4 * Copyright (C) 2006 Michael Buesch <m@bues.ch>
5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org> 5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6 * Copyright (C) 2010-2011 Hauke Mehrtens <hauke@hauke-m.de> 6 * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -85,156 +85,7 @@ static void bcm47xx_machine_halt(void)
85} 85}
86 86
87#ifdef CONFIG_BCM47XX_SSB 87#ifdef CONFIG_BCM47XX_SSB
88#define READ_FROM_NVRAM(_outvar, name, buf) \ 88static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)
89 if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\
90 sprom->_outvar = simple_strtoul(buf, NULL, 0);
91
92#define READ_FROM_NVRAM2(_outvar, name1, name2, buf) \
93 if (nvram_getprefix(prefix, name1, buf, sizeof(buf)) >= 0 || \
94 nvram_getprefix(prefix, name2, buf, sizeof(buf)) >= 0)\
95 sprom->_outvar = simple_strtoul(buf, NULL, 0);
96
97static inline int nvram_getprefix(const char *prefix, char *name,
98 char *buf, int len)
99{
100 if (prefix) {
101 char key[100];
102
103 snprintf(key, sizeof(key), "%s%s", prefix, name);
104 return nvram_getenv(key, buf, len);
105 }
106
107 return nvram_getenv(name, buf, len);
108}
109
110static u32 nvram_getu32(const char *name, char *buf, int len)
111{
112 int rv;
113 char key[100];
114 u16 var0, var1;
115
116 snprintf(key, sizeof(key), "%s0", name);
117 rv = nvram_getenv(key, buf, len);
118 /* return 0 here so this looks like unset */
119 if (rv < 0)
120 return 0;
121 var0 = simple_strtoul(buf, NULL, 0);
122
123 snprintf(key, sizeof(key), "%s1", name);
124 rv = nvram_getenv(key, buf, len);
125 if (rv < 0)
126 return 0;
127 var1 = simple_strtoul(buf, NULL, 0);
128 return var1 << 16 | var0;
129}
130
131static void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)
132{
133 char buf[100];
134 u32 boardflags;
135
136 memset(sprom, 0, sizeof(struct ssb_sprom));
137
138 sprom->revision = 1; /* Fallback: Old hardware does not define this. */
139 READ_FROM_NVRAM(revision, "sromrev", buf);
140 if (nvram_getprefix(prefix, "il0macaddr", buf, sizeof(buf)) >= 0 ||
141 nvram_getprefix(prefix, "macaddr", buf, sizeof(buf)) >= 0)
142 nvram_parse_macaddr(buf, sprom->il0mac);
143 if (nvram_getprefix(prefix, "et0macaddr", buf, sizeof(buf)) >= 0)
144 nvram_parse_macaddr(buf, sprom->et0mac);
145 if (nvram_getprefix(prefix, "et1macaddr", buf, sizeof(buf)) >= 0)
146 nvram_parse_macaddr(buf, sprom->et1mac);
147 READ_FROM_NVRAM(et0phyaddr, "et0phyaddr", buf);
148 READ_FROM_NVRAM(et1phyaddr, "et1phyaddr", buf);
149 READ_FROM_NVRAM(et0mdcport, "et0mdcport", buf);
150 READ_FROM_NVRAM(et1mdcport, "et1mdcport", buf);
151 READ_FROM_NVRAM(board_rev, "boardrev", buf);
152 READ_FROM_NVRAM(country_code, "ccode", buf);
153 READ_FROM_NVRAM(ant_available_a, "aa5g", buf);
154 READ_FROM_NVRAM(ant_available_bg, "aa2g", buf);
155 READ_FROM_NVRAM(pa0b0, "pa0b0", buf);
156 READ_FROM_NVRAM(pa0b1, "pa0b1", buf);
157 READ_FROM_NVRAM(pa0b2, "pa0b2", buf);
158 READ_FROM_NVRAM(pa1b0, "pa1b0", buf);
159 READ_FROM_NVRAM(pa1b1, "pa1b1", buf);
160 READ_FROM_NVRAM(pa1b2, "pa1b2", buf);
161 READ_FROM_NVRAM(pa1lob0, "pa1lob0", buf);
162 READ_FROM_NVRAM(pa1lob2, "pa1lob1", buf);
163 READ_FROM_NVRAM(pa1lob1, "pa1lob2", buf);
164 READ_FROM_NVRAM(pa1hib0, "pa1hib0", buf);
165 READ_FROM_NVRAM(pa1hib2, "pa1hib1", buf);
166 READ_FROM_NVRAM(pa1hib1, "pa1hib2", buf);
167 READ_FROM_NVRAM2(gpio0, "ledbh0", "wl0gpio0", buf);
168 READ_FROM_NVRAM2(gpio1, "ledbh1", "wl0gpio1", buf);
169 READ_FROM_NVRAM2(gpio2, "ledbh2", "wl0gpio2", buf);
170 READ_FROM_NVRAM2(gpio3, "ledbh3", "wl0gpio3", buf);
171 READ_FROM_NVRAM2(maxpwr_bg, "maxp2ga0", "pa0maxpwr", buf);
172 READ_FROM_NVRAM2(maxpwr_al, "maxp5gla0", "pa1lomaxpwr", buf);
173 READ_FROM_NVRAM2(maxpwr_a, "maxp5ga0", "pa1maxpwr", buf);
174 READ_FROM_NVRAM2(maxpwr_ah, "maxp5gha0", "pa1himaxpwr", buf);
175 READ_FROM_NVRAM2(itssi_bg, "itt5ga0", "pa0itssit", buf);
176 READ_FROM_NVRAM2(itssi_a, "itt2ga0", "pa1itssit", buf);
177 READ_FROM_NVRAM(tri2g, "tri2g", buf);
178 READ_FROM_NVRAM(tri5gl, "tri5gl", buf);
179 READ_FROM_NVRAM(tri5g, "tri5g", buf);
180 READ_FROM_NVRAM(tri5gh, "tri5gh", buf);
181 READ_FROM_NVRAM(txpid2g[0], "txpid2ga0", buf);
182 READ_FROM_NVRAM(txpid2g[1], "txpid2ga1", buf);
183 READ_FROM_NVRAM(txpid2g[2], "txpid2ga2", buf);
184 READ_FROM_NVRAM(txpid2g[3], "txpid2ga3", buf);
185 READ_FROM_NVRAM(txpid5g[0], "txpid5ga0", buf);
186 READ_FROM_NVRAM(txpid5g[1], "txpid5ga1", buf);
187 READ_FROM_NVRAM(txpid5g[2], "txpid5ga2", buf);
188 READ_FROM_NVRAM(txpid5g[3], "txpid5ga3", buf);
189 READ_FROM_NVRAM(txpid5gl[0], "txpid5gla0", buf);
190 READ_FROM_NVRAM(txpid5gl[1], "txpid5gla1", buf);
191 READ_FROM_NVRAM(txpid5gl[2], "txpid5gla2", buf);
192 READ_FROM_NVRAM(txpid5gl[3], "txpid5gla3", buf);
193 READ_FROM_NVRAM(txpid5gh[0], "txpid5gha0", buf);
194 READ_FROM_NVRAM(txpid5gh[1], "txpid5gha1", buf);
195 READ_FROM_NVRAM(txpid5gh[2], "txpid5gha2", buf);
196 READ_FROM_NVRAM(txpid5gh[3], "txpid5gha3", buf);
197 READ_FROM_NVRAM(rxpo2g, "rxpo2g", buf);
198 READ_FROM_NVRAM(rxpo5g, "rxpo5g", buf);
199 READ_FROM_NVRAM(rssisav2g, "rssisav2g", buf);
200 READ_FROM_NVRAM(rssismc2g, "rssismc2g", buf);
201 READ_FROM_NVRAM(rssismf2g, "rssismf2g", buf);
202 READ_FROM_NVRAM(bxa2g, "bxa2g", buf);
203 READ_FROM_NVRAM(rssisav5g, "rssisav5g", buf);
204 READ_FROM_NVRAM(rssismc5g, "rssismc5g", buf);
205 READ_FROM_NVRAM(rssismf5g, "rssismf5g", buf);
206 READ_FROM_NVRAM(bxa5g, "bxa5g", buf);
207 READ_FROM_NVRAM(cck2gpo, "cck2gpo", buf);
208
209 sprom->ofdm2gpo = nvram_getu32("ofdm2gpo", buf, sizeof(buf));
210 sprom->ofdm5glpo = nvram_getu32("ofdm5glpo", buf, sizeof(buf));
211 sprom->ofdm5gpo = nvram_getu32("ofdm5gpo", buf, sizeof(buf));
212 sprom->ofdm5ghpo = nvram_getu32("ofdm5ghpo", buf, sizeof(buf));
213
214 READ_FROM_NVRAM(antenna_gain.ghz24.a0, "ag0", buf);
215 READ_FROM_NVRAM(antenna_gain.ghz24.a1, "ag1", buf);
216 READ_FROM_NVRAM(antenna_gain.ghz24.a2, "ag2", buf);
217 READ_FROM_NVRAM(antenna_gain.ghz24.a3, "ag3", buf);
218 memcpy(&sprom->antenna_gain.ghz5, &sprom->antenna_gain.ghz24,
219 sizeof(sprom->antenna_gain.ghz5));
220
221 if (nvram_getprefix(prefix, "boardflags", buf, sizeof(buf)) >= 0) {
222 boardflags = simple_strtoul(buf, NULL, 0);
223 if (boardflags) {
224 sprom->boardflags_lo = (boardflags & 0x0000FFFFU);
225 sprom->boardflags_hi = (boardflags & 0xFFFF0000U) >> 16;
226 }
227 }
228 if (nvram_getprefix(prefix, "boardflags2", buf, sizeof(buf)) >= 0) {
229 boardflags = simple_strtoul(buf, NULL, 0);
230 if (boardflags) {
231 sprom->boardflags2_lo = (boardflags & 0x0000FFFFU);
232 sprom->boardflags2_hi = (boardflags & 0xFFFF0000U) >> 16;
233 }
234 }
235}
236
237int bcm47xx_get_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
238{ 89{
239 char prefix[10]; 90 char prefix[10];
240 91
@@ -251,7 +102,7 @@ int bcm47xx_get_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
251} 102}
252 103
253static int bcm47xx_get_invariants(struct ssb_bus *bus, 104static int bcm47xx_get_invariants(struct ssb_bus *bus,
254 struct ssb_init_invariants *iv) 105 struct ssb_init_invariants *iv)
255{ 106{
256 char buf[20]; 107 char buf[20];
257 108
@@ -281,7 +132,7 @@ static void __init bcm47xx_register_ssb(void)
281 char buf[100]; 132 char buf[100];
282 struct ssb_mipscore *mcore; 133 struct ssb_mipscore *mcore;
283 134
284 err = ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom); 135 err = ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom_ssb);
285 if (err) 136 if (err)
286 printk(KERN_WARNING "bcm47xx: someone else already registered" 137 printk(KERN_WARNING "bcm47xx: someone else already registered"
287 " a ssb SPROM callback handler (err %d)\n", err); 138 " a ssb SPROM callback handler (err %d)\n", err);
@@ -308,10 +159,41 @@ static void __init bcm47xx_register_ssb(void)
308#endif 159#endif
309 160
310#ifdef CONFIG_BCM47XX_BCMA 161#ifdef CONFIG_BCM47XX_BCMA
162static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)
163{
164 char prefix[10];
165 struct bcma_device *core;
166
167 switch (bus->hosttype) {
168 case BCMA_HOSTTYPE_PCI:
169 snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
170 bus->host_pci->bus->number + 1,
171 PCI_SLOT(bus->host_pci->devfn));
172 bcm47xx_fill_sprom(out, prefix);
173 return 0;
174 case BCMA_HOSTTYPE_SOC:
175 bcm47xx_fill_sprom_ethernet(out, NULL);
176 core = bcma_find_core(bus, BCMA_CORE_80211);
177 if (core) {
178 snprintf(prefix, sizeof(prefix), "sb/%u/",
179 core->core_index);
180 bcm47xx_fill_sprom(out, prefix);
181 }
182 return 0;
183 default:
184 pr_warn("bcm47xx: unable to fill SPROM for given bustype.\n");
185 return -EINVAL;
186 }
187}
188
311static void __init bcm47xx_register_bcma(void) 189static void __init bcm47xx_register_bcma(void)
312{ 190{
313 int err; 191 int err;
314 192
193 err = bcma_arch_register_fallback_sprom(&bcm47xx_get_sprom_bcma);
194 if (err)
195 pr_warn("bcm47xx: someone else already registered a bcma SPROM callback handler (err %d)\n", err);
196
315 err = bcma_host_soc_register(&bcm47xx_bus.bcma); 197 err = bcma_host_soc_register(&bcm47xx_bus.bcma);
316 if (err) 198 if (err)
317 panic("Failed to initialize BCMA bus (err %d)", err); 199 panic("Failed to initialize BCMA bus (err %d)", err);
diff --git a/arch/mips/bcm47xx/sprom.c b/arch/mips/bcm47xx/sprom.c
new file mode 100644
index 000000000000..5c8dcd2a8a93
--- /dev/null
+++ b/arch/mips/bcm47xx/sprom.c
@@ -0,0 +1,620 @@
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4 * Copyright (C) 2006 Michael Buesch <m@bues.ch>
5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6 * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <bcm47xx.h>
30#include <nvram.h>
31
32static void create_key(const char *prefix, const char *postfix,
33 const char *name, char *buf, int len)
34{
35 if (prefix && postfix)
36 snprintf(buf, len, "%s%s%s", prefix, name, postfix);
37 else if (prefix)
38 snprintf(buf, len, "%s%s", prefix, name);
39 else if (postfix)
40 snprintf(buf, len, "%s%s", name, postfix);
41 else
42 snprintf(buf, len, "%s", name);
43}
44
45#define NVRAM_READ_VAL(type) \
46static void nvram_read_ ## type (const char *prefix, \
47 const char *postfix, const char *name, \
48 type *val, type allset) \
49{ \
50 char buf[100]; \
51 char key[40]; \
52 int err; \
53 type var; \
54 \
55 create_key(prefix, postfix, name, key, sizeof(key)); \
56 \
57 err = nvram_getenv(key, buf, sizeof(buf)); \
58 if (err < 0) \
59 return; \
60 err = kstrto ## type (buf, 0, &var); \
61 if (err) { \
62 pr_warn("can not parse nvram name %s with value %s" \
63 " got %i", key, buf, err); \
64 return; \
65 } \
66 if (allset && var == allset) \
67 return; \
68 *val = var; \
69}
70
71NVRAM_READ_VAL(u8)
72NVRAM_READ_VAL(s8)
73NVRAM_READ_VAL(u16)
74NVRAM_READ_VAL(u32)
75
76#undef NVRAM_READ_VAL
77
78static void nvram_read_u32_2(const char *prefix, const char *name,
79 u16 *val_lo, u16 *val_hi)
80{
81 char buf[100];
82 char key[40];
83 int err;
84 u32 val;
85
86 create_key(prefix, NULL, name, key, sizeof(key));
87
88 err = nvram_getenv(key, buf, sizeof(buf));
89 if (err < 0)
90 return;
91 err = kstrtou32(buf, 0, &val);
92 if (err) {
93 pr_warn("can not parse nvram name %s with value %s got %i",
94 key, buf, err);
95 return;
96 }
97 *val_lo = (val & 0x0000FFFFU);
98 *val_hi = (val & 0xFFFF0000U) >> 16;
99}
100
101static void nvram_read_leddc(const char *prefix, const char *name,
102 u8 *leddc_on_time, u8 *leddc_off_time)
103{
104 char buf[100];
105 char key[40];
106 int err;
107 u32 val;
108
109 create_key(prefix, NULL, name, key, sizeof(key));
110
111 err = nvram_getenv(key, buf, sizeof(buf));
112 if (err < 0)
113 return;
114 err = kstrtou32(buf, 0, &val);
115 if (err) {
116 pr_warn("can not parse nvram name %s with value %s got %i",
117 key, buf, err);
118 return;
119 }
120
121 if (val == 0xffff || val == 0xffffffff)
122 return;
123
124 *leddc_on_time = val & 0xff;
125 *leddc_off_time = (val >> 16) & 0xff;
126}
127
128static void nvram_read_macaddr(const char *prefix, const char *name,
129 u8 (*val)[6])
130{
131 char buf[100];
132 char key[40];
133 int err;
134
135 create_key(prefix, NULL, name, key, sizeof(key));
136
137 err = nvram_getenv(key, buf, sizeof(buf));
138 if (err < 0)
139 return;
140 nvram_parse_macaddr(buf, *val);
141}
142
143static void nvram_read_alpha2(const char *prefix, const char *name,
144 char (*val)[2])
145{
146 char buf[10];
147 char key[40];
148 int err;
149
150 create_key(prefix, NULL, name, key, sizeof(key));
151
152 err = nvram_getenv(key, buf, sizeof(buf));
153 if (err < 0)
154 return;
155 if (buf[0] == '0')
156 return;
157 if (strlen(buf) > 2) {
158 pr_warn("alpha2 is too long %s", buf);
159 return;
160 }
161 memcpy(val, buf, sizeof(val));
162}
163
164static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
165 const char *prefix)
166{
167 nvram_read_u16(prefix, NULL, "boardrev", &sprom->board_rev, 0);
168 nvram_read_u16(prefix, NULL, "boardnum", &sprom->board_num, 0);
169 nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff);
170 nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff);
171 nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff);
172 nvram_read_u8(prefix, NULL, "ledbh3", &sprom->gpio3, 0xff);
173 nvram_read_u8(prefix, NULL, "aa2g", &sprom->ant_available_bg, 0);
174 nvram_read_u8(prefix, NULL, "aa5g", &sprom->ant_available_a, 0);
175 nvram_read_s8(prefix, NULL, "ag0", &sprom->antenna_gain.a0, 0);
176 nvram_read_s8(prefix, NULL, "ag1", &sprom->antenna_gain.a1, 0);
177 nvram_read_alpha2(prefix, "ccode", &sprom->alpha2);
178}
179
180static void bcm47xx_fill_sprom_r12389(struct ssb_sprom *sprom,
181 const char *prefix)
182{
183 nvram_read_u16(prefix, NULL, "pa0b0", &sprom->pa0b0, 0);
184 nvram_read_u16(prefix, NULL, "pa0b1", &sprom->pa0b1, 0);
185 nvram_read_u16(prefix, NULL, "pa0b2", &sprom->pa0b2, 0);
186 nvram_read_u8(prefix, NULL, "pa0itssit", &sprom->itssi_bg, 0);
187 nvram_read_u8(prefix, NULL, "pa0maxpwr", &sprom->maxpwr_bg, 0);
188 nvram_read_u16(prefix, NULL, "pa1b0", &sprom->pa1b0, 0);
189 nvram_read_u16(prefix, NULL, "pa1b1", &sprom->pa1b1, 0);
190 nvram_read_u16(prefix, NULL, "pa1b2", &sprom->pa1b2, 0);
191 nvram_read_u8(prefix, NULL, "pa1itssit", &sprom->itssi_a, 0);
192 nvram_read_u8(prefix, NULL, "pa1maxpwr", &sprom->maxpwr_a, 0);
193}
194
195static void bcm47xx_fill_sprom_r1(struct ssb_sprom *sprom, const char *prefix)
196{
197 nvram_read_u16(prefix, NULL, "boardflags", &sprom->boardflags_lo, 0);
198 nvram_read_u8(prefix, NULL, "cc", &sprom->country_code, 0);
199}
200
201static void bcm47xx_fill_sprom_r2389(struct ssb_sprom *sprom,
202 const char *prefix)
203{
204 nvram_read_u8(prefix, NULL, "opo", &sprom->opo, 0);
205 nvram_read_u16(prefix, NULL, "pa1lob0", &sprom->pa1lob0, 0);
206 nvram_read_u16(prefix, NULL, "pa1lob1", &sprom->pa1lob1, 0);
207 nvram_read_u16(prefix, NULL, "pa1lob2", &sprom->pa1lob2, 0);
208 nvram_read_u16(prefix, NULL, "pa1hib0", &sprom->pa1hib0, 0);
209 nvram_read_u16(prefix, NULL, "pa1hib1", &sprom->pa1hib1, 0);
210 nvram_read_u16(prefix, NULL, "pa1hib2", &sprom->pa1hib2, 0);
211 nvram_read_u8(prefix, NULL, "pa1lomaxpwr", &sprom->maxpwr_al, 0);
212 nvram_read_u8(prefix, NULL, "pa1himaxpwr", &sprom->maxpwr_ah, 0);
213}
214
215static void bcm47xx_fill_sprom_r2(struct ssb_sprom *sprom, const char *prefix)
216{
217 nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
218 &sprom->boardflags_hi);
219 nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0);
220}
221
222static void bcm47xx_fill_sprom_r389(struct ssb_sprom *sprom, const char *prefix)
223{
224 nvram_read_u8(prefix, NULL, "bxa2g", &sprom->bxa2g, 0);
225 nvram_read_u8(prefix, NULL, "rssisav2g", &sprom->rssisav2g, 0);
226 nvram_read_u8(prefix, NULL, "rssismc2g", &sprom->rssismc2g, 0);
227 nvram_read_u8(prefix, NULL, "rssismf2g", &sprom->rssismf2g, 0);
228 nvram_read_u8(prefix, NULL, "bxa5g", &sprom->bxa5g, 0);
229 nvram_read_u8(prefix, NULL, "rssisav5g", &sprom->rssisav5g, 0);
230 nvram_read_u8(prefix, NULL, "rssismc5g", &sprom->rssismc5g, 0);
231 nvram_read_u8(prefix, NULL, "rssismf5g", &sprom->rssismf5g, 0);
232 nvram_read_u8(prefix, NULL, "tri2g", &sprom->tri2g, 0);
233 nvram_read_u8(prefix, NULL, "tri5g", &sprom->tri5g, 0);
234 nvram_read_u8(prefix, NULL, "tri5gl", &sprom->tri5gl, 0);
235 nvram_read_u8(prefix, NULL, "tri5gh", &sprom->tri5gh, 0);
236 nvram_read_s8(prefix, NULL, "rxpo2g", &sprom->rxpo2g, 0);
237 nvram_read_s8(prefix, NULL, "rxpo5g", &sprom->rxpo5g, 0);
238}
239
240static void bcm47xx_fill_sprom_r3(struct ssb_sprom *sprom, const char *prefix)
241{
242 nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
243 &sprom->boardflags_hi);
244 nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0);
245 nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0);
246 nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
247 &sprom->leddc_off_time);
248}
249
250static void bcm47xx_fill_sprom_r4589(struct ssb_sprom *sprom,
251 const char *prefix)
252{
253 nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
254 &sprom->boardflags_hi);
255 nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
256 &sprom->boardflags2_hi);
257 nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0);
258 nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0);
259 nvram_read_s8(prefix, NULL, "ag2", &sprom->antenna_gain.a2, 0);
260 nvram_read_s8(prefix, NULL, "ag3", &sprom->antenna_gain.a3, 0);
261 nvram_read_u8(prefix, NULL, "txchain", &sprom->txchain, 0xf);
262 nvram_read_u8(prefix, NULL, "rxchain", &sprom->rxchain, 0xf);
263 nvram_read_u8(prefix, NULL, "antswitch", &sprom->antswitch, 0xff);
264 nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
265 &sprom->leddc_off_time);
266}
267
268static void bcm47xx_fill_sprom_r458(struct ssb_sprom *sprom, const char *prefix)
269{
270 nvram_read_u16(prefix, NULL, "cck2gpo", &sprom->cck2gpo, 0);
271 nvram_read_u32(prefix, NULL, "ofdm2gpo", &sprom->ofdm2gpo, 0);
272 nvram_read_u32(prefix, NULL, "ofdm5gpo", &sprom->ofdm5gpo, 0);
273 nvram_read_u32(prefix, NULL, "ofdm5glpo", &sprom->ofdm5glpo, 0);
274 nvram_read_u32(prefix, NULL, "ofdm5ghpo", &sprom->ofdm5ghpo, 0);
275 nvram_read_u16(prefix, NULL, "cddpo", &sprom->cddpo, 0);
276 nvram_read_u16(prefix, NULL, "stbcpo", &sprom->stbcpo, 0);
277 nvram_read_u16(prefix, NULL, "bw40po", &sprom->bw40po, 0);
278 nvram_read_u16(prefix, NULL, "bwduppo", &sprom->bwduppo, 0);
279 nvram_read_u16(prefix, NULL, "mcs2gpo0", &sprom->mcs2gpo[0], 0);
280 nvram_read_u16(prefix, NULL, "mcs2gpo1", &sprom->mcs2gpo[1], 0);
281 nvram_read_u16(prefix, NULL, "mcs2gpo2", &sprom->mcs2gpo[2], 0);
282 nvram_read_u16(prefix, NULL, "mcs2gpo3", &sprom->mcs2gpo[3], 0);
283 nvram_read_u16(prefix, NULL, "mcs2gpo4", &sprom->mcs2gpo[4], 0);
284 nvram_read_u16(prefix, NULL, "mcs2gpo5", &sprom->mcs2gpo[5], 0);
285 nvram_read_u16(prefix, NULL, "mcs2gpo6", &sprom->mcs2gpo[6], 0);
286 nvram_read_u16(prefix, NULL, "mcs2gpo7", &sprom->mcs2gpo[7], 0);
287 nvram_read_u16(prefix, NULL, "mcs5gpo0", &sprom->mcs5gpo[0], 0);
288 nvram_read_u16(prefix, NULL, "mcs5gpo1", &sprom->mcs5gpo[1], 0);
289 nvram_read_u16(prefix, NULL, "mcs5gpo2", &sprom->mcs5gpo[2], 0);
290 nvram_read_u16(prefix, NULL, "mcs5gpo3", &sprom->mcs5gpo[3], 0);
291 nvram_read_u16(prefix, NULL, "mcs5gpo4", &sprom->mcs5gpo[4], 0);
292 nvram_read_u16(prefix, NULL, "mcs5gpo5", &sprom->mcs5gpo[5], 0);
293 nvram_read_u16(prefix, NULL, "mcs5gpo6", &sprom->mcs5gpo[6], 0);
294 nvram_read_u16(prefix, NULL, "mcs5gpo7", &sprom->mcs5gpo[7], 0);
295 nvram_read_u16(prefix, NULL, "mcs5glpo0", &sprom->mcs5glpo[0], 0);
296 nvram_read_u16(prefix, NULL, "mcs5glpo1", &sprom->mcs5glpo[1], 0);
297 nvram_read_u16(prefix, NULL, "mcs5glpo2", &sprom->mcs5glpo[2], 0);
298 nvram_read_u16(prefix, NULL, "mcs5glpo3", &sprom->mcs5glpo[3], 0);
299 nvram_read_u16(prefix, NULL, "mcs5glpo4", &sprom->mcs5glpo[4], 0);
300 nvram_read_u16(prefix, NULL, "mcs5glpo5", &sprom->mcs5glpo[5], 0);
301 nvram_read_u16(prefix, NULL, "mcs5glpo6", &sprom->mcs5glpo[6], 0);
302 nvram_read_u16(prefix, NULL, "mcs5glpo7", &sprom->mcs5glpo[7], 0);
303 nvram_read_u16(prefix, NULL, "mcs5ghpo0", &sprom->mcs5ghpo[0], 0);
304 nvram_read_u16(prefix, NULL, "mcs5ghpo1", &sprom->mcs5ghpo[1], 0);
305 nvram_read_u16(prefix, NULL, "mcs5ghpo2", &sprom->mcs5ghpo[2], 0);
306 nvram_read_u16(prefix, NULL, "mcs5ghpo3", &sprom->mcs5ghpo[3], 0);
307 nvram_read_u16(prefix, NULL, "mcs5ghpo4", &sprom->mcs5ghpo[4], 0);
308 nvram_read_u16(prefix, NULL, "mcs5ghpo5", &sprom->mcs5ghpo[5], 0);
309 nvram_read_u16(prefix, NULL, "mcs5ghpo6", &sprom->mcs5ghpo[6], 0);
310 nvram_read_u16(prefix, NULL, "mcs5ghpo7", &sprom->mcs5ghpo[7], 0);
311}
312
313static void bcm47xx_fill_sprom_r45(struct ssb_sprom *sprom, const char *prefix)
314{
315 nvram_read_u8(prefix, NULL, "txpid2ga0", &sprom->txpid2g[0], 0);
316 nvram_read_u8(prefix, NULL, "txpid2ga1", &sprom->txpid2g[1], 0);
317 nvram_read_u8(prefix, NULL, "txpid2ga2", &sprom->txpid2g[2], 0);
318 nvram_read_u8(prefix, NULL, "txpid2ga3", &sprom->txpid2g[3], 0);
319 nvram_read_u8(prefix, NULL, "txpid5ga0", &sprom->txpid5g[0], 0);
320 nvram_read_u8(prefix, NULL, "txpid5ga1", &sprom->txpid5g[1], 0);
321 nvram_read_u8(prefix, NULL, "txpid5ga2", &sprom->txpid5g[2], 0);
322 nvram_read_u8(prefix, NULL, "txpid5ga3", &sprom->txpid5g[3], 0);
323 nvram_read_u8(prefix, NULL, "txpid5gla0", &sprom->txpid5gl[0], 0);
324 nvram_read_u8(prefix, NULL, "txpid5gla1", &sprom->txpid5gl[1], 0);
325 nvram_read_u8(prefix, NULL, "txpid5gla2", &sprom->txpid5gl[2], 0);
326 nvram_read_u8(prefix, NULL, "txpid5gla3", &sprom->txpid5gl[3], 0);
327 nvram_read_u8(prefix, NULL, "txpid5gha0", &sprom->txpid5gh[0], 0);
328 nvram_read_u8(prefix, NULL, "txpid5gha1", &sprom->txpid5gh[1], 0);
329 nvram_read_u8(prefix, NULL, "txpid5gha2", &sprom->txpid5gh[2], 0);
330 nvram_read_u8(prefix, NULL, "txpid5gha3", &sprom->txpid5gh[3], 0);
331}
332
333static void bcm47xx_fill_sprom_r89(struct ssb_sprom *sprom, const char *prefix)
334{
335 nvram_read_u8(prefix, NULL, "tssipos2g", &sprom->fem.ghz2.tssipos, 0);
336 nvram_read_u8(prefix, NULL, "extpagain2g",
337 &sprom->fem.ghz2.extpa_gain, 0);
338 nvram_read_u8(prefix, NULL, "pdetrange2g",
339 &sprom->fem.ghz2.pdet_range, 0);
340 nvram_read_u8(prefix, NULL, "triso2g", &sprom->fem.ghz2.tr_iso, 0);
341 nvram_read_u8(prefix, NULL, "antswctl2g", &sprom->fem.ghz2.antswlut, 0);
342 nvram_read_u8(prefix, NULL, "tssipos5g", &sprom->fem.ghz5.tssipos, 0);
343 nvram_read_u8(prefix, NULL, "extpagain5g",
344 &sprom->fem.ghz5.extpa_gain, 0);
345 nvram_read_u8(prefix, NULL, "pdetrange5g",
346 &sprom->fem.ghz5.pdet_range, 0);
347 nvram_read_u8(prefix, NULL, "triso5g", &sprom->fem.ghz5.tr_iso, 0);
348 nvram_read_u8(prefix, NULL, "antswctl5g", &sprom->fem.ghz5.antswlut, 0);
349 nvram_read_u8(prefix, NULL, "tempthresh", &sprom->tempthresh, 0);
350 nvram_read_u8(prefix, NULL, "tempoffset", &sprom->tempoffset, 0);
351 nvram_read_u16(prefix, NULL, "rawtempsense", &sprom->rawtempsense, 0);
352 nvram_read_u8(prefix, NULL, "measpower", &sprom->measpower, 0);
353 nvram_read_u8(prefix, NULL, "tempsense_slope",
354 &sprom->tempsense_slope, 0);
355 nvram_read_u8(prefix, NULL, "tempcorrx", &sprom->tempcorrx, 0);
356 nvram_read_u8(prefix, NULL, "tempsense_option",
357 &sprom->tempsense_option, 0);
358 nvram_read_u8(prefix, NULL, "freqoffset_corr",
359 &sprom->freqoffset_corr, 0);
360 nvram_read_u8(prefix, NULL, "iqcal_swp_dis", &sprom->iqcal_swp_dis, 0);
361 nvram_read_u8(prefix, NULL, "hw_iqcal_en", &sprom->hw_iqcal_en, 0);
362 nvram_read_u8(prefix, NULL, "elna2g", &sprom->elna2g, 0);
363 nvram_read_u8(prefix, NULL, "elna5g", &sprom->elna5g, 0);
364 nvram_read_u8(prefix, NULL, "phycal_tempdelta",
365 &sprom->phycal_tempdelta, 0);
366 nvram_read_u8(prefix, NULL, "temps_period", &sprom->temps_period, 0);
367 nvram_read_u8(prefix, NULL, "temps_hysteresis",
368 &sprom->temps_hysteresis, 0);
369 nvram_read_u8(prefix, NULL, "measpower1", &sprom->measpower1, 0);
370 nvram_read_u8(prefix, NULL, "measpower2", &sprom->measpower2, 0);
371 nvram_read_u8(prefix, NULL, "rxgainerr2ga0",
372 &sprom->rxgainerr2ga[0], 0);
373 nvram_read_u8(prefix, NULL, "rxgainerr2ga1",
374 &sprom->rxgainerr2ga[1], 0);
375 nvram_read_u8(prefix, NULL, "rxgainerr2ga2",
376 &sprom->rxgainerr2ga[2], 0);
377 nvram_read_u8(prefix, NULL, "rxgainerr5gla0",
378 &sprom->rxgainerr5gla[0], 0);
379 nvram_read_u8(prefix, NULL, "rxgainerr5gla1",
380 &sprom->rxgainerr5gla[1], 0);
381 nvram_read_u8(prefix, NULL, "rxgainerr5gla2",
382 &sprom->rxgainerr5gla[2], 0);
383 nvram_read_u8(prefix, NULL, "rxgainerr5gma0",
384 &sprom->rxgainerr5gma[0], 0);
385 nvram_read_u8(prefix, NULL, "rxgainerr5gma1",
386 &sprom->rxgainerr5gma[1], 0);
387 nvram_read_u8(prefix, NULL, "rxgainerr5gma2",
388 &sprom->rxgainerr5gma[2], 0);
389 nvram_read_u8(prefix, NULL, "rxgainerr5gha0",
390 &sprom->rxgainerr5gha[0], 0);
391 nvram_read_u8(prefix, NULL, "rxgainerr5gha1",
392 &sprom->rxgainerr5gha[1], 0);
393 nvram_read_u8(prefix, NULL, "rxgainerr5gha2",
394 &sprom->rxgainerr5gha[2], 0);
395 nvram_read_u8(prefix, NULL, "rxgainerr5gua0",
396 &sprom->rxgainerr5gua[0], 0);
397 nvram_read_u8(prefix, NULL, "rxgainerr5gua1",
398 &sprom->rxgainerr5gua[1], 0);
399 nvram_read_u8(prefix, NULL, "rxgainerr5gua2",
400 &sprom->rxgainerr5gua[2], 0);
401 nvram_read_u8(prefix, NULL, "noiselvl2ga0", &sprom->noiselvl2ga[0], 0);
402 nvram_read_u8(prefix, NULL, "noiselvl2ga1", &sprom->noiselvl2ga[1], 0);
403 nvram_read_u8(prefix, NULL, "noiselvl2ga2", &sprom->noiselvl2ga[2], 0);
404 nvram_read_u8(prefix, NULL, "noiselvl5gla0",
405 &sprom->noiselvl5gla[0], 0);
406 nvram_read_u8(prefix, NULL, "noiselvl5gla1",
407 &sprom->noiselvl5gla[1], 0);
408 nvram_read_u8(prefix, NULL, "noiselvl5gla2",
409 &sprom->noiselvl5gla[2], 0);
410 nvram_read_u8(prefix, NULL, "noiselvl5gma0",
411 &sprom->noiselvl5gma[0], 0);
412 nvram_read_u8(prefix, NULL, "noiselvl5gma1",
413 &sprom->noiselvl5gma[1], 0);
414 nvram_read_u8(prefix, NULL, "noiselvl5gma2",
415 &sprom->noiselvl5gma[2], 0);
416 nvram_read_u8(prefix, NULL, "noiselvl5gha0",
417 &sprom->noiselvl5gha[0], 0);
418 nvram_read_u8(prefix, NULL, "noiselvl5gha1",
419 &sprom->noiselvl5gha[1], 0);
420 nvram_read_u8(prefix, NULL, "noiselvl5gha2",
421 &sprom->noiselvl5gha[2], 0);
422 nvram_read_u8(prefix, NULL, "noiselvl5gua0",
423 &sprom->noiselvl5gua[0], 0);
424 nvram_read_u8(prefix, NULL, "noiselvl5gua1",
425 &sprom->noiselvl5gua[1], 0);
426 nvram_read_u8(prefix, NULL, "noiselvl5gua2",
427 &sprom->noiselvl5gua[2], 0);
428 nvram_read_u8(prefix, NULL, "pcieingress_war",
429 &sprom->pcieingress_war, 0);
430}
431
432static void bcm47xx_fill_sprom_r9(struct ssb_sprom *sprom, const char *prefix)
433{
434 nvram_read_u16(prefix, NULL, "cckbw202gpo", &sprom->cckbw202gpo, 0);
435 nvram_read_u16(prefix, NULL, "cckbw20ul2gpo", &sprom->cckbw20ul2gpo, 0);
436 nvram_read_u32(prefix, NULL, "legofdmbw202gpo",
437 &sprom->legofdmbw202gpo, 0);
438 nvram_read_u32(prefix, NULL, "legofdmbw20ul2gpo",
439 &sprom->legofdmbw20ul2gpo, 0);
440 nvram_read_u32(prefix, NULL, "legofdmbw205glpo",
441 &sprom->legofdmbw205glpo, 0);
442 nvram_read_u32(prefix, NULL, "legofdmbw20ul5glpo",
443 &sprom->legofdmbw20ul5glpo, 0);
444 nvram_read_u32(prefix, NULL, "legofdmbw205gmpo",
445 &sprom->legofdmbw205gmpo, 0);
446 nvram_read_u32(prefix, NULL, "legofdmbw20ul5gmpo",
447 &sprom->legofdmbw20ul5gmpo, 0);
448 nvram_read_u32(prefix, NULL, "legofdmbw205ghpo",
449 &sprom->legofdmbw205ghpo, 0);
450 nvram_read_u32(prefix, NULL, "legofdmbw20ul5ghpo",
451 &sprom->legofdmbw20ul5ghpo, 0);
452 nvram_read_u32(prefix, NULL, "mcsbw202gpo", &sprom->mcsbw202gpo, 0);
453 nvram_read_u32(prefix, NULL, "mcsbw20ul2gpo", &sprom->mcsbw20ul2gpo, 0);
454 nvram_read_u32(prefix, NULL, "mcsbw402gpo", &sprom->mcsbw402gpo, 0);
455 nvram_read_u32(prefix, NULL, "mcsbw205glpo", &sprom->mcsbw205glpo, 0);
456 nvram_read_u32(prefix, NULL, "mcsbw20ul5glpo",
457 &sprom->mcsbw20ul5glpo, 0);
458 nvram_read_u32(prefix, NULL, "mcsbw405glpo", &sprom->mcsbw405glpo, 0);
459 nvram_read_u32(prefix, NULL, "mcsbw205gmpo", &sprom->mcsbw205gmpo, 0);
460 nvram_read_u32(prefix, NULL, "mcsbw20ul5gmpo",
461 &sprom->mcsbw20ul5gmpo, 0);
462 nvram_read_u32(prefix, NULL, "mcsbw405gmpo", &sprom->mcsbw405gmpo, 0);
463 nvram_read_u32(prefix, NULL, "mcsbw205ghpo", &sprom->mcsbw205ghpo, 0);
464 nvram_read_u32(prefix, NULL, "mcsbw20ul5ghpo",
465 &sprom->mcsbw20ul5ghpo, 0);
466 nvram_read_u32(prefix, NULL, "mcsbw405ghpo", &sprom->mcsbw405ghpo, 0);
467 nvram_read_u16(prefix, NULL, "mcs32po", &sprom->mcs32po, 0);
468 nvram_read_u16(prefix, NULL, "legofdm40duppo",
469 &sprom->legofdm40duppo, 0);
470 nvram_read_u8(prefix, NULL, "sar2g", &sprom->sar2g, 0);
471 nvram_read_u8(prefix, NULL, "sar5g", &sprom->sar5g, 0);
472}
473
474static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
475 const char *prefix)
476{
477 char postfix[2];
478 int i;
479
480 for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
481 struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
482 snprintf(postfix, sizeof(postfix), "%i", i);
483 nvram_read_u8(prefix, postfix, "maxp2ga",
484 &pwr_info->maxpwr_2g, 0);
485 nvram_read_u8(prefix, postfix, "itt2ga",
486 &pwr_info->itssi_2g, 0);
487 nvram_read_u8(prefix, postfix, "itt5ga",
488 &pwr_info->itssi_5g, 0);
489 nvram_read_u16(prefix, postfix, "pa2gw0a",
490 &pwr_info->pa_2g[0], 0);
491 nvram_read_u16(prefix, postfix, "pa2gw1a",
492 &pwr_info->pa_2g[1], 0);
493 nvram_read_u16(prefix, postfix, "pa2gw2a",
494 &pwr_info->pa_2g[2], 0);
495 nvram_read_u8(prefix, postfix, "maxp5ga",
496 &pwr_info->maxpwr_5g, 0);
497 nvram_read_u8(prefix, postfix, "maxp5gha",
498 &pwr_info->maxpwr_5gh, 0);
499 nvram_read_u8(prefix, postfix, "maxp5gla",
500 &pwr_info->maxpwr_5gl, 0);
501 nvram_read_u16(prefix, postfix, "pa5gw0a",
502 &pwr_info->pa_5g[0], 0);
503 nvram_read_u16(prefix, postfix, "pa5gw1a",
504 &pwr_info->pa_5g[1], 0);
505 nvram_read_u16(prefix, postfix, "pa5gw2a",
506 &pwr_info->pa_5g[2], 0);
507 nvram_read_u16(prefix, postfix, "pa5glw0a",
508 &pwr_info->pa_5gl[0], 0);
509 nvram_read_u16(prefix, postfix, "pa5glw1a",
510 &pwr_info->pa_5gl[1], 0);
511 nvram_read_u16(prefix, postfix, "pa5glw2a",
512 &pwr_info->pa_5gl[2], 0);
513 nvram_read_u16(prefix, postfix, "pa5ghw0a",
514 &pwr_info->pa_5gh[0], 0);
515 nvram_read_u16(prefix, postfix, "pa5ghw1a",
516 &pwr_info->pa_5gh[1], 0);
517 nvram_read_u16(prefix, postfix, "pa5ghw2a",
518 &pwr_info->pa_5gh[2], 0);
519 }
520}
521
522static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
523 const char *prefix)
524{
525 char postfix[2];
526 int i;
527
528 for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
529 struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
530 snprintf(postfix, sizeof(postfix), "%i", i);
531 nvram_read_u16(prefix, postfix, "pa2gw3a",
532 &pwr_info->pa_2g[3], 0);
533 nvram_read_u16(prefix, postfix, "pa5gw3a",
534 &pwr_info->pa_5g[3], 0);
535 nvram_read_u16(prefix, postfix, "pa5glw3a",
536 &pwr_info->pa_5gl[3], 0);
537 nvram_read_u16(prefix, postfix, "pa5ghw3a",
538 &pwr_info->pa_5gh[3], 0);
539 }
540}
541
542void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix)
543{
544 nvram_read_macaddr(prefix, "et0macaddr", &sprom->et0mac);
545 nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0);
546 nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0);
547
548 nvram_read_macaddr(prefix, "et1macaddr", &sprom->et1mac);
549 nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0);
550 nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0);
551
552 nvram_read_macaddr(prefix, "macaddr", &sprom->il0mac);
553 nvram_read_macaddr(prefix, "il0macaddr", &sprom->il0mac);
554}
555
556void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)
557{
558 memset(sprom, 0, sizeof(struct ssb_sprom));
559
560 bcm47xx_fill_sprom_ethernet(sprom, prefix);
561
562 nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0);
563
564 switch (sprom->revision) {
565 case 1:
566 bcm47xx_fill_sprom_r1234589(sprom, prefix);
567 bcm47xx_fill_sprom_r12389(sprom, prefix);
568 bcm47xx_fill_sprom_r1(sprom, prefix);
569 break;
570 case 2:
571 bcm47xx_fill_sprom_r1234589(sprom, prefix);
572 bcm47xx_fill_sprom_r12389(sprom, prefix);
573 bcm47xx_fill_sprom_r2389(sprom, prefix);
574 bcm47xx_fill_sprom_r2(sprom, prefix);
575 break;
576 case 3:
577 bcm47xx_fill_sprom_r1234589(sprom, prefix);
578 bcm47xx_fill_sprom_r12389(sprom, prefix);
579 bcm47xx_fill_sprom_r2389(sprom, prefix);
580 bcm47xx_fill_sprom_r389(sprom, prefix);
581 bcm47xx_fill_sprom_r3(sprom, prefix);
582 break;
583 case 4:
584 case 5:
585 bcm47xx_fill_sprom_r1234589(sprom, prefix);
586 bcm47xx_fill_sprom_r4589(sprom, prefix);
587 bcm47xx_fill_sprom_r458(sprom, prefix);
588 bcm47xx_fill_sprom_r45(sprom, prefix);
589 bcm47xx_fill_sprom_path_r4589(sprom, prefix);
590 bcm47xx_fill_sprom_path_r45(sprom, prefix);
591 break;
592 case 8:
593 bcm47xx_fill_sprom_r1234589(sprom, prefix);
594 bcm47xx_fill_sprom_r12389(sprom, prefix);
595 bcm47xx_fill_sprom_r2389(sprom, prefix);
596 bcm47xx_fill_sprom_r389(sprom, prefix);
597 bcm47xx_fill_sprom_r4589(sprom, prefix);
598 bcm47xx_fill_sprom_r458(sprom, prefix);
599 bcm47xx_fill_sprom_r89(sprom, prefix);
600 bcm47xx_fill_sprom_path_r4589(sprom, prefix);
601 break;
602 case 9:
603 bcm47xx_fill_sprom_r1234589(sprom, prefix);
604 bcm47xx_fill_sprom_r12389(sprom, prefix);
605 bcm47xx_fill_sprom_r2389(sprom, prefix);
606 bcm47xx_fill_sprom_r389(sprom, prefix);
607 bcm47xx_fill_sprom_r4589(sprom, prefix);
608 bcm47xx_fill_sprom_r89(sprom, prefix);
609 bcm47xx_fill_sprom_r9(sprom, prefix);
610 bcm47xx_fill_sprom_path_r4589(sprom, prefix);
611 break;
612 default:
613 pr_warn("Unsupported SPROM revision %d detected. Will extract"
614 " v1\n", sprom->revision);
615 sprom->revision = 1;
616 bcm47xx_fill_sprom_r1234589(sprom, prefix);
617 bcm47xx_fill_sprom_r12389(sprom, prefix);
618 bcm47xx_fill_sprom_r1(sprom, prefix);
619 }
620}
diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
index de95e0723e2b..5ecaf47b34d2 100644
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
@@ -44,4 +44,7 @@ union bcm47xx_bus {
44extern union bcm47xx_bus bcm47xx_bus; 44extern union bcm47xx_bus bcm47xx_bus;
45extern enum bcm47xx_bus_type bcm47xx_bus_type; 45extern enum bcm47xx_bus_type bcm47xx_bus_type;
46 46
47void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix);
48void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix);
49
47#endif /* __ASM_BCM47XX_H */ 50#endif /* __ASM_BCM47XX_H */
diff --git a/arch/mips/include/asm/mach-bcm47xx/nvram.h b/arch/mips/include/asm/mach-bcm47xx/nvram.h
index 184d5ecb5f51..69ef3efe06e7 100644
--- a/arch/mips/include/asm/mach-bcm47xx/nvram.h
+++ b/arch/mips/include/asm/mach-bcm47xx/nvram.h
@@ -37,7 +37,7 @@ struct nvram_header {
37 37
38extern int nvram_getenv(char *name, char *val, size_t val_len); 38extern int nvram_getenv(char *name, char *val, size_t val_len);
39 39
40static inline void nvram_parse_macaddr(char *buf, u8 *macaddr) 40static inline void nvram_parse_macaddr(char *buf, u8 macaddr[6])
41{ 41{
42 if (strchr(buf, ':')) 42 if (strchr(buf, ':'))
43 sscanf(buf, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &macaddr[0], 43 sscanf(buf, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &macaddr[0],
diff --git a/arch/mips/include/asm/socket.h b/arch/mips/include/asm/socket.h
index ad5c0a7a02a7..a2ed6fdad4e0 100644
--- a/arch/mips/include/asm/socket.h
+++ b/arch/mips/include/asm/socket.h
@@ -84,6 +84,10 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */
84 84
85#define SO_WIFI_STATUS 41 85#define SO_WIFI_STATUS 41
86#define SCM_WIFI_STATUS SO_WIFI_STATUS 86#define SCM_WIFI_STATUS SO_WIFI_STATUS
87#define SO_PEEK_OFF 42
88
89/* Instruct lower device to use last 4-bytes of skb data as FCS */
90#define SO_NOFCS 43
87 91
88#ifdef __KERNEL__ 92#ifdef __KERNEL__
89 93
diff --git a/arch/mips/pci/pci-bcm47xx.c b/arch/mips/pci/pci-bcm47xx.c
index 400535a955d0..c682468010c5 100644
--- a/arch/mips/pci/pci-bcm47xx.c
+++ b/arch/mips/pci/pci-bcm47xx.c
@@ -25,6 +25,7 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/pci.h> 26#include <linux/pci.h>
27#include <linux/ssb/ssb.h> 27#include <linux/ssb/ssb.h>
28#include <linux/bcma/bcma.h>
28#include <bcm47xx.h> 29#include <bcm47xx.h>
29 30
30int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 31int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
@@ -32,15 +33,12 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
32 return 0; 33 return 0;
33} 34}
34 35
35int pcibios_plat_dev_init(struct pci_dev *dev)
36{
37#ifdef CONFIG_BCM47XX_SSB 36#ifdef CONFIG_BCM47XX_SSB
37static int bcm47xx_pcibios_plat_dev_init_ssb(struct pci_dev *dev)
38{
38 int res; 39 int res;
39 u8 slot, pin; 40 u8 slot, pin;
40 41
41 if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB)
42 return 0;
43
44 res = ssb_pcibios_plat_dev_init(dev); 42 res = ssb_pcibios_plat_dev_init(dev);
45 if (res < 0) { 43 if (res < 0) {
46 printk(KERN_ALERT "PCI: Failed to init device %s\n", 44 printk(KERN_ALERT "PCI: Failed to init device %s\n",
@@ -60,6 +58,47 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
60 } 58 }
61 59
62 dev->irq = res; 60 dev->irq = res;
61 return 0;
62}
63#endif 63#endif
64
65#ifdef CONFIG_BCM47XX_BCMA
66static int bcm47xx_pcibios_plat_dev_init_bcma(struct pci_dev *dev)
67{
68 int res;
69
70 res = bcma_core_pci_plat_dev_init(dev);
71 if (res < 0) {
72 printk(KERN_ALERT "PCI: Failed to init device %s\n",
73 pci_name(dev));
74 return res;
75 }
76
77 res = bcma_core_pci_pcibios_map_irq(dev);
78
79 /* IRQ-0 and IRQ-1 are software interrupts. */
80 if (res < 2) {
81 printk(KERN_ALERT "PCI: Failed to map IRQ of device %s\n",
82 pci_name(dev));
83 return res;
84 }
85
86 dev->irq = res;
64 return 0; 87 return 0;
65} 88}
89#endif
90
91int pcibios_plat_dev_init(struct pci_dev *dev)
92{
93#ifdef CONFIG_BCM47XX_SSB
94 if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_SSB)
95 return bcm47xx_pcibios_plat_dev_init_ssb(dev);
96 else
97#endif
98#ifdef CONFIG_BCM47XX_BCMA
99 if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA)
100 return bcm47xx_pcibios_plat_dev_init_bcma(dev);
101 else
102#endif
103 return 0;
104}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-31 18:33:13 -0500