aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-08-08 01:56:19 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-08-08 01:56:19 -0400
commit18d4ed4342c14ebeebe60d267b171053efcdfa87 (patch)
treef315e77f66cbb70869e2f80cde5c18380a80901e /arch/mips
parent722d0daf2b607a32dad1357bf797e3803484af0a (diff)
parent22de4534ae12d61257fc0e53d2571686b03305bc (diff)
Merge branch 'for-3.1' into for-3.2
Conflict due to the fix for the register map failure - taken the for-3.1 version. Conflicts: sound/soc/codecs/sgtl5000.c
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kbuild.platforms1
-rw-r--r--arch/mips/Kconfig20
-rw-r--r--arch/mips/Makefile12
-rw-r--r--arch/mips/ar7/clock.c2
-rw-r--r--arch/mips/ar7/platform.c2
-rw-r--r--arch/mips/ar7/prom.c2
-rw-r--r--arch/mips/bcm47xx/setup.c2
-rw-r--r--arch/mips/cobalt/time.c2
-rw-r--r--arch/mips/configs/mtx1_defconfig2
-rw-r--r--arch/mips/include/asm/atomic.h17
-rw-r--r--arch/mips/include/asm/fixmap.h10
-rw-r--r--arch/mips/include/asm/floppy.h2
-rw-r--r--arch/mips/include/asm/gt64120.h2
-rw-r--r--arch/mips/include/asm/hw_irq.h2
-rw-r--r--arch/mips/include/asm/i8253.h24
-rw-r--r--arch/mips/include/asm/irq.h1
-rw-r--r--arch/mips/include/asm/local.h2
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h1
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/spaces.h17
-rw-r--r--arch/mips/include/asm/mach-generic/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-generic/spaces.h4
-rw-r--r--arch/mips/include/asm/mach-ip27/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-jazz/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-jz4740/gpio.h5
-rw-r--r--arch/mips/include/asm/mach-loongson/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-malta/cpu-feature-overrides.h2
-rw-r--r--arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h2
-rw-r--r--arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h59
-rw-r--r--arch/mips/include/asm/mach-powertv/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-tx39xx/spaces.h17
-rw-r--r--arch/mips/include/asm/mach-tx49xx/spaces.h17
-rw-r--r--arch/mips/include/asm/pgtable.h1
-rw-r--r--arch/mips/include/asm/smp-ops.h43
-rw-r--r--arch/mips/include/asm/smp.h2
-rw-r--r--arch/mips/include/asm/smtc.h1
-rw-r--r--arch/mips/include/asm/stacktrace.h4
-rw-r--r--arch/mips/include/asm/uasm.h2
-rw-r--r--arch/mips/include/asm/unistd.h21
-rw-r--r--arch/mips/jazz/irq.c2
-rw-r--r--arch/mips/kernel/cpu-probe.c1
-rw-r--r--arch/mips/kernel/i8253.c102
-rw-r--r--arch/mips/kernel/i8259.c22
-rw-r--r--arch/mips/kernel/irq.c2
-rw-r--r--arch/mips/kernel/irq_cpu.c14
-rw-r--r--arch/mips/kernel/mips-mt.c2
-rw-r--r--arch/mips/kernel/module.c20
-rw-r--r--arch/mips/kernel/perf_event.c4
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c28
-rw-r--r--arch/mips/kernel/process.c20
-rw-r--r--arch/mips/kernel/rtlx.c2
-rw-r--r--arch/mips/kernel/scall32-o32.S1
-rw-r--r--arch/mips/kernel/scall64-64.S1
-rw-r--r--arch/mips/kernel/scall64-n32.S1
-rw-r--r--arch/mips/kernel/scall64-o32.S1
-rw-r--r--arch/mips/kernel/smp-cmp.c2
-rw-r--r--arch/mips/kernel/smp-mt.c2
-rw-r--r--arch/mips/kernel/smp.c2
-rw-r--r--arch/mips/kernel/smtc-proc.c2
-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--arch/mips/kernel/sync-r4k.c2
-rw-r--r--arch/mips/kernel/traps.c8
-rw-r--r--arch/mips/kernel/unaligned.c5
-rw-r--r--arch/mips/kernel/vpe.c2
-rw-r--r--arch/mips/lantiq/clk.c13
-rw-r--r--arch/mips/lantiq/devices.c2
-rw-r--r--arch/mips/lantiq/xway/devices.c2
-rw-r--r--arch/mips/loongson/lemote-2f/ec_kb3310b.c2
-rw-r--r--arch/mips/math-emu/cp1emu.c3
-rw-r--r--arch/mips/mipssim/sim_setup.c18
-rw-r--r--arch/mips/mipssim/sim_smtc.c2
-rw-r--r--arch/mips/mm/c-r4k.c4
-rw-r--r--arch/mips/mm/dma-default.c114
-rw-r--r--arch/mips/mm/fault.c8
-rw-r--r--arch/mips/mm/init.c8
-rw-r--r--arch/mips/mm/mmap.c193
-rw-r--r--arch/mips/mm/pgtable-32.c2
-rw-r--r--arch/mips/mm/pgtable-64.c2
-rw-r--r--arch/mips/mm/tlbex.c292
-rw-r--r--arch/mips/mti-malta/malta-init.c14
-rw-r--r--arch/mips/mti-malta/malta-smtc.c2
-rw-r--r--arch/mips/mti-malta/malta-time.c2
-rw-r--r--arch/mips/netlogic/Platform11
-rw-r--r--arch/mips/netlogic/xlr/irq.c2
-rw-r--r--arch/mips/netlogic/xlr/smp.c13
-rw-r--r--arch/mips/nxp/pnx8550/common/setup.c2
-rw-r--r--arch/mips/oprofile/Makefile2
-rw-r--r--arch/mips/oprofile/backtrace.c175
-rw-r--r--arch/mips/oprofile/common.c1
-rw-r--r--arch/mips/oprofile/op_impl.h2
-rw-r--r--arch/mips/pci/ops-nile4.c1
-rw-r--r--arch/mips/pci/pci-rc32434.c2
-rw-r--r--arch/mips/pci/pci-vr41xx.c2
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_setup.c8
-rw-r--r--arch/mips/pnx8550/common/setup.c2
-rw-r--r--arch/mips/powertv/asic/asic_devices.c10
-rw-r--r--arch/mips/rb532/devices.c24
-rw-r--r--arch/mips/sgi-ip22/ip22-time.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-nmi.c2
-rw-r--r--arch/mips/sibyte/sb1250/irq.c8
-rw-r--r--arch/mips/sni/time.c2
100 files changed, 982 insertions, 530 deletions
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index aef6c917b45a..5ce8029f558b 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -16,6 +16,7 @@ platforms += lasat
16platforms += loongson 16platforms += loongson
17platforms += mipssim 17platforms += mipssim
18platforms += mti-malta 18platforms += mti-malta
19platforms += netlogic
19platforms += pmc-sierra 20platforms += pmc-sierra
20platforms += pnx833x 21platforms += pnx833x
21platforms += pnx8550 22platforms += pnx8550
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 653da62d0682..177cdaf83564 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -185,6 +185,7 @@ config MACH_JAZZ
185 select CSRC_R4K 185 select CSRC_R4K
186 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 186 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
187 select GENERIC_ISA_DMA 187 select GENERIC_ISA_DMA
188 select HAVE_PCSPKR_PLATFORM
188 select IRQ_CPU 189 select IRQ_CPU
189 select I8253 190 select I8253
190 select I8259 191 select I8259
@@ -266,6 +267,7 @@ config MIPS_MALTA
266 select CSRC_R4K 267 select CSRC_R4K
267 select DMA_NONCOHERENT 268 select DMA_NONCOHERENT
268 select GENERIC_ISA_DMA 269 select GENERIC_ISA_DMA
270 select HAVE_PCSPKR_PLATFORM
269 select IRQ_CPU 271 select IRQ_CPU
270 select IRQ_GIC 272 select IRQ_GIC
271 select HW_HAS_PCI 273 select HW_HAS_PCI
@@ -640,6 +642,7 @@ config SNI_RM
640 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 642 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
641 select DMA_NONCOHERENT 643 select DMA_NONCOHERENT
642 select GENERIC_ISA_DMA 644 select GENERIC_ISA_DMA
645 select HAVE_PCSPKR_PLATFORM
643 select HW_HAS_EISA 646 select HW_HAS_EISA
644 select HW_HAS_PCI 647 select HW_HAS_PCI
645 select IRQ_CPU 648 select IRQ_CPU
@@ -2388,6 +2391,7 @@ config MMU
2388config I8253 2391config I8253
2389 bool 2392 bool
2390 select CLKSRC_I8253 2393 select CLKSRC_I8253
2394 select CLKEVT_I8253
2391 select MIPS_EXTERNAL_TIMER 2395 select MIPS_EXTERNAL_TIMER
2392 2396
2393config ZONE_DMA32 2397config ZONE_DMA32
@@ -2489,20 +2493,4 @@ source "security/Kconfig"
2489 2493
2490source "crypto/Kconfig" 2494source "crypto/Kconfig"
2491 2495
2492menuconfig VIRTUALIZATION
2493 bool "Virtualization"
2494 default n
2495 ---help---
2496 Say Y here to get to see options for using your Linux host to run other
2497 operating systems inside virtual machines (guests).
2498 This option alone does not add any kernel code.
2499
2500 If you say N, all options in this submenu will be skipped and disabled.
2501
2502if VIRTUALIZATION
2503
2504source drivers/virtio/Kconfig
2505
2506endif # VIRTUALIZATION
2507
2508source "lib/Kconfig" 2496source "lib/Kconfig"
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 884819cd0607..53e3514ba10e 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -191,18 +191,6 @@ endif
191# 191#
192include $(srctree)/arch/mips/Kbuild.platforms 192include $(srctree)/arch/mips/Kbuild.platforms
193 193
194#
195# NETLOGIC SOC Common (common)
196#
197cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/mach-netlogic
198cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/netlogic
199
200#
201# NETLOGIC XLR/XLS SoC, Simulator and boards
202#
203core-$(CONFIG_NLM_XLR) += arch/mips/netlogic/xlr/
204load-$(CONFIG_NLM_XLR_BOARD) += 0xffffffff84000000
205
206cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic 194cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic
207drivers-$(CONFIG_PCI) += arch/mips/pci/ 195drivers-$(CONFIG_PCI) += arch/mips/pci/
208 196
diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c
index 2ca4ada1c291..2460f9d23f1b 100644
--- a/arch/mips/ar7/clock.c
+++ b/arch/mips/ar7/clock.c
@@ -443,7 +443,7 @@ struct clk *clk_get(struct device *dev, const char *id)
443 return &vbus_clk; 443 return &vbus_clk;
444 if (!strcmp(id, "cpu")) 444 if (!strcmp(id, "cpu"))
445 return &cpu_clk; 445 return &cpu_clk;
446 if (!strcmp(id, "dsp")); 446 if (!strcmp(id, "dsp"))
447 return &dsp_clk; 447 return &dsp_clk;
448 if (!strcmp(id, "vbus")) 448 if (!strcmp(id, "vbus"))
449 return &vbus_clk; 449 return &vbus_clk;
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 7d2fab392327..33ffecf6a6d6 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -229,7 +229,7 @@ static struct resource cpmac_low_res[] = {
229 .name = "irq", 229 .name = "irq",
230 .flags = IORESOURCE_IRQ, 230 .flags = IORESOURCE_IRQ,
231 .start = 27, 231 .start = 27,
232 .end = 27, 232 .end = 27,
233 }, 233 },
234}; 234};
235 235
diff --git a/arch/mips/ar7/prom.c b/arch/mips/ar7/prom.c
index 23818d299127..8088c6fdb83e 100644
--- a/arch/mips/ar7/prom.c
+++ b/arch/mips/ar7/prom.c
@@ -77,7 +77,7 @@ struct psp_env_chunk {
77 u16 csum; 77 u16 csum;
78 u8 len; 78 u8 len;
79 char data[11]; 79 char data[11];
80} __attribute__ ((packed)); 80} __packed;
81 81
82struct psp_var_map_entry { 82struct psp_var_map_entry {
83 u8 num; 83 u8 num;
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 73b529b57433..cfae81571ded 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> 2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> 3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4 * Copyright (C) 2006 Michael Buesch <mb@bu3sch.de> 4 * Copyright (C) 2006 Michael Buesch <m@bues.ch>
5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org> 5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6 * Copyright (C) 2010-2011 Hauke Mehrtens <hauke@hauke-m.de> 6 * Copyright (C) 2010-2011 Hauke Mehrtens <hauke@hauke-m.de>
7 * 7 *
diff --git a/arch/mips/cobalt/time.c b/arch/mips/cobalt/time.c
index 0162f9edc693..3bff3b820baf 100644
--- a/arch/mips/cobalt/time.c
+++ b/arch/mips/cobalt/time.c
@@ -17,10 +17,10 @@
17 * along with this program; if not, write to the Free Software 17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */ 19 */
20#include <linux/i8253.h>
20#include <linux/init.h> 21#include <linux/init.h>
21 22
22#include <asm/gt64120.h> 23#include <asm/gt64120.h>
23#include <asm/i8253.h>
24#include <asm/time.h> 24#include <asm/time.h>
25 25
26#define GT641XX_BASE_CLOCK 50000000 /* 50MHz */ 26#define GT641XX_BASE_CLOCK 50000000 /* 50MHz */
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
index 37862b2ce363..807c97eed8a8 100644
--- a/arch/mips/configs/mtx1_defconfig
+++ b/arch/mips/configs/mtx1_defconfig
@@ -678,7 +678,7 @@ CONFIG_LEDS_TRIGGERS=y
678CONFIG_LEDS_TRIGGER_TIMER=y 678CONFIG_LEDS_TRIGGER_TIMER=y
679CONFIG_LEDS_TRIGGER_HEARTBEAT=y 679CONFIG_LEDS_TRIGGER_HEARTBEAT=y
680CONFIG_LEDS_TRIGGER_DEFAULT_ON=y 680CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
681CONFIG_RTC_CLASS=m 681CONFIG_RTC_CLASS=y
682CONFIG_RTC_INTF_DEV_UIE_EMUL=y 682CONFIG_RTC_INTF_DEV_UIE_EMUL=y
683CONFIG_RTC_DRV_TEST=m 683CONFIG_RTC_DRV_TEST=m
684CONFIG_RTC_DRV_DS1307=m 684CONFIG_RTC_DRV_DS1307=m
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 4a02fe891ab6..1d93f81d57e7 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -303,15 +303,15 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
303#define atomic_xchg(v, new) (xchg(&((v)->counter), (new))) 303#define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))
304 304
305/** 305/**
306 * atomic_add_unless - add unless the number is a given value 306 * __atomic_add_unless - add unless the number is a given value
307 * @v: pointer of type atomic_t 307 * @v: pointer of type atomic_t
308 * @a: the amount to add to v... 308 * @a: the amount to add to v...
309 * @u: ...unless v is equal to u. 309 * @u: ...unless v is equal to u.
310 * 310 *
311 * Atomically adds @a to @v, so long as it was not @u. 311 * Atomically adds @a to @v, so long as it was not @u.
312 * Returns non-zero if @v was not @u, and zero otherwise. 312 * Returns the old value of @v.
313 */ 313 */
314static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) 314static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
315{ 315{
316 int c, old; 316 int c, old;
317 c = atomic_read(v); 317 c = atomic_read(v);
@@ -323,9 +323,8 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
323 break; 323 break;
324 c = old; 324 c = old;
325 } 325 }
326 return c != (u); 326 return c;
327} 327}
328#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
329 328
330#define atomic_dec_return(v) atomic_sub_return(1, (v)) 329#define atomic_dec_return(v) atomic_sub_return(1, (v))
331#define atomic_inc_return(v) atomic_add_return(1, (v)) 330#define atomic_inc_return(v) atomic_add_return(1, (v))
@@ -680,7 +679,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
680 * @u: ...unless v is equal to u. 679 * @u: ...unless v is equal to u.
681 * 680 *
682 * Atomically adds @a to @v, so long as it was not @u. 681 * Atomically adds @a to @v, so long as it was not @u.
683 * Returns non-zero if @v was not @u, and zero otherwise. 682 * Returns the old value of @v.
684 */ 683 */
685static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) 684static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
686{ 685{
@@ -766,10 +765,6 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
766 */ 765 */
767#define atomic64_add_negative(i, v) (atomic64_add_return(i, (v)) < 0) 766#define atomic64_add_negative(i, v) (atomic64_add_return(i, (v)) < 0)
768 767
769#else /* !CONFIG_64BIT */
770
771#include <asm-generic/atomic64.h>
772
773#endif /* CONFIG_64BIT */ 768#endif /* CONFIG_64BIT */
774 769
775/* 770/*
@@ -781,6 +776,4 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
781#define smp_mb__before_atomic_inc() smp_mb__before_llsc() 776#define smp_mb__before_atomic_inc() smp_mb__before_llsc()
782#define smp_mb__after_atomic_inc() smp_llsc_mb() 777#define smp_mb__after_atomic_inc() smp_llsc_mb()
783 778
784#include <asm-generic/atomic-long.h>
785
786#endif /* _ASM_ATOMIC_H */ 779#endif /* _ASM_ATOMIC_H */
diff --git a/arch/mips/include/asm/fixmap.h b/arch/mips/include/asm/fixmap.h
index 0b89b83e2055..98bcc98cf29b 100644
--- a/arch/mips/include/asm/fixmap.h
+++ b/arch/mips/include/asm/fixmap.h
@@ -14,6 +14,7 @@
14#define _ASM_FIXMAP_H 14#define _ASM_FIXMAP_H
15 15
16#include <asm/page.h> 16#include <asm/page.h>
17#include <spaces.h>
17#ifdef CONFIG_HIGHMEM 18#ifdef CONFIG_HIGHMEM
18#include <linux/threads.h> 19#include <linux/threads.h>
19#include <asm/kmap_types.h> 20#include <asm/kmap_types.h>
@@ -67,15 +68,6 @@ enum fixed_addresses {
67 * the start of the fixmap, and leave one page empty 68 * the start of the fixmap, and leave one page empty
68 * at the top of mem.. 69 * at the top of mem..
69 */ 70 */
70#ifdef CONFIG_BCM63XX
71#define FIXADDR_TOP ((unsigned long)(long)(int)0xff000000)
72#else
73#if defined(CONFIG_CPU_TX39XX) || defined(CONFIG_CPU_TX49XX)
74#define FIXADDR_TOP ((unsigned long)(long)(int)(0xff000000 - 0x20000))
75#else
76#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000)
77#endif
78#endif
79#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) 71#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
80#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 72#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
81 73
diff --git a/arch/mips/include/asm/floppy.h b/arch/mips/include/asm/floppy.h
index c5c7c0e6064c..4456c9c47e21 100644
--- a/arch/mips/include/asm/floppy.h
+++ b/arch/mips/include/asm/floppy.h
@@ -29,7 +29,7 @@ static inline void fd_cacheflush(char * addr, long size)
29#define FLOPPY0_TYPE fd_drive_type(0) 29#define FLOPPY0_TYPE fd_drive_type(0)
30#define FLOPPY1_TYPE fd_drive_type(1) 30#define FLOPPY1_TYPE fd_drive_type(1)
31 31
32#define FDC1 fd_getfdaddr1(); 32#define FDC1 fd_getfdaddr1()
33 33
34#define N_FDC 1 /* do you *really* want a second controller? */ 34#define N_FDC 1 /* do you *really* want a second controller? */
35#define N_DRIVE 8 35#define N_DRIVE 8
diff --git a/arch/mips/include/asm/gt64120.h b/arch/mips/include/asm/gt64120.h
index e64b41093c49..0aa44abc77fe 100644
--- a/arch/mips/include/asm/gt64120.h
+++ b/arch/mips/include/asm/gt64120.h
@@ -21,8 +21,6 @@
21#ifndef _ASM_GT64120_H 21#ifndef _ASM_GT64120_H
22#define _ASM_GT64120_H 22#define _ASM_GT64120_H
23 23
24#include <linux/clocksource.h>
25
26#include <asm/addrspace.h> 24#include <asm/addrspace.h>
27#include <asm/byteorder.h> 25#include <asm/byteorder.h>
28 26
diff --git a/arch/mips/include/asm/hw_irq.h b/arch/mips/include/asm/hw_irq.h
index 77adda297ad9..9e8ef5994c9c 100644
--- a/arch/mips/include/asm/hw_irq.h
+++ b/arch/mips/include/asm/hw_irq.h
@@ -8,7 +8,7 @@
8#ifndef __ASM_HW_IRQ_H 8#ifndef __ASM_HW_IRQ_H
9#define __ASM_HW_IRQ_H 9#define __ASM_HW_IRQ_H
10 10
11#include <asm/atomic.h> 11#include <linux/atomic.h>
12 12
13extern atomic_t irq_err_count; 13extern atomic_t irq_err_count;
14 14
diff --git a/arch/mips/include/asm/i8253.h b/arch/mips/include/asm/i8253.h
deleted file mode 100644
index 9ad011366f73..000000000000
--- a/arch/mips/include/asm/i8253.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * Machine specific IO port address definition for generic.
3 * Written by Osamu Tomita <tomita@cinet.co.jp>
4 */
5#ifndef __ASM_I8253_H
6#define __ASM_I8253_H
7
8#include <linux/spinlock.h>
9
10/* i8253A PIT registers */
11#define PIT_MODE 0x43
12#define PIT_CH0 0x40
13#define PIT_CH2 0x42
14
15#define PIT_LATCH LATCH
16
17extern raw_spinlock_t i8253_lock;
18
19extern void setup_pit_timer(void);
20
21#define inb_pit inb_p
22#define outb_pit outb_p
23
24#endif /* __ASM_I8253_H */
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index 0ec01294b063..2354c870a63a 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -18,7 +18,6 @@
18 18
19static inline void irq_dispose_mapping(unsigned int virq) 19static inline void irq_dispose_mapping(unsigned int virq)
20{ 20{
21 return;
22} 21}
23 22
24#ifdef CONFIG_I8259 23#ifdef CONFIG_I8259
diff --git a/arch/mips/include/asm/local.h b/arch/mips/include/asm/local.h
index fffc8307a80a..94fde8d0fac1 100644
--- a/arch/mips/include/asm/local.h
+++ b/arch/mips/include/asm/local.h
@@ -3,7 +3,7 @@
3 3
4#include <linux/percpu.h> 4#include <linux/percpu.h>
5#include <linux/bitops.h> 5#include <linux/bitops.h>
6#include <asm/atomic.h> 6#include <linux/atomic.h>
7#include <asm/cmpxchg.h> 7#include <asm/cmpxchg.h>
8#include <asm/war.h> 8#include <asm/war.h>
9 9
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 85fd27509aac..0ed5230243c9 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -89,7 +89,6 @@
89 89
90/* Interrupt Mask register */ 90/* Interrupt Mask register */
91#define PERF_IRQMASK_REG 0xc 91#define PERF_IRQMASK_REG 0xc
92#define PERF_IRQSTAT_REG 0x10
93 92
94/* Interrupt Status register */ 93/* Interrupt Status register */
95#define PERF_IRQSTAT_REG 0x10 94#define PERF_IRQSTAT_REG 0x10
diff --git a/arch/mips/include/asm/mach-bcm63xx/spaces.h b/arch/mips/include/asm/mach-bcm63xx/spaces.h
new file mode 100644
index 000000000000..61e750fb4653
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/spaces.h
@@ -0,0 +1,17 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
7 * Copyright (C) 2000, 2002 Maciej W. Rozycki
8 * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
9 */
10#ifndef _ASM_BCM63XX_SPACES_H
11#define _ASM_BCM63XX_SPACES_H
12
13#define FIXADDR_TOP ((unsigned long)(long)(int)0xff000000)
14
15#include <asm/mach-generic/spaces.h>
16
17#endif /* __ASM_BCM63XX_SPACES_H */
diff --git a/arch/mips/include/asm/mach-generic/dma-coherence.h b/arch/mips/include/asm/mach-generic/dma-coherence.h
index 8da98073e952..9c95177f7a7e 100644
--- a/arch/mips/include/asm/mach-generic/dma-coherence.h
+++ b/arch/mips/include/asm/mach-generic/dma-coherence.h
@@ -49,7 +49,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
49 49
50static inline void plat_extra_sync_for_device(struct device *dev) 50static inline void plat_extra_sync_for_device(struct device *dev)
51{ 51{
52 return;
53} 52}
54 53
55static inline int plat_dma_mapping_error(struct device *dev, 54static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h
index c9fa4b14968d..d7a9efd3a5ce 100644
--- a/arch/mips/include/asm/mach-generic/spaces.h
+++ b/arch/mips/include/asm/mach-generic/spaces.h
@@ -82,4 +82,8 @@
82#define PAGE_OFFSET (CAC_BASE + PHYS_OFFSET) 82#define PAGE_OFFSET (CAC_BASE + PHYS_OFFSET)
83#endif 83#endif
84 84
85#ifndef FIXADDR_TOP
86#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000)
87#endif
88
85#endif /* __ASM_MACH_GENERIC_SPACES_H */ 89#endif /* __ASM_MACH_GENERIC_SPACES_H */
diff --git a/arch/mips/include/asm/mach-ip27/dma-coherence.h b/arch/mips/include/asm/mach-ip27/dma-coherence.h
index 016d0989b141..06c441968e6e 100644
--- a/arch/mips/include/asm/mach-ip27/dma-coherence.h
+++ b/arch/mips/include/asm/mach-ip27/dma-coherence.h
@@ -60,7 +60,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
60 60
61static inline void plat_extra_sync_for_device(struct device *dev) 61static inline void plat_extra_sync_for_device(struct device *dev)
62{ 62{
63 return;
64} 63}
65 64
66static inline int plat_dma_mapping_error(struct device *dev, 65static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-jazz/dma-coherence.h b/arch/mips/include/asm/mach-jazz/dma-coherence.h
index 302101b54acb..9fc1e9ad7038 100644
--- a/arch/mips/include/asm/mach-jazz/dma-coherence.h
+++ b/arch/mips/include/asm/mach-jazz/dma-coherence.h
@@ -50,7 +50,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
50 50
51static inline void plat_extra_sync_for_device(struct device *dev) 51static inline void plat_extra_sync_for_device(struct device *dev)
52{ 52{
53 return;
54} 53}
55 54
56static inline int plat_dma_mapping_error(struct device *dev, 55static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-jz4740/gpio.h b/arch/mips/include/asm/mach-jz4740/gpio.h
index 7b74703745bb..1a6482ea0bb3 100644
--- a/arch/mips/include/asm/mach-jz4740/gpio.h
+++ b/arch/mips/include/asm/mach-jz4740/gpio.h
@@ -25,14 +25,13 @@ enum jz_gpio_function {
25 JZ_GPIO_FUNC3, 25 JZ_GPIO_FUNC3,
26}; 26};
27 27
28
29/* 28/*
30 Usually a driver for a SoC component has to request several gpio pins and 29 Usually a driver for a SoC component has to request several gpio pins and
31 configure them as funcion pins. 30 configure them as funcion pins.
32 jz_gpio_bulk_request can be used to ease this process. 31 jz_gpio_bulk_request can be used to ease this process.
33 Usually one would do something like: 32 Usually one would do something like:
34 33
35 const static struct jz_gpio_bulk_request i2c_pins[] = { 34 static const struct jz_gpio_bulk_request i2c_pins[] = {
36 JZ_GPIO_BULK_PIN(I2C_SDA), 35 JZ_GPIO_BULK_PIN(I2C_SDA),
37 JZ_GPIO_BULK_PIN(I2C_SCK), 36 JZ_GPIO_BULK_PIN(I2C_SCK),
38 }; 37 };
@@ -47,8 +46,8 @@ enum jz_gpio_function {
47 46
48 jz_gpio_bulk_free(i2c_pins, ARRAY_SIZE(i2c_pins)); 47 jz_gpio_bulk_free(i2c_pins, ARRAY_SIZE(i2c_pins));
49 48
50
51*/ 49*/
50
52struct jz_gpio_bulk_request { 51struct jz_gpio_bulk_request {
53 int gpio; 52 int gpio;
54 const char *name; 53 const char *name;
diff --git a/arch/mips/include/asm/mach-loongson/dma-coherence.h b/arch/mips/include/asm/mach-loongson/dma-coherence.h
index 981c75f91a7d..e1433055fe98 100644
--- a/arch/mips/include/asm/mach-loongson/dma-coherence.h
+++ b/arch/mips/include/asm/mach-loongson/dma-coherence.h
@@ -55,7 +55,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
55 55
56static inline void plat_extra_sync_for_device(struct device *dev) 56static inline void plat_extra_sync_for_device(struct device *dev)
57{ 57{
58 return;
59} 58}
60 59
61static inline int plat_dma_mapping_error(struct device *dev, 60static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
index 2848cea42bce..37e3583a9fdd 100644
--- a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
@@ -32,6 +32,7 @@
32/* #define cpu_has_vtag_icache ? */ 32/* #define cpu_has_vtag_icache ? */
33/* #define cpu_has_dc_aliases ? */ 33/* #define cpu_has_dc_aliases ? */
34/* #define cpu_has_ic_fills_f_dc ? */ 34/* #define cpu_has_ic_fills_f_dc ? */
35#define cpu_has_clo_clz 1
35#define cpu_has_nofpuex 0 36#define cpu_has_nofpuex 0
36/* #define cpu_has_64bits ? */ 37/* #define cpu_has_64bits ? */
37/* #define cpu_has_64bit_zero_reg ? */ 38/* #define cpu_has_64bit_zero_reg ? */
@@ -58,6 +59,7 @@
58/* #define cpu_has_vtag_icache ? */ 59/* #define cpu_has_vtag_icache ? */
59/* #define cpu_has_dc_aliases ? */ 60/* #define cpu_has_dc_aliases ? */
60/* #define cpu_has_ic_fills_f_dc ? */ 61/* #define cpu_has_ic_fills_f_dc ? */
62#define cpu_has_clo_clz 1
61#define cpu_has_nofpuex 0 63#define cpu_has_nofpuex 0
62/* #define cpu_has_64bits ? */ 64/* #define cpu_has_64bits ? */
63/* #define cpu_has_64bit_zero_reg ? */ 65/* #define cpu_has_64bit_zero_reg ? */
diff --git a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
index 779b02205737..27aaaa5d925e 100644
--- a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
@@ -31,6 +31,7 @@
31/* #define cpu_has_vtag_icache ? */ 31/* #define cpu_has_vtag_icache ? */
32/* #define cpu_has_dc_aliases ? */ 32/* #define cpu_has_dc_aliases ? */
33/* #define cpu_has_ic_fills_f_dc ? */ 33/* #define cpu_has_ic_fills_f_dc ? */
34#define cpu_has_clo_clz 1
34#define cpu_has_nofpuex 0 35#define cpu_has_nofpuex 0
35/* #define cpu_has_64bits ? */ 36/* #define cpu_has_64bits ? */
36/* #define cpu_has_64bit_zero_reg ? */ 37/* #define cpu_has_64bit_zero_reg ? */
@@ -56,6 +57,7 @@
56/* #define cpu_has_vtag_icache ? */ 57/* #define cpu_has_vtag_icache ? */
57/* #define cpu_has_dc_aliases ? */ 58/* #define cpu_has_dc_aliases ? */
58/* #define cpu_has_ic_fills_f_dc ? */ 59/* #define cpu_has_ic_fills_f_dc ? */
60#define cpu_has_clo_clz 1
59#define cpu_has_nofpuex 0 61#define cpu_has_nofpuex 0
60/* #define cpu_has_64bits ? */ 62/* #define cpu_has_64bits ? */
61/* #define cpu_has_64bit_zero_reg ? */ 63/* #define cpu_has_64bit_zero_reg ? */
diff --git a/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h b/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h
new file mode 100644
index 000000000000..f751e3ec56fb
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h
@@ -0,0 +1,59 @@
1/*
2 * Copyright (C) 2010 Cisco Systems, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19#ifndef _ASM_MACH_POWERTV_CPU_FEATURE_OVERRIDES_H_
20#define _ASM_MACH_POWERTV_CPU_FEATURE_OVERRIDES_H_
21#define cpu_has_tlb 1
22#define cpu_has_4kex 1
23#define cpu_has_3k_cache 0
24#define cpu_has_4k_cache 1
25#define cpu_has_tx39_cache 0
26#define cpu_has_fpu 0
27#define cpu_has_counter 1
28#define cpu_has_watch 1
29#define cpu_has_divec 1
30#define cpu_has_vce 0
31#define cpu_has_cache_cdex_p 0
32#define cpu_has_cache_cdex_s 0
33#define cpu_has_mcheck 1
34#define cpu_has_ejtag 1
35#define cpu_has_llsc 1
36#define cpu_has_mips16 0
37#define cpu_has_mdmx 0
38#define cpu_has_mips3d 0
39#define cpu_has_smartmips 0
40#define cpu_has_vtag_icache 0
41#define cpu_has_dc_aliases 0
42#define cpu_has_ic_fills_f_dc 0
43#define cpu_has_mips32r1 0
44#define cpu_has_mips32r2 1
45#define cpu_has_mips64r1 0
46#define cpu_has_mips64r2 0
47#define cpu_has_dsp 0
48#define cpu_has_mipsmt 0
49#define cpu_has_userlocal 0
50#define cpu_has_nofpuex 0
51#define cpu_has_64bits 0
52#define cpu_has_64bit_zero_reg 0
53#define cpu_has_vint 1
54#define cpu_has_veic 1
55#define cpu_has_inclusive_pcaches 0
56
57#define cpu_dcache_line_size() 32
58#define cpu_icache_line_size() 32
59#endif
diff --git a/arch/mips/include/asm/mach-powertv/dma-coherence.h b/arch/mips/include/asm/mach-powertv/dma-coherence.h
index a8e72cf12142..62c094085947 100644
--- a/arch/mips/include/asm/mach-powertv/dma-coherence.h
+++ b/arch/mips/include/asm/mach-powertv/dma-coherence.h
@@ -102,7 +102,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
102 102
103static inline void plat_extra_sync_for_device(struct device *dev) 103static inline void plat_extra_sync_for_device(struct device *dev)
104{ 104{
105 return;
106} 105}
107 106
108static inline int plat_dma_mapping_error(struct device *dev, 107static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-tx39xx/spaces.h b/arch/mips/include/asm/mach-tx39xx/spaces.h
new file mode 100644
index 000000000000..151fe7a1cf1d
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx39xx/spaces.h
@@ -0,0 +1,17 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
7 * Copyright (C) 2000, 2002 Maciej W. Rozycki
8 * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
9 */
10#ifndef _ASM_TX39XX_SPACES_H
11#define _ASM_TX39XX_SPACES_H
12
13#define FIXADDR_TOP ((unsigned long)(long)(int)0xfefe0000)
14
15#include <asm/mach-generic/spaces.h>
16
17#endif /* __ASM_TX39XX_SPACES_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/spaces.h b/arch/mips/include/asm/mach-tx49xx/spaces.h
new file mode 100644
index 000000000000..0cb10a6f489e
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx49xx/spaces.h
@@ -0,0 +1,17 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
7 * Copyright (C) 2000, 2002 Maciej W. Rozycki
8 * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
9 */
10#ifndef _ASM_TX49XX_SPACES_H
11#define _ASM_TX49XX_SPACES_H
12
13#define FIXADDR_TOP ((unsigned long)(long)(int)0xfefe0000)
14
15#include <asm/mach-generic/spaces.h>
16
17#endif /* __ASM_TX49XX_SPACES_H */
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index 7e40f3778179..b2202a68cf0f 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -414,6 +414,7 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
414 * constraints placed on us by the cache architecture. 414 * constraints placed on us by the cache architecture.
415 */ 415 */
416#define HAVE_ARCH_UNMAPPED_AREA 416#define HAVE_ARCH_UNMAPPED_AREA
417#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
417 418
418/* 419/*
419 * No page table caches to initialise 420 * No page table caches to initialise
diff --git a/arch/mips/include/asm/smp-ops.h b/arch/mips/include/asm/smp-ops.h
index 9e09af34c8a8..ef2a8041e78b 100644
--- a/arch/mips/include/asm/smp-ops.h
+++ b/arch/mips/include/asm/smp-ops.h
@@ -11,6 +11,8 @@
11#ifndef __ASM_SMP_OPS_H 11#ifndef __ASM_SMP_OPS_H
12#define __ASM_SMP_OPS_H 12#define __ASM_SMP_OPS_H
13 13
14#include <linux/errno.h>
15
14#ifdef CONFIG_SMP 16#ifdef CONFIG_SMP
15 17
16#include <linux/cpumask.h> 18#include <linux/cpumask.h>
@@ -56,8 +58,43 @@ static inline void register_smp_ops(struct plat_smp_ops *ops)
56 58
57#endif /* !CONFIG_SMP */ 59#endif /* !CONFIG_SMP */
58 60
59extern struct plat_smp_ops up_smp_ops; 61static inline int register_up_smp_ops(void)
60extern struct plat_smp_ops cmp_smp_ops; 62{
61extern struct plat_smp_ops vsmp_smp_ops; 63#ifdef CONFIG_SMP_UP
64 extern struct plat_smp_ops up_smp_ops;
65
66 register_smp_ops(&up_smp_ops);
67
68 return 0;
69#else
70 return -ENODEV;
71#endif
72}
73
74static inline int register_cmp_smp_ops(void)
75{
76#ifdef CONFIG_MIPS_CMP
77 extern struct plat_smp_ops cmp_smp_ops;
78
79 register_smp_ops(&cmp_smp_ops);
80
81 return 0;
82#else
83 return -ENODEV;
84#endif
85}
86
87static inline int register_vsmp_smp_ops(void)
88{
89#ifdef CONFIG_MIPS_MT_SMP
90 extern struct plat_smp_ops vsmp_smp_ops;
91
92 register_smp_ops(&vsmp_smp_ops);
93
94 return 0;
95#else
96 return -ENODEV;
97#endif
98}
62 99
63#endif /* __ASM_SMP_OPS_H */ 100#endif /* __ASM_SMP_OPS_H */
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index af42385245d5..d4fb4d852a6d 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -17,7 +17,7 @@
17#include <linux/threads.h> 17#include <linux/threads.h>
18#include <linux/cpumask.h> 18#include <linux/cpumask.h>
19 19
20#include <asm/atomic.h> 20#include <linux/atomic.h>
21#include <asm/smp-ops.h> 21#include <asm/smp-ops.h>
22 22
23extern int smp_num_siblings; 23extern int smp_num_siblings;
diff --git a/arch/mips/include/asm/smtc.h b/arch/mips/include/asm/smtc.h
index ea60bf08dcb0..c9736fc06325 100644
--- a/arch/mips/include/asm/smtc.h
+++ b/arch/mips/include/asm/smtc.h
@@ -46,6 +46,7 @@ extern void smtc_prepare_cpus(int cpus);
46extern void smtc_smp_finish(void); 46extern void smtc_smp_finish(void);
47extern void smtc_boot_secondary(int cpu, struct task_struct *t); 47extern void smtc_boot_secondary(int cpu, struct task_struct *t);
48extern void smtc_cpus_done(void); 48extern void smtc_cpus_done(void);
49extern void smtc_init_secondary(void);
49 50
50 51
51/* 52/*
diff --git a/arch/mips/include/asm/stacktrace.h b/arch/mips/include/asm/stacktrace.h
index 0bf82818aa53..780ee2c2a2ac 100644
--- a/arch/mips/include/asm/stacktrace.h
+++ b/arch/mips/include/asm/stacktrace.h
@@ -7,6 +7,10 @@
7extern int raw_show_trace; 7extern int raw_show_trace;
8extern unsigned long unwind_stack(struct task_struct *task, unsigned long *sp, 8extern unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
9 unsigned long pc, unsigned long *ra); 9 unsigned long pc, unsigned long *ra);
10extern unsigned long unwind_stack_by_address(unsigned long stack_page,
11 unsigned long *sp,
12 unsigned long pc,
13 unsigned long *ra);
10#else 14#else
11#define raw_show_trace 1 15#define raw_show_trace 1
12static inline unsigned long unwind_stack(struct task_struct *task, 16static inline unsigned long unwind_stack(struct task_struct *task,
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index dcbd4bb417ec..504d40aedfae 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -150,6 +150,7 @@ static inline void __uasminit uasm_l##lb(struct uasm_label **lab, u32 *addr) \
150# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh) 150# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
151# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh) 151# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
152# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh) 152# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
153# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
153# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh) 154# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
154# define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd) 155# define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
155# define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd) 156# define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
@@ -165,6 +166,7 @@ static inline void __uasminit uasm_l##lb(struct uasm_label **lab, u32 *addr) \
165# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh) 166# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
166# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh) 167# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
167# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh) 168# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
169# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
168# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh) 170# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
169# define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd) 171# define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
170# define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd) 172# define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 6fcfc480e9d0..ecea7871dec2 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -363,17 +363,18 @@
363#define __NR_open_by_handle_at (__NR_Linux + 340) 363#define __NR_open_by_handle_at (__NR_Linux + 340)
364#define __NR_clock_adjtime (__NR_Linux + 341) 364#define __NR_clock_adjtime (__NR_Linux + 341)
365#define __NR_syncfs (__NR_Linux + 342) 365#define __NR_syncfs (__NR_Linux + 342)
366#define __NR_setns (__NR_Linux + 343) 366#define __NR_sendmmsg (__NR_Linux + 343)
367#define __NR_setns (__NR_Linux + 344)
367 368
368/* 369/*
369 * Offset of the last Linux o32 flavoured syscall 370 * Offset of the last Linux o32 flavoured syscall
370 */ 371 */
371#define __NR_Linux_syscalls 343 372#define __NR_Linux_syscalls 344
372 373
373#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 374#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
374 375
375#define __NR_O32_Linux 4000 376#define __NR_O32_Linux 4000
376#define __NR_O32_Linux_syscalls 343 377#define __NR_O32_Linux_syscalls 344
377 378
378#if _MIPS_SIM == _MIPS_SIM_ABI64 379#if _MIPS_SIM == _MIPS_SIM_ABI64
379 380
@@ -683,17 +684,18 @@
683#define __NR_open_by_handle_at (__NR_Linux + 299) 684#define __NR_open_by_handle_at (__NR_Linux + 299)
684#define __NR_clock_adjtime (__NR_Linux + 300) 685#define __NR_clock_adjtime (__NR_Linux + 300)
685#define __NR_syncfs (__NR_Linux + 301) 686#define __NR_syncfs (__NR_Linux + 301)
686#define __NR_setns (__NR_Linux + 302) 687#define __NR_sendmmsg (__NR_Linux + 302)
688#define __NR_setns (__NR_Linux + 303)
687 689
688/* 690/*
689 * Offset of the last Linux 64-bit flavoured syscall 691 * Offset of the last Linux 64-bit flavoured syscall
690 */ 692 */
691#define __NR_Linux_syscalls 302 693#define __NR_Linux_syscalls 303
692 694
693#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 695#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
694 696
695#define __NR_64_Linux 5000 697#define __NR_64_Linux 5000
696#define __NR_64_Linux_syscalls 302 698#define __NR_64_Linux_syscalls 303
697 699
698#if _MIPS_SIM == _MIPS_SIM_NABI32 700#if _MIPS_SIM == _MIPS_SIM_NABI32
699 701
@@ -1008,17 +1010,18 @@
1008#define __NR_open_by_handle_at (__NR_Linux + 304) 1010#define __NR_open_by_handle_at (__NR_Linux + 304)
1009#define __NR_clock_adjtime (__NR_Linux + 305) 1011#define __NR_clock_adjtime (__NR_Linux + 305)
1010#define __NR_syncfs (__NR_Linux + 306) 1012#define __NR_syncfs (__NR_Linux + 306)
1011#define __NR_setns (__NR_Linux + 307) 1013#define __NR_sendmmsg (__NR_Linux + 307)
1014#define __NR_setns (__NR_Linux + 308)
1012 1015
1013/* 1016/*
1014 * Offset of the last N32 flavoured syscall 1017 * Offset of the last N32 flavoured syscall
1015 */ 1018 */
1016#define __NR_Linux_syscalls 307 1019#define __NR_Linux_syscalls 308
1017 1020
1018#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1021#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1019 1022
1020#define __NR_N32_Linux 6000 1023#define __NR_N32_Linux 6000
1021#define __NR_N32_Linux_syscalls 307 1024#define __NR_N32_Linux_syscalls 308
1022 1025
1023#ifdef __KERNEL__ 1026#ifdef __KERNEL__
1024 1027
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index 260df4750949..ca9bd2069142 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -7,6 +7,7 @@
7 * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle 7 * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle
8 */ 8 */
9#include <linux/clockchips.h> 9#include <linux/clockchips.h>
10#include <linux/i8253.h>
10#include <linux/init.h> 11#include <linux/init.h>
11#include <linux/interrupt.h> 12#include <linux/interrupt.h>
12#include <linux/kernel.h> 13#include <linux/kernel.h>
@@ -15,7 +16,6 @@
15#include <linux/irq.h> 16#include <linux/irq.h>
16 17
17#include <asm/irq_cpu.h> 18#include <asm/irq_cpu.h>
18#include <asm/i8253.h>
19#include <asm/i8259.h> 19#include <asm/i8259.h>
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/jazz.h> 21#include <asm/jazz.h>
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index bb133d10b145..ebc0cd20b35d 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -71,7 +71,6 @@ void r4k_wait_irqoff(void)
71 local_irq_enable(); 71 local_irq_enable();
72 __asm__(" .globl __pastwait \n" 72 __asm__(" .globl __pastwait \n"
73 "__pastwait: \n"); 73 "__pastwait: \n");
74 return;
75} 74}
76 75
77/* 76/*
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
index 391221b6a6aa..be4ee7d63e04 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/i8253.c
@@ -3,96 +3,16 @@
3 * 3 *
4 */ 4 */
5#include <linux/clockchips.h> 5#include <linux/clockchips.h>
6#include <linux/init.h> 6#include <linux/i8253.h>
7#include <linux/interrupt.h>
8#include <linux/jiffies.h>
9#include <linux/module.h> 7#include <linux/module.h>
10#include <linux/smp.h> 8#include <linux/smp.h>
11#include <linux/spinlock.h>
12#include <linux/irq.h> 9#include <linux/irq.h>
13 10
14#include <asm/delay.h>
15#include <asm/i8253.h>
16#include <asm/io.h>
17#include <asm/time.h> 11#include <asm/time.h>
18 12
19DEFINE_RAW_SPINLOCK(i8253_lock);
20EXPORT_SYMBOL(i8253_lock);
21
22/*
23 * Initialize the PIT timer.
24 *
25 * This is also called after resume to bring the PIT into operation again.
26 */
27static void init_pit_timer(enum clock_event_mode mode,
28 struct clock_event_device *evt)
29{
30 raw_spin_lock(&i8253_lock);
31
32 switch(mode) {
33 case CLOCK_EVT_MODE_PERIODIC:
34 /* binary, mode 2, LSB/MSB, ch 0 */
35 outb_p(0x34, PIT_MODE);
36 outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
37 outb(LATCH >> 8 , PIT_CH0); /* MSB */
38 break;
39
40 case CLOCK_EVT_MODE_SHUTDOWN:
41 case CLOCK_EVT_MODE_UNUSED:
42 if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
43 evt->mode == CLOCK_EVT_MODE_ONESHOT) {
44 outb_p(0x30, PIT_MODE);
45 outb_p(0, PIT_CH0);
46 outb_p(0, PIT_CH0);
47 }
48 break;
49
50 case CLOCK_EVT_MODE_ONESHOT:
51 /* One shot setup */
52 outb_p(0x38, PIT_MODE);
53 break;
54
55 case CLOCK_EVT_MODE_RESUME:
56 /* Nothing to do here */
57 break;
58 }
59 raw_spin_unlock(&i8253_lock);
60}
61
62/*
63 * Program the next event in oneshot mode
64 *
65 * Delta is given in PIT ticks
66 */
67static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
68{
69 raw_spin_lock(&i8253_lock);
70 outb_p(delta & 0xff , PIT_CH0); /* LSB */
71 outb(delta >> 8 , PIT_CH0); /* MSB */
72 raw_spin_unlock(&i8253_lock);
73
74 return 0;
75}
76
77/*
78 * On UP the PIT can serve all of the possible timer functions. On SMP systems
79 * it can be solely used for the global tick.
80 *
81 * The profiling and update capabilites are switched off once the local apic is
82 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
83 * !using_apic_timer decisions in do_timer_interrupt_hook()
84 */
85static struct clock_event_device pit_clockevent = {
86 .name = "pit",
87 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
88 .set_mode = init_pit_timer,
89 .set_next_event = pit_next_event,
90 .irq = 0,
91};
92
93static irqreturn_t timer_interrupt(int irq, void *dev_id) 13static irqreturn_t timer_interrupt(int irq, void *dev_id)
94{ 14{
95 pit_clockevent.event_handler(&pit_clockevent); 15 i8253_clockevent.event_handler(&i8253_clockevent);
96 16
97 return IRQ_HANDLED; 17 return IRQ_HANDLED;
98} 18}
@@ -103,25 +23,9 @@ static struct irqaction irq0 = {
103 .name = "timer" 23 .name = "timer"
104}; 24};
105 25
106/*
107 * Initialize the conversion factor and the min/max deltas of the clock event
108 * structure and register the clock event source with the framework.
109 */
110void __init setup_pit_timer(void) 26void __init setup_pit_timer(void)
111{ 27{
112 struct clock_event_device *cd = &pit_clockevent; 28 clockevent_i8253_init(true);
113 unsigned int cpu = smp_processor_id();
114
115 /*
116 * Start pit with the boot cpu mask and make it global after the
117 * IO_APIC has been initialized.
118 */
119 cd->cpumask = cpumask_of(cpu);
120 clockevent_set_clock(cd, CLOCK_TICK_RATE);
121 cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
122 cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
123 clockevents_register_device(cd);
124
125 setup_irq(0, &irq0); 29 setup_irq(0, &irq0);
126} 30}
127 31
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index c018696765d4..5c74eb797f08 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -14,7 +14,7 @@
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/spinlock.h> 16#include <linux/spinlock.h>
17#include <linux/sysdev.h> 17#include <linux/syscore_ops.h>
18#include <linux/irq.h> 18#include <linux/irq.h>
19 19
20#include <asm/i8259.h> 20#include <asm/i8259.h>
@@ -215,14 +215,13 @@ spurious_8259A_irq:
215 } 215 }
216} 216}
217 217
218static int i8259A_resume(struct sys_device *dev) 218static void i8259A_resume(void)
219{ 219{
220 if (i8259A_auto_eoi >= 0) 220 if (i8259A_auto_eoi >= 0)
221 init_8259A(i8259A_auto_eoi); 221 init_8259A(i8259A_auto_eoi);
222 return 0;
223} 222}
224 223
225static int i8259A_shutdown(struct sys_device *dev) 224static void i8259A_shutdown(void)
226{ 225{
227 /* Put the i8259A into a quiescent state that 226 /* Put the i8259A into a quiescent state that
228 * the kernel initialization code can get it 227 * the kernel initialization code can get it
@@ -232,26 +231,17 @@ static int i8259A_shutdown(struct sys_device *dev)
232 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ 231 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
233 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-1 */ 232 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-1 */
234 } 233 }
235 return 0;
236} 234}
237 235
238static struct sysdev_class i8259_sysdev_class = { 236static struct syscore_ops i8259_syscore_ops = {
239 .name = "i8259",
240 .resume = i8259A_resume, 237 .resume = i8259A_resume,
241 .shutdown = i8259A_shutdown, 238 .shutdown = i8259A_shutdown,
242}; 239};
243 240
244static struct sys_device device_i8259A = {
245 .id = 0,
246 .cls = &i8259_sysdev_class,
247};
248
249static int __init i8259A_init_sysfs(void) 241static int __init i8259A_init_sysfs(void)
250{ 242{
251 int error = sysdev_class_register(&i8259_sysdev_class); 243 register_syscore_ops(&i8259_syscore_ops);
252 if (!error) 244 return 0;
253 error = sysdev_register(&device_i8259A);
254 return error;
255} 245}
256 246
257device_initcall(i8259A_init_sysfs); 247device_initcall(i8259A_init_sysfs);
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 9b734d74ae8e..b53970d80991 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -23,7 +23,7 @@
23#include <linux/kgdb.h> 23#include <linux/kgdb.h>
24#include <linux/ftrace.h> 24#include <linux/ftrace.h>
25 25
26#include <asm/atomic.h> 26#include <linux/atomic.h>
27#include <asm/system.h> 27#include <asm/system.h>
28#include <asm/uaccess.h> 28#include <asm/uaccess.h>
29 29
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 6e71b284f6c9..191eb52228c4 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -103,14 +103,12 @@ void __init mips_cpu_irq_init(void)
103 clear_c0_status(ST0_IM); 103 clear_c0_status(ST0_IM);
104 clear_c0_cause(CAUSEF_IP); 104 clear_c0_cause(CAUSEF_IP);
105 105
106 /* 106 /* Software interrupts are used for MT/CMT IPI */
107 * Only MT is using the software interrupts currently, so we just 107 for (i = irq_base; i < irq_base + 2; i++)
108 * leave them uninitialized for other processors. 108 irq_set_chip_and_handler(i, cpu_has_mipsmt ?
109 */ 109 &mips_mt_cpu_irq_controller :
110 if (cpu_has_mipsmt) 110 &mips_cpu_irq_controller,
111 for (i = irq_base; i < irq_base + 2; i++) 111 handle_percpu_irq);
112 irq_set_chip_and_handler(i, &mips_mt_cpu_irq_controller,
113 handle_percpu_irq);
114 112
115 for (i = irq_base + 2; i < irq_base + 8; i++) 113 for (i = irq_base + 2; i < irq_base + 8; i++)
116 irq_set_chip_and_handler(i, &mips_cpu_irq_controller, 114 irq_set_chip_and_handler(i, &mips_cpu_irq_controller,
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index b2259e7cd829..594ca69cb867 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -12,7 +12,7 @@
12 12
13#include <asm/cpu.h> 13#include <asm/cpu.h>
14#include <asm/processor.h> 14#include <asm/processor.h>
15#include <asm/atomic.h> 15#include <linux/atomic.h>
16#include <asm/system.h> 16#include <asm/system.h>
17#include <asm/hardirq.h> 17#include <asm/hardirq.h>
18#include <asm/mmu_context.h> 18#include <asm/mmu_context.h>
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index dd940b701963..4b930ac4aff2 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -45,30 +45,14 @@ static struct mips_hi16 *mips_hi16_list;
45static LIST_HEAD(dbe_list); 45static LIST_HEAD(dbe_list);
46static DEFINE_SPINLOCK(dbe_lock); 46static DEFINE_SPINLOCK(dbe_lock);
47 47
48#ifdef MODULE_START
48void *module_alloc(unsigned long size) 49void *module_alloc(unsigned long size)
49{ 50{
50#ifdef MODULE_START
51 return __vmalloc_node_range(size, 1, MODULE_START, MODULE_END, 51 return __vmalloc_node_range(size, 1, MODULE_START, MODULE_END,
52 GFP_KERNEL, PAGE_KERNEL, -1, 52 GFP_KERNEL, PAGE_KERNEL, -1,
53 __builtin_return_address(0)); 53 __builtin_return_address(0));
54#else
55 if (size == 0)
56 return NULL;
57 return vmalloc(size);
58#endif
59}
60
61/* Free memory returned from module_alloc */
62void module_free(struct module *mod, void *module_region)
63{
64 vfree(module_region);
65}
66
67int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
68 char *secstrings, struct module *mod)
69{
70 return 0;
71} 54}
55#endif
72 56
73static int apply_r_mips_none(struct module *me, u32 *location, Elf_Addr v) 57static int apply_r_mips_none(struct module *me, u32 *location, Elf_Addr v)
74{ 58{
diff --git a/arch/mips/kernel/perf_event.c b/arch/mips/kernel/perf_event.c
index a8244854d3dc..0aee944ac380 100644
--- a/arch/mips/kernel/perf_event.c
+++ b/arch/mips/kernel/perf_event.c
@@ -192,8 +192,6 @@ again:
192 192
193 local64_add(delta, &event->count); 193 local64_add(delta, &event->count);
194 local64_sub(delta, &hwc->period_left); 194 local64_sub(delta, &hwc->period_left);
195
196 return;
197} 195}
198 196
199static void mipspmu_start(struct perf_event *event, int flags) 197static void mipspmu_start(struct perf_event *event, int flags)
@@ -527,7 +525,7 @@ handle_associated_event(struct cpu_hw_events *cpuc,
527 if (!mipspmu_event_set_period(event, hwc, idx)) 525 if (!mipspmu_event_set_period(event, hwc, idx))
528 return; 526 return;
529 527
530 if (perf_event_overflow(event, 0, data, regs)) 528 if (perf_event_overflow(event, data, regs))
531 mipspmu->disable_event(idx); 529 mipspmu->disable_event(idx);
532} 530}
533 531
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 75266ff4cc33..e5ad09a9baf7 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -377,6 +377,20 @@ static const struct mips_perf_event mipsxxcore_cache_map
377 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, 377 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
378 }, 378 },
379}, 379},
380[C(NODE)] = {
381 [C(OP_READ)] = {
382 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
383 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
384 },
385 [C(OP_WRITE)] = {
386 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
387 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
388 },
389 [C(OP_PREFETCH)] = {
390 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
391 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
392 },
393},
380}; 394};
381 395
382/* 74K core has completely different cache event map. */ 396/* 74K core has completely different cache event map. */
@@ -480,6 +494,20 @@ static const struct mips_perf_event mipsxx74Kcore_cache_map
480 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, 494 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
481 }, 495 },
482}, 496},
497[C(NODE)] = {
498 [C(OP_READ)] = {
499 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
500 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
501 },
502 [C(OP_WRITE)] = {
503 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
504 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
505 },
506 [C(OP_PREFETCH)] = {
507 [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID },
508 [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID },
509 },
510},
483}; 511};
484 512
485#ifdef CONFIG_MIPS_MT_SMP 513#ifdef CONFIG_MIPS_MT_SMP
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index d2112d3cf115..b30cb2573aaf 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -103,7 +103,6 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
103 __init_dsp(); 103 __init_dsp();
104 regs->cp0_epc = pc; 104 regs->cp0_epc = pc;
105 regs->regs[29] = sp; 105 regs->regs[29] = sp;
106 current_thread_info()->addr_limit = USER_DS;
107} 106}
108 107
109void exit_thread(void) 108void exit_thread(void)
@@ -373,18 +372,18 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
373 372
374 373
375#ifdef CONFIG_KALLSYMS 374#ifdef CONFIG_KALLSYMS
376/* used by show_backtrace() */ 375/* generic stack unwinding function */
377unsigned long unwind_stack(struct task_struct *task, unsigned long *sp, 376unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
378 unsigned long pc, unsigned long *ra) 377 unsigned long *sp,
378 unsigned long pc,
379 unsigned long *ra)
379{ 380{
380 unsigned long stack_page;
381 struct mips_frame_info info; 381 struct mips_frame_info info;
382 unsigned long size, ofs; 382 unsigned long size, ofs;
383 int leaf; 383 int leaf;
384 extern void ret_from_irq(void); 384 extern void ret_from_irq(void);
385 extern void ret_from_exception(void); 385 extern void ret_from_exception(void);
386 386
387 stack_page = (unsigned long)task_stack_page(task);
388 if (!stack_page) 387 if (!stack_page)
389 return 0; 388 return 0;
390 389
@@ -443,6 +442,15 @@ unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
443 *ra = 0; 442 *ra = 0;
444 return __kernel_text_address(pc) ? pc : 0; 443 return __kernel_text_address(pc) ? pc : 0;
445} 444}
445EXPORT_SYMBOL(unwind_stack_by_address);
446
447/* used by show_backtrace() */
448unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
449 unsigned long pc, unsigned long *ra)
450{
451 unsigned long stack_page = (unsigned long)task_stack_page(task);
452 return unwind_stack_by_address(stack_page, sp, pc, ra);
453}
446#endif 454#endif
447 455
448/* 456/*
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index 557ef72472e0..7a80b7cda7cc 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -36,7 +36,7 @@
36#include <asm/mipsmtregs.h> 36#include <asm/mipsmtregs.h>
37#include <asm/mips_mt.h> 37#include <asm/mips_mt.h>
38#include <asm/cacheflush.h> 38#include <asm/cacheflush.h>
39#include <asm/atomic.h> 39#include <linux/atomic.h>
40#include <asm/cpu.h> 40#include <asm/cpu.h>
41#include <asm/processor.h> 41#include <asm/processor.h>
42#include <asm/system.h> 42#include <asm/system.h>
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 99e656e425f3..e521420a45a5 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -589,6 +589,7 @@ einval: li v0, -ENOSYS
589 sys sys_open_by_handle_at 3 /* 4340 */ 589 sys sys_open_by_handle_at 3 /* 4340 */
590 sys sys_clock_adjtime 2 590 sys sys_clock_adjtime 2
591 sys sys_syncfs 1 591 sys sys_syncfs 1
592 sys sys_sendmmsg 4
592 sys sys_setns 2 593 sys sys_setns 2
593 .endm 594 .endm
594 595
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index fb0575f47f3d..85874d6a8a70 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -428,5 +428,6 @@ sys_call_table:
428 PTR sys_open_by_handle_at 428 PTR sys_open_by_handle_at
429 PTR sys_clock_adjtime /* 5300 */ 429 PTR sys_clock_adjtime /* 5300 */
430 PTR sys_syncfs 430 PTR sys_syncfs
431 PTR sys_sendmmsg
431 PTR sys_setns 432 PTR sys_setns
432 .size sys_call_table,.-sys_call_table 433 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 4de0c5534e73..b85842fc87ae 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -428,5 +428,6 @@ EXPORT(sysn32_call_table)
428 PTR sys_open_by_handle_at 428 PTR sys_open_by_handle_at
429 PTR compat_sys_clock_adjtime /* 6305 */ 429 PTR compat_sys_clock_adjtime /* 6305 */
430 PTR sys_syncfs 430 PTR sys_syncfs
431 PTR compat_sys_sendmmsg
431 PTR sys_setns 432 PTR sys_setns
432 .size sysn32_call_table,.-sysn32_call_table 433 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 4a387de08bfa..46c4763edf21 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -546,5 +546,6 @@ sys_call_table:
546 PTR compat_sys_open_by_handle_at /* 4340 */ 546 PTR compat_sys_open_by_handle_at /* 4340 */
547 PTR compat_sys_clock_adjtime 547 PTR compat_sys_clock_adjtime
548 PTR sys_syncfs 548 PTR sys_syncfs
549 PTR compat_sys_sendmmsg
549 PTR sys_setns 550 PTR sys_setns
550 .size sys_call_table,.-sys_call_table 551 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index cc81771b882c..fe3095160655 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -25,7 +25,7 @@
25#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/compiler.h> 26#include <linux/compiler.h>
27 27
28#include <asm/atomic.h> 28#include <linux/atomic.h>
29#include <asm/cacheflush.h> 29#include <asm/cacheflush.h>
30#include <asm/cpu.h> 30#include <asm/cpu.h>
31#include <asm/processor.h> 31#include <asm/processor.h>
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 1ec56e635d04..ce9e286f0a74 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -24,7 +24,7 @@
24#include <linux/compiler.h> 24#include <linux/compiler.h>
25#include <linux/smp.h> 25#include <linux/smp.h>
26 26
27#include <asm/atomic.h> 27#include <linux/atomic.h>
28#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
29#include <asm/cpu.h> 29#include <asm/cpu.h>
30#include <asm/processor.h> 30#include <asm/processor.h>
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 32a256101082..32c1e954cd37 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -34,7 +34,7 @@
34#include <linux/err.h> 34#include <linux/err.h>
35#include <linux/ftrace.h> 35#include <linux/ftrace.h>
36 36
37#include <asm/atomic.h> 37#include <linux/atomic.h>
38#include <asm/cpu.h> 38#include <asm/cpu.h>
39#include <asm/processor.h> 39#include <asm/processor.h>
40#include <asm/r4k-timer.h> 40#include <asm/r4k-timer.h>
diff --git a/arch/mips/kernel/smtc-proc.c b/arch/mips/kernel/smtc-proc.c
index fe256559c997..928a5a61e1a6 100644
--- a/arch/mips/kernel/smtc-proc.c
+++ b/arch/mips/kernel/smtc-proc.c
@@ -10,7 +10,7 @@
10 10
11#include <asm/cpu.h> 11#include <asm/cpu.h>
12#include <asm/processor.h> 12#include <asm/processor.h>
13#include <asm/atomic.h> 13#include <linux/atomic.h>
14#include <asm/system.h> 14#include <asm/system.h>
15#include <asm/hardirq.h> 15#include <asm/hardirq.h>
16#include <asm/mmu_context.h> 16#include <asm/mmu_context.h>
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index cedac4633741..f0895e70e283 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -30,7 +30,7 @@
30 30
31#include <asm/cpu.h> 31#include <asm/cpu.h>
32#include <asm/processor.h> 32#include <asm/processor.h>
33#include <asm/atomic.h> 33#include <linux/atomic.h>
34#include <asm/system.h> 34#include <asm/system.h>
35#include <asm/hardirq.h> 35#include <asm/hardirq.h>
36#include <asm/hazards.h> 36#include <asm/hazards.h>
diff --git a/arch/mips/kernel/sync-r4k.c b/arch/mips/kernel/sync-r4k.c
index 05dd170a83f7..99f913c8d7a6 100644
--- a/arch/mips/kernel/sync-r4k.c
+++ b/arch/mips/kernel/sync-r4k.c
@@ -16,7 +16,7 @@
16#include <linux/cpumask.h> 16#include <linux/cpumask.h>
17 17
18#include <asm/r4k-timer.h> 18#include <asm/r4k-timer.h>
19#include <asm/atomic.h> 19#include <linux/atomic.h>
20#include <asm/barrier.h> 20#include <asm/barrier.h>
21#include <asm/mipsregs.h> 21#include <asm/mipsregs.h>
22 22
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e9b3af27d844..b7517e3abc85 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -578,12 +578,12 @@ static int simulate_llsc(struct pt_regs *regs, unsigned int opcode)
578{ 578{
579 if ((opcode & OPCODE) == LL) { 579 if ((opcode & OPCODE) == LL) {
580 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 580 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,
581 1, 0, regs, 0); 581 1, regs, 0);
582 return simulate_ll(regs, opcode); 582 return simulate_ll(regs, opcode);
583 } 583 }
584 if ((opcode & OPCODE) == SC) { 584 if ((opcode & OPCODE) == SC) {
585 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 585 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,
586 1, 0, regs, 0); 586 1, regs, 0);
587 return simulate_sc(regs, opcode); 587 return simulate_sc(regs, opcode);
588 } 588 }
589 589
@@ -602,7 +602,7 @@ static int simulate_rdhwr(struct pt_regs *regs, unsigned int opcode)
602 int rd = (opcode & RD) >> 11; 602 int rd = (opcode & RD) >> 11;
603 int rt = (opcode & RT) >> 16; 603 int rt = (opcode & RT) >> 16;
604 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 604 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,
605 1, 0, regs, 0); 605 1, regs, 0);
606 switch (rd) { 606 switch (rd) {
607 case 0: /* CPU number */ 607 case 0: /* CPU number */
608 regs->regs[rt] = smp_processor_id(); 608 regs->regs[rt] = smp_processor_id();
@@ -640,7 +640,7 @@ static int simulate_sync(struct pt_regs *regs, unsigned int opcode)
640{ 640{
641 if ((opcode & OPCODE) == SPEC0 && (opcode & FUNC) == SYNC) { 641 if ((opcode & OPCODE) == SPEC0 && (opcode & FUNC) == SYNC) {
642 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 642 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,
643 1, 0, regs, 0); 643 1, regs, 0);
644 return 0; 644 return 0;
645 } 645 }
646 646
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index cfea1adfa153..eb319b580353 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -111,8 +111,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
111 unsigned long value; 111 unsigned long value;
112 unsigned int res; 112 unsigned int res;
113 113
114 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 114 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
115 1, 0, regs, 0);
116 115
117 /* 116 /*
118 * This load never faults. 117 * This load never faults.
@@ -517,7 +516,7 @@ asmlinkage void do_ade(struct pt_regs *regs)
517 mm_segment_t seg; 516 mm_segment_t seg;
518 517
519 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 518 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS,
520 1, 0, regs, regs->cp0_badvaddr); 519 1, regs, regs->cp0_badvaddr);
521 /* 520 /*
522 * Did we catch a fault trying to load an instruction? 521 * Did we catch a fault trying to load an instruction?
523 * Or are we running in MIPS16 mode? 522 * Or are we running in MIPS16 mode?
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index dbb6b408f001..2cd50ad0d5c6 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -46,7 +46,7 @@
46#include <asm/mipsregs.h> 46#include <asm/mipsregs.h>
47#include <asm/mipsmtregs.h> 47#include <asm/mipsmtregs.h>
48#include <asm/cacheflush.h> 48#include <asm/cacheflush.h>
49#include <asm/atomic.h> 49#include <linux/atomic.h>
50#include <asm/cpu.h> 50#include <asm/cpu.h>
51#include <asm/mips_mt.h> 51#include <asm/mips_mt.h>
52#include <asm/processor.h> 52#include <asm/processor.h>
diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c
index 94560899d13e..7e9c0ffc11a5 100644
--- a/arch/mips/lantiq/clk.c
+++ b/arch/mips/lantiq/clk.c
@@ -100,6 +100,19 @@ void clk_put(struct clk *clk)
100} 100}
101EXPORT_SYMBOL(clk_put); 101EXPORT_SYMBOL(clk_put);
102 102
103int clk_enable(struct clk *clk)
104{
105 /* not used */
106 return 0;
107}
108EXPORT_SYMBOL(clk_enable);
109
110void clk_disable(struct clk *clk)
111{
112 /* not used */
113}
114EXPORT_SYMBOL(clk_disable);
115
103static inline u32 ltq_get_counter_resolution(void) 116static inline u32 ltq_get_counter_resolution(void)
104{ 117{
105 u32 res; 118 u32 res;
diff --git a/arch/mips/lantiq/devices.c b/arch/mips/lantiq/devices.c
index 7b82c34cb169..44a36771c819 100644
--- a/arch/mips/lantiq/devices.c
+++ b/arch/mips/lantiq/devices.c
@@ -15,11 +15,9 @@
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/leds.h> 16#include <linux/leds.h>
17#include <linux/etherdevice.h> 17#include <linux/etherdevice.h>
18#include <linux/reboot.h>
19#include <linux/time.h> 18#include <linux/time.h>
20#include <linux/io.h> 19#include <linux/io.h>
21#include <linux/gpio.h> 20#include <linux/gpio.h>
22#include <linux/leds.h>
23 21
24#include <asm/bootinfo.h> 22#include <asm/bootinfo.h>
25#include <asm/irq.h> 23#include <asm/irq.h>
diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c
index e09e789dfc27..d0e32ab2ea07 100644
--- a/arch/mips/lantiq/xway/devices.c
+++ b/arch/mips/lantiq/xway/devices.c
@@ -16,11 +16,9 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/etherdevice.h> 18#include <linux/etherdevice.h>
19#include <linux/reboot.h>
20#include <linux/time.h> 19#include <linux/time.h>
21#include <linux/io.h> 20#include <linux/io.h>
22#include <linux/gpio.h> 21#include <linux/gpio.h>
23#include <linux/leds.h>
24 22
25#include <asm/bootinfo.h> 23#include <asm/bootinfo.h>
26#include <asm/irq.h> 24#include <asm/irq.h>
diff --git a/arch/mips/loongson/lemote-2f/ec_kb3310b.c b/arch/mips/loongson/lemote-2f/ec_kb3310b.c
index 64057244eec5..2b666d3a3947 100644
--- a/arch/mips/loongson/lemote-2f/ec_kb3310b.c
+++ b/arch/mips/loongson/lemote-2f/ec_kb3310b.c
@@ -45,8 +45,6 @@ void ec_write(unsigned short addr, unsigned char val)
45 /* flush the write action */ 45 /* flush the write action */
46 inb(EC_IO_PORT_DATA); 46 inb(EC_IO_PORT_DATA);
47 spin_unlock_irqrestore(&index_access_lock, flags); 47 spin_unlock_irqrestore(&index_access_lock, flags);
48
49 return;
50} 48}
51EXPORT_SYMBOL_GPL(ec_write); 49EXPORT_SYMBOL_GPL(ec_write);
52 50
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index d32cb0503110..dbf2f93a5091 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -272,8 +272,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
272 } 272 }
273 273
274 emul: 274 emul:
275 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 275 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, xcp, 0);
276 1, 0, xcp, 0);
277 MIPS_FPU_EMU_INC_STATS(emulated); 276 MIPS_FPU_EMU_INC_STATS(emulated);
278 switch (MIPSInst_OPCODE(ir)) { 277 switch (MIPSInst_OPCODE(ir)) {
279 case ldc1_op:{ 278 case ldc1_op:{
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c
index 55f22a3afe61..256e0cdaa499 100644
--- a/arch/mips/mipssim/sim_setup.c
+++ b/arch/mips/mipssim/sim_setup.c
@@ -34,6 +34,7 @@
34#include <asm/time.h> 34#include <asm/time.h>
35#include <asm/mips-boards/sim.h> 35#include <asm/mips-boards/sim.h>
36#include <asm/mips-boards/simint.h> 36#include <asm/mips-boards/simint.h>
37#include <asm/smp-ops.h>
37 38
38 39
39static void __init serial_init(void); 40static void __init serial_init(void);
@@ -59,18 +60,17 @@ void __init prom_init(void)
59 60
60 prom_meminit(); 61 prom_meminit();
61 62
62#ifdef CONFIG_MIPS_MT_SMP 63 if (cpu_has_mipsmt) {
63 if (cpu_has_mipsmt) 64 if (!register_vsmp_smp_ops())
64 register_smp_ops(&vsmp_smp_ops); 65 return;
65 else 66
66 register_smp_ops(&up_smp_ops);
67#endif
68#ifdef CONFIG_MIPS_MT_SMTC 67#ifdef CONFIG_MIPS_MT_SMTC
69 if (cpu_has_mipsmt)
70 register_smp_ops(&ssmtc_smp_ops); 68 register_smp_ops(&ssmtc_smp_ops);
71 else 69 return;
72 register_smp_ops(&up_smp_ops);
73#endif 70#endif
71 }
72
73 register_up_smp_ops();
74} 74}
75 75
76static void __init serial_init(void) 76static void __init serial_init(void)
diff --git a/arch/mips/mipssim/sim_smtc.c b/arch/mips/mipssim/sim_smtc.c
index 30df47258c2c..915063991f6e 100644
--- a/arch/mips/mipssim/sim_smtc.c
+++ b/arch/mips/mipssim/sim_smtc.c
@@ -24,7 +24,7 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/smp.h> 25#include <linux/smp.h>
26 26
27#include <asm/atomic.h> 27#include <linux/atomic.h>
28#include <asm/cpu.h> 28#include <asm/cpu.h>
29#include <asm/processor.h> 29#include <asm/processor.h>
30#include <asm/smtc.h> 30#include <asm/smtc.h>
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index eeb642e4066e..b9aabb998a32 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -604,6 +604,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
604 r4k_blast_scache(); 604 r4k_blast_scache();
605 else 605 else
606 blast_scache_range(addr, addr + size); 606 blast_scache_range(addr, addr + size);
607 __sync();
607 return; 608 return;
608 } 609 }
609 610
@@ -620,6 +621,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
620 } 621 }
621 622
622 bc_wback_inv(addr, size); 623 bc_wback_inv(addr, size);
624 __sync();
623} 625}
624 626
625static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) 627static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
@@ -647,6 +649,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
647 (addr + size - 1) & almask); 649 (addr + size - 1) & almask);
648 blast_inv_scache_range(addr, addr + size); 650 blast_inv_scache_range(addr, addr + size);
649 } 651 }
652 __sync();
650 return; 653 return;
651 } 654 }
652 655
@@ -663,6 +666,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
663 } 666 }
664 667
665 bc_inv(addr, size); 668 bc_inv(addr, size);
669 __sync();
666} 670}
667#endif /* CONFIG_DMA_NONCOHERENT */ 671#endif /* CONFIG_DMA_NONCOHERENT */
668 672
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 21ea14efb837..46084912e588 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -15,18 +15,18 @@
15#include <linux/scatterlist.h> 15#include <linux/scatterlist.h>
16#include <linux/string.h> 16#include <linux/string.h>
17#include <linux/gfp.h> 17#include <linux/gfp.h>
18#include <linux/highmem.h>
18 19
19#include <asm/cache.h> 20#include <asm/cache.h>
20#include <asm/io.h> 21#include <asm/io.h>
21 22
22#include <dma-coherence.h> 23#include <dma-coherence.h>
23 24
24static inline unsigned long dma_addr_to_virt(struct device *dev, 25static inline struct page *dma_addr_to_page(struct device *dev,
25 dma_addr_t dma_addr) 26 dma_addr_t dma_addr)
26{ 27{
27 unsigned long addr = plat_dma_addr_to_phys(dev, dma_addr); 28 return pfn_to_page(
28 29 plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
29 return (unsigned long)phys_to_virt(addr);
30} 30}
31 31
32/* 32/*
@@ -148,20 +148,20 @@ static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
148 free_pages(addr, get_order(size)); 148 free_pages(addr, get_order(size));
149} 149}
150 150
151static inline void __dma_sync(unsigned long addr, size_t size, 151static inline void __dma_sync_virtual(void *addr, size_t size,
152 enum dma_data_direction direction) 152 enum dma_data_direction direction)
153{ 153{
154 switch (direction) { 154 switch (direction) {
155 case DMA_TO_DEVICE: 155 case DMA_TO_DEVICE:
156 dma_cache_wback(addr, size); 156 dma_cache_wback((unsigned long)addr, size);
157 break; 157 break;
158 158
159 case DMA_FROM_DEVICE: 159 case DMA_FROM_DEVICE:
160 dma_cache_inv(addr, size); 160 dma_cache_inv((unsigned long)addr, size);
161 break; 161 break;
162 162
163 case DMA_BIDIRECTIONAL: 163 case DMA_BIDIRECTIONAL:
164 dma_cache_wback_inv(addr, size); 164 dma_cache_wback_inv((unsigned long)addr, size);
165 break; 165 break;
166 166
167 default: 167 default:
@@ -169,12 +169,49 @@ static inline void __dma_sync(unsigned long addr, size_t size,
169 } 169 }
170} 170}
171 171
172/*
173 * A single sg entry may refer to multiple physically contiguous
174 * pages. But we still need to process highmem pages individually.
175 * If highmem is not configured then the bulk of this loop gets
176 * optimized out.
177 */
178static inline void __dma_sync(struct page *page,
179 unsigned long offset, size_t size, enum dma_data_direction direction)
180{
181 size_t left = size;
182
183 do {
184 size_t len = left;
185
186 if (PageHighMem(page)) {
187 void *addr;
188
189 if (offset + len > PAGE_SIZE) {
190 if (offset >= PAGE_SIZE) {
191 page += offset >> PAGE_SHIFT;
192 offset &= ~PAGE_MASK;
193 }
194 len = PAGE_SIZE - offset;
195 }
196
197 addr = kmap_atomic(page);
198 __dma_sync_virtual(addr + offset, len, direction);
199 kunmap_atomic(addr);
200 } else
201 __dma_sync_virtual(page_address(page) + offset,
202 size, direction);
203 offset = 0;
204 page++;
205 left -= len;
206 } while (left);
207}
208
172static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr, 209static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
173 size_t size, enum dma_data_direction direction, struct dma_attrs *attrs) 210 size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
174{ 211{
175 if (cpu_is_noncoherent_r10000(dev)) 212 if (cpu_is_noncoherent_r10000(dev))
176 __dma_sync(dma_addr_to_virt(dev, dma_addr), size, 213 __dma_sync(dma_addr_to_page(dev, dma_addr),
177 direction); 214 dma_addr & ~PAGE_MASK, size, direction);
178 215
179 plat_unmap_dma_mem(dev, dma_addr, size, direction); 216 plat_unmap_dma_mem(dev, dma_addr, size, direction);
180} 217}
@@ -185,13 +222,11 @@ static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,
185 int i; 222 int i;
186 223
187 for (i = 0; i < nents; i++, sg++) { 224 for (i = 0; i < nents; i++, sg++) {
188 unsigned long addr; 225 if (!plat_device_is_coherent(dev))
189 226 __dma_sync(sg_page(sg), sg->offset, sg->length,
190 addr = (unsigned long) sg_virt(sg); 227 direction);
191 if (!plat_device_is_coherent(dev) && addr) 228 sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
192 __dma_sync(addr, sg->length, direction); 229 sg->offset;
193 sg->dma_address = plat_map_dma_mem(dev,
194 (void *)addr, sg->length);
195 } 230 }
196 231
197 return nents; 232 return nents;
@@ -201,30 +236,23 @@ static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
201 unsigned long offset, size_t size, enum dma_data_direction direction, 236 unsigned long offset, size_t size, enum dma_data_direction direction,
202 struct dma_attrs *attrs) 237 struct dma_attrs *attrs)
203{ 238{
204 unsigned long addr;
205
206 addr = (unsigned long) page_address(page) + offset;
207
208 if (!plat_device_is_coherent(dev)) 239 if (!plat_device_is_coherent(dev))
209 __dma_sync(addr, size, direction); 240 __dma_sync(page, offset, size, direction);
210 241
211 return plat_map_dma_mem(dev, (void *)addr, size); 242 return plat_map_dma_mem_page(dev, page) + offset;
212} 243}
213 244
214static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg, 245static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
215 int nhwentries, enum dma_data_direction direction, 246 int nhwentries, enum dma_data_direction direction,
216 struct dma_attrs *attrs) 247 struct dma_attrs *attrs)
217{ 248{
218 unsigned long addr;
219 int i; 249 int i;
220 250
221 for (i = 0; i < nhwentries; i++, sg++) { 251 for (i = 0; i < nhwentries; i++, sg++) {
222 if (!plat_device_is_coherent(dev) && 252 if (!plat_device_is_coherent(dev) &&
223 direction != DMA_TO_DEVICE) { 253 direction != DMA_TO_DEVICE)
224 addr = (unsigned long) sg_virt(sg); 254 __dma_sync(sg_page(sg), sg->offset, sg->length,
225 if (addr) 255 direction);
226 __dma_sync(addr, sg->length, direction);
227 }
228 plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction); 256 plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
229 } 257 }
230} 258}
@@ -232,24 +260,18 @@ static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
232static void mips_dma_sync_single_for_cpu(struct device *dev, 260static void mips_dma_sync_single_for_cpu(struct device *dev,
233 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) 261 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
234{ 262{
235 if (cpu_is_noncoherent_r10000(dev)) { 263 if (cpu_is_noncoherent_r10000(dev))
236 unsigned long addr; 264 __dma_sync(dma_addr_to_page(dev, dma_handle),
237 265 dma_handle & ~PAGE_MASK, size, direction);
238 addr = dma_addr_to_virt(dev, dma_handle);
239 __dma_sync(addr, size, direction);
240 }
241} 266}
242 267
243static void mips_dma_sync_single_for_device(struct device *dev, 268static void mips_dma_sync_single_for_device(struct device *dev,
244 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) 269 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
245{ 270{
246 plat_extra_sync_for_device(dev); 271 plat_extra_sync_for_device(dev);
247 if (!plat_device_is_coherent(dev)) { 272 if (!plat_device_is_coherent(dev))
248 unsigned long addr; 273 __dma_sync(dma_addr_to_page(dev, dma_handle),
249 274 dma_handle & ~PAGE_MASK, size, direction);
250 addr = dma_addr_to_virt(dev, dma_handle);
251 __dma_sync(addr, size, direction);
252 }
253} 275}
254 276
255static void mips_dma_sync_sg_for_cpu(struct device *dev, 277static void mips_dma_sync_sg_for_cpu(struct device *dev,
@@ -260,8 +282,8 @@ static void mips_dma_sync_sg_for_cpu(struct device *dev,
260 /* Make sure that gcc doesn't leave the empty loop body. */ 282 /* Make sure that gcc doesn't leave the empty loop body. */
261 for (i = 0; i < nelems; i++, sg++) { 283 for (i = 0; i < nelems; i++, sg++) {
262 if (cpu_is_noncoherent_r10000(dev)) 284 if (cpu_is_noncoherent_r10000(dev))
263 __dma_sync((unsigned long)page_address(sg_page(sg)), 285 __dma_sync(sg_page(sg), sg->offset, sg->length,
264 sg->length, direction); 286 direction);
265 } 287 }
266} 288}
267 289
@@ -273,8 +295,8 @@ static void mips_dma_sync_sg_for_device(struct device *dev,
273 /* Make sure that gcc doesn't leave the empty loop body. */ 295 /* Make sure that gcc doesn't leave the empty loop body. */
274 for (i = 0; i < nelems; i++, sg++) { 296 for (i = 0; i < nelems; i++, sg++) {
275 if (!plat_device_is_coherent(dev)) 297 if (!plat_device_is_coherent(dev))
276 __dma_sync((unsigned long)page_address(sg_page(sg)), 298 __dma_sync(sg_page(sg), sg->offset, sg->length,
277 sg->length, direction); 299 direction);
278 } 300 }
279} 301}
280 302
@@ -295,7 +317,7 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
295 317
296 plat_extra_sync_for_device(dev); 318 plat_extra_sync_for_device(dev);
297 if (!plat_device_is_coherent(dev)) 319 if (!plat_device_is_coherent(dev))
298 __dma_sync((unsigned long)vaddr, size, direction); 320 __dma_sync_virtual(vaddr, size, direction);
299} 321}
300 322
301EXPORT_SYMBOL(dma_cache_sync); 323EXPORT_SYMBOL(dma_cache_sync);
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index 137ee76a0045..937cf3368164 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -145,7 +145,7 @@ good_area:
145 * the fault. 145 * the fault.
146 */ 146 */
147 fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0); 147 fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0);
148 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); 148 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
149 if (unlikely(fault & VM_FAULT_ERROR)) { 149 if (unlikely(fault & VM_FAULT_ERROR)) {
150 if (fault & VM_FAULT_OOM) 150 if (fault & VM_FAULT_OOM)
151 goto out_of_memory; 151 goto out_of_memory;
@@ -154,12 +154,10 @@ good_area:
154 BUG(); 154 BUG();
155 } 155 }
156 if (fault & VM_FAULT_MAJOR) { 156 if (fault & VM_FAULT_MAJOR) {
157 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 157 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address);
158 1, 0, regs, address);
159 tsk->maj_flt++; 158 tsk->maj_flt++;
160 } else { 159 } else {
161 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 160 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address);
162 1, 0, regs, address);
163 tsk->min_flt++; 161 tsk->min_flt++;
164 } 162 }
165 163
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 1aadeb42c5a5..b7ebc4fa89bc 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -277,11 +277,11 @@ void __init fixrange_init(unsigned long start, unsigned long end,
277 k = __pmd_offset(vaddr); 277 k = __pmd_offset(vaddr);
278 pgd = pgd_base + i; 278 pgd = pgd_base + i;
279 279
280 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) { 280 for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
281 pud = (pud_t *)pgd; 281 pud = (pud_t *)pgd;
282 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) { 282 for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
283 pmd = (pmd_t *)pud; 283 pmd = (pmd_t *)pud;
284 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) { 284 for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
285 if (pmd_none(*pmd)) { 285 if (pmd_none(*pmd)) {
286 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); 286 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
287 set_pmd(pmd, __pmd((unsigned long)pte)); 287 set_pmd(pmd, __pmd((unsigned long)pte));
@@ -368,7 +368,7 @@ void __init mem_init(void)
368#ifdef CONFIG_DISCONTIGMEM 368#ifdef CONFIG_DISCONTIGMEM
369#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" 369#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
370#endif 370#endif
371 max_mapnr = highend_pfn; 371 max_mapnr = highend_pfn ? highend_pfn : max_low_pfn;
372#else 372#else
373 max_mapnr = max_low_pfn; 373 max_mapnr = max_low_pfn;
374#endif 374#endif
diff --git a/arch/mips/mm/mmap.c b/arch/mips/mm/mmap.c
index ae3c20a9556e..9ff5d0fac556 100644
--- a/arch/mips/mm/mmap.c
+++ b/arch/mips/mm/mmap.c
@@ -10,6 +10,7 @@
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/mman.h> 11#include <linux/mman.h>
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/personality.h>
13#include <linux/random.h> 14#include <linux/random.h>
14#include <linux/sched.h> 15#include <linux/sched.h>
15 16
@@ -17,21 +18,65 @@ unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
17 18
18EXPORT_SYMBOL(shm_align_mask); 19EXPORT_SYMBOL(shm_align_mask);
19 20
21/* gap between mmap and stack */
22#define MIN_GAP (128*1024*1024UL)
23#define MAX_GAP ((TASK_SIZE)/6*5)
24
25static int mmap_is_legacy(void)
26{
27 if (current->personality & ADDR_COMPAT_LAYOUT)
28 return 1;
29
30 if (rlimit(RLIMIT_STACK) == RLIM_INFINITY)
31 return 1;
32
33 return sysctl_legacy_va_layout;
34}
35
36static unsigned long mmap_base(unsigned long rnd)
37{
38 unsigned long gap = rlimit(RLIMIT_STACK);
39
40 if (gap < MIN_GAP)
41 gap = MIN_GAP;
42 else if (gap > MAX_GAP)
43 gap = MAX_GAP;
44
45 return PAGE_ALIGN(TASK_SIZE - gap - rnd);
46}
47
48static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
49 unsigned long pgoff)
50{
51 unsigned long base = addr & ~shm_align_mask;
52 unsigned long off = (pgoff << PAGE_SHIFT) & shm_align_mask;
53
54 if (base + off <= addr)
55 return base + off;
56
57 return base - off;
58}
59
20#define COLOUR_ALIGN(addr,pgoff) \ 60#define COLOUR_ALIGN(addr,pgoff) \
21 ((((addr) + shm_align_mask) & ~shm_align_mask) + \ 61 ((((addr) + shm_align_mask) & ~shm_align_mask) + \
22 (((pgoff) << PAGE_SHIFT) & shm_align_mask)) 62 (((pgoff) << PAGE_SHIFT) & shm_align_mask))
23 63
24unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, 64enum mmap_allocation_direction {UP, DOWN};
25 unsigned long len, unsigned long pgoff, unsigned long flags) 65
66static unsigned long arch_get_unmapped_area_foo(struct file *filp,
67 unsigned long addr0, unsigned long len, unsigned long pgoff,
68 unsigned long flags, enum mmap_allocation_direction dir)
26{ 69{
27 struct vm_area_struct * vmm; 70 struct mm_struct *mm = current->mm;
71 struct vm_area_struct *vma;
72 unsigned long addr = addr0;
28 int do_color_align; 73 int do_color_align;
29 74
30 if (len > TASK_SIZE) 75 if (unlikely(len > TASK_SIZE))
31 return -ENOMEM; 76 return -ENOMEM;
32 77
33 if (flags & MAP_FIXED) { 78 if (flags & MAP_FIXED) {
34 /* Even MAP_FIXED mappings must reside within TASK_SIZE. */ 79 /* Even MAP_FIXED mappings must reside within TASK_SIZE */
35 if (TASK_SIZE - len < addr) 80 if (TASK_SIZE - len < addr)
36 return -EINVAL; 81 return -EINVAL;
37 82
@@ -48,34 +93,130 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
48 do_color_align = 0; 93 do_color_align = 0;
49 if (filp || (flags & MAP_SHARED)) 94 if (filp || (flags & MAP_SHARED))
50 do_color_align = 1; 95 do_color_align = 1;
96
97 /* requesting a specific address */
51 if (addr) { 98 if (addr) {
52 if (do_color_align) 99 if (do_color_align)
53 addr = COLOUR_ALIGN(addr, pgoff); 100 addr = COLOUR_ALIGN(addr, pgoff);
54 else 101 else
55 addr = PAGE_ALIGN(addr); 102 addr = PAGE_ALIGN(addr);
56 vmm = find_vma(current->mm, addr); 103
104 vma = find_vma(mm, addr);
57 if (TASK_SIZE - len >= addr && 105 if (TASK_SIZE - len >= addr &&
58 (!vmm || addr + len <= vmm->vm_start)) 106 (!vma || addr + len <= vma->vm_start))
59 return addr; 107 return addr;
60 } 108 }
61 addr = current->mm->mmap_base;
62 if (do_color_align)
63 addr = COLOUR_ALIGN(addr, pgoff);
64 else
65 addr = PAGE_ALIGN(addr);
66 109
67 for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) { 110 if (dir == UP) {
68 /* At this point: (!vmm || addr < vmm->vm_end). */ 111 addr = mm->mmap_base;
69 if (TASK_SIZE - len < addr) 112 if (do_color_align)
70 return -ENOMEM; 113 addr = COLOUR_ALIGN(addr, pgoff);
71 if (!vmm || addr + len <= vmm->vm_start) 114 else
72 return addr; 115 addr = PAGE_ALIGN(addr);
73 addr = vmm->vm_end; 116
117 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
118 /* At this point: (!vma || addr < vma->vm_end). */
119 if (TASK_SIZE - len < addr)
120 return -ENOMEM;
121 if (!vma || addr + len <= vma->vm_start)
122 return addr;
123 addr = vma->vm_end;
124 if (do_color_align)
125 addr = COLOUR_ALIGN(addr, pgoff);
126 }
127 } else {
128 /* check if free_area_cache is useful for us */
129 if (len <= mm->cached_hole_size) {
130 mm->cached_hole_size = 0;
131 mm->free_area_cache = mm->mmap_base;
132 }
133
134 /* either no address requested or can't fit in requested address hole */
135 addr = mm->free_area_cache;
136 if (do_color_align) {
137 unsigned long base =
138 COLOUR_ALIGN_DOWN(addr - len, pgoff);
139
140 addr = base + len;
141 }
142
143 /* make sure it can fit in the remaining address space */
144 if (likely(addr > len)) {
145 vma = find_vma(mm, addr - len);
146 if (!vma || addr <= vma->vm_start) {
147 /* remember the address as a hint for next time */
148 return mm->free_area_cache = addr-len;
149 }
150 }
151
152 if (unlikely(mm->mmap_base < len))
153 goto bottomup;
154
155 addr = mm->mmap_base-len;
74 if (do_color_align) 156 if (do_color_align)
75 addr = COLOUR_ALIGN(addr, pgoff); 157 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
158
159 do {
160 /*
161 * Lookup failure means no vma is above this address,
162 * else if new region fits below vma->vm_start,
163 * return with success:
164 */
165 vma = find_vma(mm, addr);
166 if (likely(!vma || addr+len <= vma->vm_start)) {
167 /* remember the address as a hint for next time */
168 return mm->free_area_cache = addr;
169 }
170
171 /* remember the largest hole we saw so far */
172 if (addr + mm->cached_hole_size < vma->vm_start)
173 mm->cached_hole_size = vma->vm_start - addr;
174
175 /* try just below the current vma->vm_start */
176 addr = vma->vm_start-len;
177 if (do_color_align)
178 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
179 } while (likely(len < vma->vm_start));
180
181bottomup:
182 /*
183 * A failed mmap() very likely causes application failure,
184 * so fall back to the bottom-up function here. This scenario
185 * can happen with large stack limits and large mmap()
186 * allocations.
187 */
188 mm->cached_hole_size = ~0UL;
189 mm->free_area_cache = TASK_UNMAPPED_BASE;
190 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
191 /*
192 * Restore the topdown base:
193 */
194 mm->free_area_cache = mm->mmap_base;
195 mm->cached_hole_size = ~0UL;
196
197 return addr;
76 } 198 }
77} 199}
78 200
201unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr0,
202 unsigned long len, unsigned long pgoff, unsigned long flags)
203{
204 return arch_get_unmapped_area_foo(filp,
205 addr0, len, pgoff, flags, UP);
206}
207
208/*
209 * There is no need to export this but sched.h declares the function as
210 * extern so making it static here results in an error.
211 */
212unsigned long arch_get_unmapped_area_topdown(struct file *filp,
213 unsigned long addr0, unsigned long len, unsigned long pgoff,
214 unsigned long flags)
215{
216 return arch_get_unmapped_area_foo(filp,
217 addr0, len, pgoff, flags, DOWN);
218}
219
79void arch_pick_mmap_layout(struct mm_struct *mm) 220void arch_pick_mmap_layout(struct mm_struct *mm)
80{ 221{
81 unsigned long random_factor = 0UL; 222 unsigned long random_factor = 0UL;
@@ -89,9 +230,15 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
89 random_factor &= 0xffffffful; 230 random_factor &= 0xffffffful;
90 } 231 }
91 232
92 mm->mmap_base = TASK_UNMAPPED_BASE + random_factor; 233 if (mmap_is_legacy()) {
93 mm->get_unmapped_area = arch_get_unmapped_area; 234 mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
94 mm->unmap_area = arch_unmap_area; 235 mm->get_unmapped_area = arch_get_unmapped_area;
236 mm->unmap_area = arch_unmap_area;
237 } else {
238 mm->mmap_base = mmap_base(random_factor);
239 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
240 mm->unmap_area = arch_unmap_area_topdown;
241 }
95} 242}
96 243
97static inline unsigned long brk_rnd(void) 244static inline unsigned long brk_rnd(void)
diff --git a/arch/mips/mm/pgtable-32.c b/arch/mips/mm/pgtable-32.c
index 575e4019227b..adc6911ba748 100644
--- a/arch/mips/mm/pgtable-32.c
+++ b/arch/mips/mm/pgtable-32.c
@@ -52,7 +52,7 @@ void __init pagetable_init(void)
52 * Fixed mappings: 52 * Fixed mappings:
53 */ 53 */
54 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK; 54 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
55 fixrange_init(vaddr, 0, pgd_base); 55 fixrange_init(vaddr, vaddr + FIXADDR_SIZE, pgd_base);
56 56
57#ifdef CONFIG_HIGHMEM 57#ifdef CONFIG_HIGHMEM
58 /* 58 /*
diff --git a/arch/mips/mm/pgtable-64.c b/arch/mips/mm/pgtable-64.c
index 78eaa4f0b0ec..cda4e300eb0a 100644
--- a/arch/mips/mm/pgtable-64.c
+++ b/arch/mips/mm/pgtable-64.c
@@ -76,5 +76,5 @@ void __init pagetable_init(void)
76 * Fixed mappings: 76 * Fixed mappings:
77 */ 77 */
78 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK; 78 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
79 fixrange_init(vaddr, 0, pgd_base); 79 fixrange_init(vaddr, vaddr + FIXADDR_SIZE, pgd_base);
80} 80}
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 424ed4b92e6d..b6e1cff50667 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -42,6 +42,18 @@
42extern void tlb_do_page_fault_0(void); 42extern void tlb_do_page_fault_0(void);
43extern void tlb_do_page_fault_1(void); 43extern void tlb_do_page_fault_1(void);
44 44
45struct work_registers {
46 int r1;
47 int r2;
48 int r3;
49};
50
51struct tlb_reg_save {
52 unsigned long a;
53 unsigned long b;
54} ____cacheline_aligned_in_smp;
55
56static struct tlb_reg_save handler_reg_save[NR_CPUS];
45 57
46static inline int r45k_bvahwbug(void) 58static inline int r45k_bvahwbug(void)
47{ 59{
@@ -248,6 +260,73 @@ static int scratch_reg __cpuinitdata;
248static int pgd_reg __cpuinitdata; 260static int pgd_reg __cpuinitdata;
249enum vmalloc64_mode {not_refill, refill_scratch, refill_noscratch}; 261enum vmalloc64_mode {not_refill, refill_scratch, refill_noscratch};
250 262
263static struct work_registers __cpuinit build_get_work_registers(u32 **p)
264{
265 struct work_registers r;
266
267 int smp_processor_id_reg;
268 int smp_processor_id_sel;
269 int smp_processor_id_shift;
270
271 if (scratch_reg > 0) {
272 /* Save in CPU local C0_KScratch? */
273 UASM_i_MTC0(p, 1, 31, scratch_reg);
274 r.r1 = K0;
275 r.r2 = K1;
276 r.r3 = 1;
277 return r;
278 }
279
280 if (num_possible_cpus() > 1) {
281#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
282 smp_processor_id_shift = 51;
283 smp_processor_id_reg = 20; /* XContext */
284 smp_processor_id_sel = 0;
285#else
286# ifdef CONFIG_32BIT
287 smp_processor_id_shift = 25;
288 smp_processor_id_reg = 4; /* Context */
289 smp_processor_id_sel = 0;
290# endif
291# ifdef CONFIG_64BIT
292 smp_processor_id_shift = 26;
293 smp_processor_id_reg = 4; /* Context */
294 smp_processor_id_sel = 0;
295# endif
296#endif
297 /* Get smp_processor_id */
298 UASM_i_MFC0(p, K0, smp_processor_id_reg, smp_processor_id_sel);
299 UASM_i_SRL_SAFE(p, K0, K0, smp_processor_id_shift);
300
301 /* handler_reg_save index in K0 */
302 UASM_i_SLL(p, K0, K0, ilog2(sizeof(struct tlb_reg_save)));
303
304 UASM_i_LA(p, K1, (long)&handler_reg_save);
305 UASM_i_ADDU(p, K0, K0, K1);
306 } else {
307 UASM_i_LA(p, K0, (long)&handler_reg_save);
308 }
309 /* K0 now points to save area, save $1 and $2 */
310 UASM_i_SW(p, 1, offsetof(struct tlb_reg_save, a), K0);
311 UASM_i_SW(p, 2, offsetof(struct tlb_reg_save, b), K0);
312
313 r.r1 = K1;
314 r.r2 = 1;
315 r.r3 = 2;
316 return r;
317}
318
319static void __cpuinit build_restore_work_registers(u32 **p)
320{
321 if (scratch_reg > 0) {
322 UASM_i_MFC0(p, 1, 31, scratch_reg);
323 return;
324 }
325 /* K0 already points to save area, restore $1 and $2 */
326 UASM_i_LW(p, 1, offsetof(struct tlb_reg_save, a), K0);
327 UASM_i_LW(p, 2, offsetof(struct tlb_reg_save, b), K0);
328}
329
251#ifndef CONFIG_MIPS_PGD_C0_CONTEXT 330#ifndef CONFIG_MIPS_PGD_C0_CONTEXT
252 331
253/* 332/*
@@ -1160,9 +1239,6 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
1160 memset(relocs, 0, sizeof(relocs)); 1239 memset(relocs, 0, sizeof(relocs));
1161 memset(final_handler, 0, sizeof(final_handler)); 1240 memset(final_handler, 0, sizeof(final_handler));
1162 1241
1163 if (scratch_reg == 0)
1164 scratch_reg = allocate_kscratch();
1165
1166 if ((scratch_reg > 0 || scratchpad_available()) && use_bbit_insns()) { 1242 if ((scratch_reg > 0 || scratchpad_available()) && use_bbit_insns()) {
1167 htlb_info = build_fast_tlb_refill_handler(&p, &l, &r, K0, K1, 1243 htlb_info = build_fast_tlb_refill_handler(&p, &l, &r, K0, K1,
1168 scratch_reg); 1244 scratch_reg);
@@ -1462,22 +1538,28 @@ iPTE_SW(u32 **p, struct uasm_reloc **r, unsigned int pte, unsigned int ptr,
1462 */ 1538 */
1463static void __cpuinit 1539static void __cpuinit
1464build_pte_present(u32 **p, struct uasm_reloc **r, 1540build_pte_present(u32 **p, struct uasm_reloc **r,
1465 unsigned int pte, unsigned int ptr, enum label_id lid) 1541 int pte, int ptr, int scratch, enum label_id lid)
1466{ 1542{
1543 int t = scratch >= 0 ? scratch : pte;
1544
1467 if (kernel_uses_smartmips_rixi) { 1545 if (kernel_uses_smartmips_rixi) {
1468 if (use_bbit_insns()) { 1546 if (use_bbit_insns()) {
1469 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid); 1547 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
1470 uasm_i_nop(p); 1548 uasm_i_nop(p);
1471 } else { 1549 } else {
1472 uasm_i_andi(p, pte, pte, _PAGE_PRESENT); 1550 uasm_i_andi(p, t, pte, _PAGE_PRESENT);
1473 uasm_il_beqz(p, r, pte, lid); 1551 uasm_il_beqz(p, r, t, lid);
1474 iPTE_LW(p, pte, ptr); 1552 if (pte == t)
1553 /* You lose the SMP race :-(*/
1554 iPTE_LW(p, pte, ptr);
1475 } 1555 }
1476 } else { 1556 } else {
1477 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); 1557 uasm_i_andi(p, t, pte, _PAGE_PRESENT | _PAGE_READ);
1478 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); 1558 uasm_i_xori(p, t, t, _PAGE_PRESENT | _PAGE_READ);
1479 uasm_il_bnez(p, r, pte, lid); 1559 uasm_il_bnez(p, r, t, lid);
1480 iPTE_LW(p, pte, ptr); 1560 if (pte == t)
1561 /* You lose the SMP race :-(*/
1562 iPTE_LW(p, pte, ptr);
1481 } 1563 }
1482} 1564}
1483 1565
@@ -1497,19 +1579,19 @@ build_make_valid(u32 **p, struct uasm_reloc **r, unsigned int pte,
1497 */ 1579 */
1498static void __cpuinit 1580static void __cpuinit
1499build_pte_writable(u32 **p, struct uasm_reloc **r, 1581build_pte_writable(u32 **p, struct uasm_reloc **r,
1500 unsigned int pte, unsigned int ptr, enum label_id lid) 1582 unsigned int pte, unsigned int ptr, int scratch,
1583 enum label_id lid)
1501{ 1584{
1502 if (use_bbit_insns()) { 1585 int t = scratch >= 0 ? scratch : pte;
1503 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid); 1586
1504 uasm_i_nop(p); 1587 uasm_i_andi(p, t, pte, _PAGE_PRESENT | _PAGE_WRITE);
1505 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid); 1588 uasm_i_xori(p, t, t, _PAGE_PRESENT | _PAGE_WRITE);
1506 uasm_i_nop(p); 1589 uasm_il_bnez(p, r, t, lid);
1507 } else { 1590 if (pte == t)
1508 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); 1591 /* You lose the SMP race :-(*/
1509 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
1510 uasm_il_bnez(p, r, pte, lid);
1511 iPTE_LW(p, pte, ptr); 1592 iPTE_LW(p, pte, ptr);
1512 } 1593 else
1594 uasm_i_nop(p);
1513} 1595}
1514 1596
1515/* Make PTE writable, update software status bits as well, then store 1597/* Make PTE writable, update software status bits as well, then store
@@ -1531,15 +1613,19 @@ build_make_write(u32 **p, struct uasm_reloc **r, unsigned int pte,
1531 */ 1613 */
1532static void __cpuinit 1614static void __cpuinit
1533build_pte_modifiable(u32 **p, struct uasm_reloc **r, 1615build_pte_modifiable(u32 **p, struct uasm_reloc **r,
1534 unsigned int pte, unsigned int ptr, enum label_id lid) 1616 unsigned int pte, unsigned int ptr, int scratch,
1617 enum label_id lid)
1535{ 1618{
1536 if (use_bbit_insns()) { 1619 if (use_bbit_insns()) {
1537 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid); 1620 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid);
1538 uasm_i_nop(p); 1621 uasm_i_nop(p);
1539 } else { 1622 } else {
1540 uasm_i_andi(p, pte, pte, _PAGE_WRITE); 1623 int t = scratch >= 0 ? scratch : pte;
1541 uasm_il_beqz(p, r, pte, lid); 1624 uasm_i_andi(p, t, pte, _PAGE_WRITE);
1542 iPTE_LW(p, pte, ptr); 1625 uasm_il_beqz(p, r, t, lid);
1626 if (pte == t)
1627 /* You lose the SMP race :-(*/
1628 iPTE_LW(p, pte, ptr);
1543 } 1629 }
1544} 1630}
1545 1631
@@ -1619,7 +1705,7 @@ static void __cpuinit build_r3000_tlb_load_handler(void)
1619 memset(relocs, 0, sizeof(relocs)); 1705 memset(relocs, 0, sizeof(relocs));
1620 1706
1621 build_r3000_tlbchange_handler_head(&p, K0, K1); 1707 build_r3000_tlbchange_handler_head(&p, K0, K1);
1622 build_pte_present(&p, &r, K0, K1, label_nopage_tlbl); 1708 build_pte_present(&p, &r, K0, K1, -1, label_nopage_tlbl);
1623 uasm_i_nop(&p); /* load delay */ 1709 uasm_i_nop(&p); /* load delay */
1624 build_make_valid(&p, &r, K0, K1); 1710 build_make_valid(&p, &r, K0, K1);
1625 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); 1711 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
@@ -1649,7 +1735,7 @@ static void __cpuinit build_r3000_tlb_store_handler(void)
1649 memset(relocs, 0, sizeof(relocs)); 1735 memset(relocs, 0, sizeof(relocs));
1650 1736
1651 build_r3000_tlbchange_handler_head(&p, K0, K1); 1737 build_r3000_tlbchange_handler_head(&p, K0, K1);
1652 build_pte_writable(&p, &r, K0, K1, label_nopage_tlbs); 1738 build_pte_writable(&p, &r, K0, K1, -1, label_nopage_tlbs);
1653 uasm_i_nop(&p); /* load delay */ 1739 uasm_i_nop(&p); /* load delay */
1654 build_make_write(&p, &r, K0, K1); 1740 build_make_write(&p, &r, K0, K1);
1655 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); 1741 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
@@ -1673,13 +1759,14 @@ static void __cpuinit build_r3000_tlb_modify_handler(void)
1673 u32 *p = handle_tlbm; 1759 u32 *p = handle_tlbm;
1674 struct uasm_label *l = labels; 1760 struct uasm_label *l = labels;
1675 struct uasm_reloc *r = relocs; 1761 struct uasm_reloc *r = relocs;
1762 struct work_registers wr;
1676 1763
1677 memset(handle_tlbm, 0, sizeof(handle_tlbm)); 1764 memset(handle_tlbm, 0, sizeof(handle_tlbm));
1678 memset(labels, 0, sizeof(labels)); 1765 memset(labels, 0, sizeof(labels));
1679 memset(relocs, 0, sizeof(relocs)); 1766 memset(relocs, 0, sizeof(relocs));
1680 1767
1681 build_r3000_tlbchange_handler_head(&p, K0, K1); 1768 build_r3000_tlbchange_handler_head(&p, K0, K1);
1682 build_pte_modifiable(&p, &r, K0, K1, label_nopage_tlbm); 1769 build_pte_modifiable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbm);
1683 uasm_i_nop(&p); /* load delay */ 1770 uasm_i_nop(&p); /* load delay */
1684 build_make_write(&p, &r, K0, K1); 1771 build_make_write(&p, &r, K0, K1);
1685 build_r3000_pte_reload_tlbwi(&p, K0, K1); 1772 build_r3000_pte_reload_tlbwi(&p, K0, K1);
@@ -1702,15 +1789,16 @@ static void __cpuinit build_r3000_tlb_modify_handler(void)
1702/* 1789/*
1703 * R4000 style TLB load/store/modify handlers. 1790 * R4000 style TLB load/store/modify handlers.
1704 */ 1791 */
1705static void __cpuinit 1792static struct work_registers __cpuinit
1706build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l, 1793build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
1707 struct uasm_reloc **r, unsigned int pte, 1794 struct uasm_reloc **r)
1708 unsigned int ptr)
1709{ 1795{
1796 struct work_registers wr = build_get_work_registers(p);
1797
1710#ifdef CONFIG_64BIT 1798#ifdef CONFIG_64BIT
1711 build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ 1799 build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
1712#else 1800#else
1713 build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ 1801 build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
1714#endif 1802#endif
1715 1803
1716#ifdef CONFIG_HUGETLB_PAGE 1804#ifdef CONFIG_HUGETLB_PAGE
@@ -1719,21 +1807,22 @@ build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
1719 * instead contains the tlb pte. Check the PAGE_HUGE bit and 1807 * instead contains the tlb pte. Check the PAGE_HUGE bit and
1720 * see if we need to jump to huge tlb processing. 1808 * see if we need to jump to huge tlb processing.
1721 */ 1809 */
1722 build_is_huge_pte(p, r, pte, ptr, label_tlb_huge_update); 1810 build_is_huge_pte(p, r, wr.r1, wr.r2, label_tlb_huge_update);
1723#endif 1811#endif
1724 1812
1725 UASM_i_MFC0(p, pte, C0_BADVADDR); 1813 UASM_i_MFC0(p, wr.r1, C0_BADVADDR);
1726 UASM_i_LW(p, ptr, 0, ptr); 1814 UASM_i_LW(p, wr.r2, 0, wr.r2);
1727 UASM_i_SRL(p, pte, pte, PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2); 1815 UASM_i_SRL(p, wr.r1, wr.r1, PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2);
1728 uasm_i_andi(p, pte, pte, (PTRS_PER_PTE - 1) << PTE_T_LOG2); 1816 uasm_i_andi(p, wr.r1, wr.r1, (PTRS_PER_PTE - 1) << PTE_T_LOG2);
1729 UASM_i_ADDU(p, ptr, ptr, pte); 1817 UASM_i_ADDU(p, wr.r2, wr.r2, wr.r1);
1730 1818
1731#ifdef CONFIG_SMP 1819#ifdef CONFIG_SMP
1732 uasm_l_smp_pgtable_change(l, *p); 1820 uasm_l_smp_pgtable_change(l, *p);
1733#endif 1821#endif
1734 iPTE_LW(p, pte, ptr); /* get even pte */ 1822 iPTE_LW(p, wr.r1, wr.r2); /* get even pte */
1735 if (!m4kc_tlbp_war()) 1823 if (!m4kc_tlbp_war())
1736 build_tlb_probe_entry(p); 1824 build_tlb_probe_entry(p);
1825 return wr;
1737} 1826}
1738 1827
1739static void __cpuinit 1828static void __cpuinit
@@ -1746,6 +1835,7 @@ build_r4000_tlbchange_handler_tail(u32 **p, struct uasm_label **l,
1746 build_update_entries(p, tmp, ptr); 1835 build_update_entries(p, tmp, ptr);
1747 build_tlb_write_entry(p, l, r, tlb_indexed); 1836 build_tlb_write_entry(p, l, r, tlb_indexed);
1748 uasm_l_leave(l, *p); 1837 uasm_l_leave(l, *p);
1838 build_restore_work_registers(p);
1749 uasm_i_eret(p); /* return from trap */ 1839 uasm_i_eret(p); /* return from trap */
1750 1840
1751#ifdef CONFIG_64BIT 1841#ifdef CONFIG_64BIT
@@ -1758,6 +1848,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1758 u32 *p = handle_tlbl; 1848 u32 *p = handle_tlbl;
1759 struct uasm_label *l = labels; 1849 struct uasm_label *l = labels;
1760 struct uasm_reloc *r = relocs; 1850 struct uasm_reloc *r = relocs;
1851 struct work_registers wr;
1761 1852
1762 memset(handle_tlbl, 0, sizeof(handle_tlbl)); 1853 memset(handle_tlbl, 0, sizeof(handle_tlbl));
1763 memset(labels, 0, sizeof(labels)); 1854 memset(labels, 0, sizeof(labels));
@@ -1777,8 +1868,8 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1777 /* No need for uasm_i_nop */ 1868 /* No need for uasm_i_nop */
1778 } 1869 }
1779 1870
1780 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); 1871 wr = build_r4000_tlbchange_handler_head(&p, &l, &r);
1781 build_pte_present(&p, &r, K0, K1, label_nopage_tlbl); 1872 build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
1782 if (m4kc_tlbp_war()) 1873 if (m4kc_tlbp_war())
1783 build_tlb_probe_entry(&p); 1874 build_tlb_probe_entry(&p);
1784 1875
@@ -1788,44 +1879,43 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1788 * have triggered it. Skip the expensive test.. 1879 * have triggered it. Skip the expensive test..
1789 */ 1880 */
1790 if (use_bbit_insns()) { 1881 if (use_bbit_insns()) {
1791 uasm_il_bbit0(&p, &r, K0, ilog2(_PAGE_VALID), 1882 uasm_il_bbit0(&p, &r, wr.r1, ilog2(_PAGE_VALID),
1792 label_tlbl_goaround1); 1883 label_tlbl_goaround1);
1793 } else { 1884 } else {
1794 uasm_i_andi(&p, K0, K0, _PAGE_VALID); 1885 uasm_i_andi(&p, wr.r3, wr.r1, _PAGE_VALID);
1795 uasm_il_beqz(&p, &r, K0, label_tlbl_goaround1); 1886 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround1);
1796 } 1887 }
1797 uasm_i_nop(&p); 1888 uasm_i_nop(&p);
1798 1889
1799 uasm_i_tlbr(&p); 1890 uasm_i_tlbr(&p);
1800 /* Examine entrylo 0 or 1 based on ptr. */ 1891 /* Examine entrylo 0 or 1 based on ptr. */
1801 if (use_bbit_insns()) { 1892 if (use_bbit_insns()) {
1802 uasm_i_bbit0(&p, K1, ilog2(sizeof(pte_t)), 8); 1893 uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
1803 } else { 1894 } else {
1804 uasm_i_andi(&p, K0, K1, sizeof(pte_t)); 1895 uasm_i_andi(&p, wr.r3, wr.r2, sizeof(pte_t));
1805 uasm_i_beqz(&p, K0, 8); 1896 uasm_i_beqz(&p, wr.r3, 8);
1806 } 1897 }
1807 1898 /* load it in the delay slot*/
1808 UASM_i_MFC0(&p, K0, C0_ENTRYLO0); /* load it in the delay slot*/ 1899 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO0);
1809 UASM_i_MFC0(&p, K0, C0_ENTRYLO1); /* load it if ptr is odd */ 1900 /* load it if ptr is odd */
1901 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO1);
1810 /* 1902 /*
1811 * If the entryLo (now in K0) is valid (bit 1), RI or 1903 * If the entryLo (now in wr.r3) is valid (bit 1), RI or
1812 * XI must have triggered it. 1904 * XI must have triggered it.
1813 */ 1905 */
1814 if (use_bbit_insns()) { 1906 if (use_bbit_insns()) {
1815 uasm_il_bbit1(&p, &r, K0, 1, label_nopage_tlbl); 1907 uasm_il_bbit1(&p, &r, wr.r3, 1, label_nopage_tlbl);
1816 /* Reload the PTE value */ 1908 uasm_i_nop(&p);
1817 iPTE_LW(&p, K0, K1);
1818 uasm_l_tlbl_goaround1(&l, p); 1909 uasm_l_tlbl_goaround1(&l, p);
1819 } else { 1910 } else {
1820 uasm_i_andi(&p, K0, K0, 2); 1911 uasm_i_andi(&p, wr.r3, wr.r3, 2);
1821 uasm_il_bnez(&p, &r, K0, label_nopage_tlbl); 1912 uasm_il_bnez(&p, &r, wr.r3, label_nopage_tlbl);
1822 uasm_l_tlbl_goaround1(&l, p); 1913 uasm_i_nop(&p);
1823 /* Reload the PTE value */
1824 iPTE_LW(&p, K0, K1);
1825 } 1914 }
1915 uasm_l_tlbl_goaround1(&l, p);
1826 } 1916 }
1827 build_make_valid(&p, &r, K0, K1); 1917 build_make_valid(&p, &r, wr.r1, wr.r2);
1828 build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); 1918 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
1829 1919
1830#ifdef CONFIG_HUGETLB_PAGE 1920#ifdef CONFIG_HUGETLB_PAGE
1831 /* 1921 /*
@@ -1833,8 +1923,8 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1833 * spots a huge page. 1923 * spots a huge page.
1834 */ 1924 */
1835 uasm_l_tlb_huge_update(&l, p); 1925 uasm_l_tlb_huge_update(&l, p);
1836 iPTE_LW(&p, K0, K1); 1926 iPTE_LW(&p, wr.r1, wr.r2);
1837 build_pte_present(&p, &r, K0, K1, label_nopage_tlbl); 1927 build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
1838 build_tlb_probe_entry(&p); 1928 build_tlb_probe_entry(&p);
1839 1929
1840 if (kernel_uses_smartmips_rixi) { 1930 if (kernel_uses_smartmips_rixi) {
@@ -1843,50 +1933,51 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1843 * have triggered it. Skip the expensive test.. 1933 * have triggered it. Skip the expensive test..
1844 */ 1934 */
1845 if (use_bbit_insns()) { 1935 if (use_bbit_insns()) {
1846 uasm_il_bbit0(&p, &r, K0, ilog2(_PAGE_VALID), 1936 uasm_il_bbit0(&p, &r, wr.r1, ilog2(_PAGE_VALID),
1847 label_tlbl_goaround2); 1937 label_tlbl_goaround2);
1848 } else { 1938 } else {
1849 uasm_i_andi(&p, K0, K0, _PAGE_VALID); 1939 uasm_i_andi(&p, wr.r3, wr.r1, _PAGE_VALID);
1850 uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2); 1940 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2);
1851 } 1941 }
1852 uasm_i_nop(&p); 1942 uasm_i_nop(&p);
1853 1943
1854 uasm_i_tlbr(&p); 1944 uasm_i_tlbr(&p);
1855 /* Examine entrylo 0 or 1 based on ptr. */ 1945 /* Examine entrylo 0 or 1 based on ptr. */
1856 if (use_bbit_insns()) { 1946 if (use_bbit_insns()) {
1857 uasm_i_bbit0(&p, K1, ilog2(sizeof(pte_t)), 8); 1947 uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
1858 } else { 1948 } else {
1859 uasm_i_andi(&p, K0, K1, sizeof(pte_t)); 1949 uasm_i_andi(&p, wr.r3, wr.r2, sizeof(pte_t));
1860 uasm_i_beqz(&p, K0, 8); 1950 uasm_i_beqz(&p, wr.r3, 8);
1861 } 1951 }
1862 UASM_i_MFC0(&p, K0, C0_ENTRYLO0); /* load it in the delay slot*/ 1952 /* load it in the delay slot*/
1863 UASM_i_MFC0(&p, K0, C0_ENTRYLO1); /* load it if ptr is odd */ 1953 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO0);
1954 /* load it if ptr is odd */
1955 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO1);
1864 /* 1956 /*
1865 * If the entryLo (now in K0) is valid (bit 1), RI or 1957 * If the entryLo (now in wr.r3) is valid (bit 1), RI or
1866 * XI must have triggered it. 1958 * XI must have triggered it.
1867 */ 1959 */
1868 if (use_bbit_insns()) { 1960 if (use_bbit_insns()) {
1869 uasm_il_bbit0(&p, &r, K0, 1, label_tlbl_goaround2); 1961 uasm_il_bbit0(&p, &r, wr.r3, 1, label_tlbl_goaround2);
1870 } else { 1962 } else {
1871 uasm_i_andi(&p, K0, K0, 2); 1963 uasm_i_andi(&p, wr.r3, wr.r3, 2);
1872 uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2); 1964 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2);
1873 } 1965 }
1874 /* Reload the PTE value */
1875 iPTE_LW(&p, K0, K1);
1876 1966
1877 /* 1967 /*
1878 * We clobbered C0_PAGEMASK, restore it. On the other branch 1968 * We clobbered C0_PAGEMASK, restore it. On the other branch
1879 * it is restored in build_huge_tlb_write_entry. 1969 * it is restored in build_huge_tlb_write_entry.
1880 */ 1970 */
1881 build_restore_pagemask(&p, &r, K0, label_nopage_tlbl, 0); 1971 build_restore_pagemask(&p, &r, wr.r3, label_nopage_tlbl, 0);
1882 1972
1883 uasm_l_tlbl_goaround2(&l, p); 1973 uasm_l_tlbl_goaround2(&l, p);
1884 } 1974 }
1885 uasm_i_ori(&p, K0, K0, (_PAGE_ACCESSED | _PAGE_VALID)); 1975 uasm_i_ori(&p, wr.r1, wr.r1, (_PAGE_ACCESSED | _PAGE_VALID));
1886 build_huge_handler_tail(&p, &r, &l, K0, K1); 1976 build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2);
1887#endif 1977#endif
1888 1978
1889 uasm_l_nopage_tlbl(&l, p); 1979 uasm_l_nopage_tlbl(&l, p);
1980 build_restore_work_registers(&p);
1890 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); 1981 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff);
1891 uasm_i_nop(&p); 1982 uasm_i_nop(&p);
1892 1983
@@ -1905,17 +1996,18 @@ static void __cpuinit build_r4000_tlb_store_handler(void)
1905 u32 *p = handle_tlbs; 1996 u32 *p = handle_tlbs;
1906 struct uasm_label *l = labels; 1997 struct uasm_label *l = labels;
1907 struct uasm_reloc *r = relocs; 1998 struct uasm_reloc *r = relocs;
1999 struct work_registers wr;
1908 2000
1909 memset(handle_tlbs, 0, sizeof(handle_tlbs)); 2001 memset(handle_tlbs, 0, sizeof(handle_tlbs));
1910 memset(labels, 0, sizeof(labels)); 2002 memset(labels, 0, sizeof(labels));
1911 memset(relocs, 0, sizeof(relocs)); 2003 memset(relocs, 0, sizeof(relocs));
1912 2004
1913 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); 2005 wr = build_r4000_tlbchange_handler_head(&p, &l, &r);
1914 build_pte_writable(&p, &r, K0, K1, label_nopage_tlbs); 2006 build_pte_writable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbs);
1915 if (m4kc_tlbp_war()) 2007 if (m4kc_tlbp_war())
1916 build_tlb_probe_entry(&p); 2008 build_tlb_probe_entry(&p);
1917 build_make_write(&p, &r, K0, K1); 2009 build_make_write(&p, &r, wr.r1, wr.r2);
1918 build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); 2010 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
1919 2011
1920#ifdef CONFIG_HUGETLB_PAGE 2012#ifdef CONFIG_HUGETLB_PAGE
1921 /* 2013 /*
@@ -1923,15 +2015,16 @@ static void __cpuinit build_r4000_tlb_store_handler(void)
1923 * build_r4000_tlbchange_handler_head spots a huge page. 2015 * build_r4000_tlbchange_handler_head spots a huge page.
1924 */ 2016 */
1925 uasm_l_tlb_huge_update(&l, p); 2017 uasm_l_tlb_huge_update(&l, p);
1926 iPTE_LW(&p, K0, K1); 2018 iPTE_LW(&p, wr.r1, wr.r2);
1927 build_pte_writable(&p, &r, K0, K1, label_nopage_tlbs); 2019 build_pte_writable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbs);
1928 build_tlb_probe_entry(&p); 2020 build_tlb_probe_entry(&p);
1929 uasm_i_ori(&p, K0, K0, 2021 uasm_i_ori(&p, wr.r1, wr.r1,
1930 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY); 2022 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY);
1931 build_huge_handler_tail(&p, &r, &l, K0, K1); 2023 build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2);
1932#endif 2024#endif
1933 2025
1934 uasm_l_nopage_tlbs(&l, p); 2026 uasm_l_nopage_tlbs(&l, p);
2027 build_restore_work_registers(&p);
1935 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); 2028 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
1936 uasm_i_nop(&p); 2029 uasm_i_nop(&p);
1937 2030
@@ -1950,18 +2043,19 @@ static void __cpuinit build_r4000_tlb_modify_handler(void)
1950 u32 *p = handle_tlbm; 2043 u32 *p = handle_tlbm;
1951 struct uasm_label *l = labels; 2044 struct uasm_label *l = labels;
1952 struct uasm_reloc *r = relocs; 2045 struct uasm_reloc *r = relocs;
2046 struct work_registers wr;
1953 2047
1954 memset(handle_tlbm, 0, sizeof(handle_tlbm)); 2048 memset(handle_tlbm, 0, sizeof(handle_tlbm));
1955 memset(labels, 0, sizeof(labels)); 2049 memset(labels, 0, sizeof(labels));
1956 memset(relocs, 0, sizeof(relocs)); 2050 memset(relocs, 0, sizeof(relocs));
1957 2051
1958 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); 2052 wr = build_r4000_tlbchange_handler_head(&p, &l, &r);
1959 build_pte_modifiable(&p, &r, K0, K1, label_nopage_tlbm); 2053 build_pte_modifiable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbm);
1960 if (m4kc_tlbp_war()) 2054 if (m4kc_tlbp_war())
1961 build_tlb_probe_entry(&p); 2055 build_tlb_probe_entry(&p);
1962 /* Present and writable bits set, set accessed and dirty bits. */ 2056 /* Present and writable bits set, set accessed and dirty bits. */
1963 build_make_write(&p, &r, K0, K1); 2057 build_make_write(&p, &r, wr.r1, wr.r2);
1964 build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); 2058 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
1965 2059
1966#ifdef CONFIG_HUGETLB_PAGE 2060#ifdef CONFIG_HUGETLB_PAGE
1967 /* 2061 /*
@@ -1969,15 +2063,16 @@ static void __cpuinit build_r4000_tlb_modify_handler(void)
1969 * build_r4000_tlbchange_handler_head spots a huge page. 2063 * build_r4000_tlbchange_handler_head spots a huge page.
1970 */ 2064 */
1971 uasm_l_tlb_huge_update(&l, p); 2065 uasm_l_tlb_huge_update(&l, p);
1972 iPTE_LW(&p, K0, K1); 2066 iPTE_LW(&p, wr.r1, wr.r2);
1973 build_pte_modifiable(&p, &r, K0, K1, label_nopage_tlbm); 2067 build_pte_modifiable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbm);
1974 build_tlb_probe_entry(&p); 2068 build_tlb_probe_entry(&p);
1975 uasm_i_ori(&p, K0, K0, 2069 uasm_i_ori(&p, wr.r1, wr.r1,
1976 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY); 2070 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY);
1977 build_huge_handler_tail(&p, &r, &l, K0, K1); 2071 build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2);
1978#endif 2072#endif
1979 2073
1980 uasm_l_nopage_tlbm(&l, p); 2074 uasm_l_nopage_tlbm(&l, p);
2075 build_restore_work_registers(&p);
1981 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); 2076 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
1982 uasm_i_nop(&p); 2077 uasm_i_nop(&p);
1983 2078
@@ -2036,6 +2131,7 @@ void __cpuinit build_tlb_refill_handler(void)
2036 2131
2037 default: 2132 default:
2038 if (!run_once) { 2133 if (!run_once) {
2134 scratch_reg = allocate_kscratch();
2039#ifdef CONFIG_MIPS_PGD_C0_CONTEXT 2135#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
2040 build_r4000_setup_pgd(); 2136 build_r4000_setup_pgd();
2041#endif 2137#endif
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index 31180c321a1a..4b988b9a30d5 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -28,6 +28,7 @@
28#include <asm/io.h> 28#include <asm/io.h>
29#include <asm/system.h> 29#include <asm/system.h>
30#include <asm/cacheflush.h> 30#include <asm/cacheflush.h>
31#include <asm/smp-ops.h>
31#include <asm/traps.h> 32#include <asm/traps.h>
32 33
33#include <asm/gcmpregs.h> 34#include <asm/gcmpregs.h>
@@ -358,15 +359,14 @@ void __init prom_init(void)
358#ifdef CONFIG_SERIAL_8250_CONSOLE 359#ifdef CONFIG_SERIAL_8250_CONSOLE
359 console_config(); 360 console_config();
360#endif 361#endif
361#ifdef CONFIG_MIPS_CMP
362 /* Early detection of CMP support */ 362 /* Early detection of CMP support */
363 if (gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ)) 363 if (gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ))
364 register_smp_ops(&cmp_smp_ops); 364 if (!register_cmp_smp_ops())
365 else 365 return;
366#endif 366
367#ifdef CONFIG_MIPS_MT_SMP 367 if (!register_vsmp_smp_ops())
368 register_smp_ops(&vsmp_smp_ops); 368 return;
369#endif 369
370#ifdef CONFIG_MIPS_MT_SMTC 370#ifdef CONFIG_MIPS_MT_SMTC
371 register_smp_ops(&msmtc_smp_ops); 371 register_smp_ops(&msmtc_smp_ops);
372#endif 372#endif
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index 49a38b09a488..1efc8c394486 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -152,7 +152,7 @@ int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
152 * runtime code can anyway deal with the null set 152 * runtime code can anyway deal with the null set
153 */ 153 */
154 printk(KERN_WARNING 154 printk(KERN_WARNING
155 "IRQ affinity leaves no legal CPU for IRQ %d\n", irq); 155 "IRQ affinity leaves no legal CPU for IRQ %d\n", d->irq);
156 156
157 /* Do any generic SMTC IRQ affinity setup */ 157 /* Do any generic SMTC IRQ affinity setup */
158 smtc_set_irq_affinity(d->irq, tmask); 158 smtc_set_irq_affinity(d->irq, tmask);
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index 1620b83cd13e..f8ee945ee411 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -19,6 +19,7 @@
19 */ 19 */
20 20
21#include <linux/types.h> 21#include <linux/types.h>
22#include <linux/i8253.h>
22#include <linux/init.h> 23#include <linux/init.h>
23#include <linux/kernel_stat.h> 24#include <linux/kernel_stat.h>
24#include <linux/sched.h> 25#include <linux/sched.h>
@@ -31,7 +32,6 @@
31#include <asm/mipsregs.h> 32#include <asm/mipsregs.h>
32#include <asm/mipsmtregs.h> 33#include <asm/mipsmtregs.h>
33#include <asm/hardirq.h> 34#include <asm/hardirq.h>
34#include <asm/i8253.h>
35#include <asm/irq.h> 35#include <asm/irq.h>
36#include <asm/div64.h> 36#include <asm/div64.h>
37#include <asm/cpu.h> 37#include <asm/cpu.h>
diff --git a/arch/mips/netlogic/Platform b/arch/mips/netlogic/Platform
new file mode 100644
index 000000000000..f87c1640abb5
--- /dev/null
+++ b/arch/mips/netlogic/Platform
@@ -0,0 +1,11 @@
1#
2# NETLOGIC includes
3#
4cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/mach-netlogic
5cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/netlogic
6
7#
8# NETLOGIC XLR/XLS SoC, Simulator and boards
9#
10core-$(CONFIG_NLM_XLR) += arch/mips/netlogic/xlr/
11load-$(CONFIG_NLM_XLR_BOARD) += 0xffffffff84000000
diff --git a/arch/mips/netlogic/xlr/irq.c b/arch/mips/netlogic/xlr/irq.c
index 1446d58e364c..521bb7377eb0 100644
--- a/arch/mips/netlogic/xlr/irq.c
+++ b/arch/mips/netlogic/xlr/irq.c
@@ -209,7 +209,7 @@ void __init init_xlr_irqs(void)
209 irq_set_chip_and_handler(i, &xlr_pic, handle_level_irq); 209 irq_set_chip_and_handler(i, &xlr_pic, handle_level_irq);
210 else 210 else
211 irq_set_chip_and_handler(i, &nlm_cpu_intr, 211 irq_set_chip_and_handler(i, &nlm_cpu_intr,
212 handle_level_irq); 212 handle_percpu_irq);
213 } 213 }
214#ifdef CONFIG_SMP 214#ifdef CONFIG_SMP
215 irq_set_chip_and_handler(IRQ_IPI_SMP_FUNCTION, &nlm_cpu_intr, 215 irq_set_chip_and_handler(IRQ_IPI_SMP_FUNCTION, &nlm_cpu_intr,
diff --git a/arch/mips/netlogic/xlr/smp.c b/arch/mips/netlogic/xlr/smp.c
index b495a7f1433b..d842bce5c940 100644
--- a/arch/mips/netlogic/xlr/smp.c
+++ b/arch/mips/netlogic/xlr/smp.c
@@ -87,17 +87,7 @@ void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc)
87/* IRQ_IPI_SMP_RESCHEDULE handler */ 87/* IRQ_IPI_SMP_RESCHEDULE handler */
88void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc) 88void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc)
89{ 89{
90 set_need_resched(); 90 scheduler_ipi();
91}
92
93void nlm_common_ipi_handler(int irq, struct pt_regs *regs)
94{
95 if (irq == IRQ_IPI_SMP_FUNCTION) {
96 smp_call_function_interrupt();
97 } else {
98 /* Announce that we are for reschduling */
99 set_need_resched();
100 }
101} 91}
102 92
103/* 93/*
@@ -122,6 +112,7 @@ void nlm_smp_finish(void)
122#ifdef notyet 112#ifdef notyet
123 nlm_common_msgring_cpu_init(); 113 nlm_common_msgring_cpu_init();
124#endif 114#endif
115 local_irq_enable();
125} 116}
126 117
127void nlm_cpus_done(void) 118void nlm_cpus_done(void)
diff --git a/arch/mips/nxp/pnx8550/common/setup.c b/arch/mips/nxp/pnx8550/common/setup.c
index 64246c9c875c..71adac323323 100644
--- a/arch/mips/nxp/pnx8550/common/setup.c
+++ b/arch/mips/nxp/pnx8550/common/setup.c
@@ -140,6 +140,4 @@ void __init plat_mem_setup(void)
140 PNX8XXX_UART_LCR_8BIT; 140 PNX8XXX_UART_LCR_8BIT;
141 ip3106_baud(UART_BASE, pnx8550_console_port) = 5; 141 ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
142 } 142 }
143
144 return;
145} 143}
diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile
index 4b9d7044e26c..29f2f13eb31c 100644
--- a/arch/mips/oprofile/Makefile
+++ b/arch/mips/oprofile/Makefile
@@ -8,7 +8,7 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
8 oprofilefs.o oprofile_stats.o \ 8 oprofilefs.o oprofile_stats.o \
9 timer_int.o ) 9 timer_int.o )
10 10
11oprofile-y := $(DRIVER_OBJS) common.o 11oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
12 12
13oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o 13oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o
14oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o 14oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o
diff --git a/arch/mips/oprofile/backtrace.c b/arch/mips/oprofile/backtrace.c
new file mode 100644
index 000000000000..6854ed5097d2
--- /dev/null
+++ b/arch/mips/oprofile/backtrace.c
@@ -0,0 +1,175 @@
1#include <linux/oprofile.h>
2#include <linux/sched.h>
3#include <linux/mm.h>
4#include <linux/uaccess.h>
5#include <asm/ptrace.h>
6#include <asm/stacktrace.h>
7#include <linux/stacktrace.h>
8#include <linux/kernel.h>
9#include <asm/sections.h>
10#include <asm/inst.h>
11
12struct stackframe {
13 unsigned long sp;
14 unsigned long pc;
15 unsigned long ra;
16};
17
18static inline int get_mem(unsigned long addr, unsigned long *result)
19{
20 unsigned long *address = (unsigned long *) addr;
21 if (!access_ok(VERIFY_READ, addr, sizeof(unsigned long)))
22 return -1;
23 if (__copy_from_user_inatomic(result, address, sizeof(unsigned long)))
24 return -3;
25 return 0;
26}
27
28/*
29 * These two instruction helpers were taken from process.c
30 */
31static inline int is_ra_save_ins(union mips_instruction *ip)
32{
33 /* sw / sd $ra, offset($sp) */
34 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op)
35 && ip->i_format.rs == 29 && ip->i_format.rt == 31;
36}
37
38static inline int is_sp_move_ins(union mips_instruction *ip)
39{
40 /* addiu/daddiu sp,sp,-imm */
41 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
42 return 0;
43 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
44 return 1;
45 return 0;
46}
47
48/*
49 * Looks for specific instructions that mark the end of a function.
50 * This usually means we ran into the code area of the previous function.
51 */
52static inline int is_end_of_function_marker(union mips_instruction *ip)
53{
54 /* jr ra */
55 if (ip->r_format.func == jr_op && ip->r_format.rs == 31)
56 return 1;
57 /* lui gp */
58 if (ip->i_format.opcode == lui_op && ip->i_format.rt == 28)
59 return 1;
60 return 0;
61}
62
63/*
64 * TODO for userspace stack unwinding:
65 * - handle cases where the stack is adjusted inside a function
66 * (generally doesn't happen)
67 * - find optimal value for max_instr_check
68 * - try to find a way to handle leaf functions
69 */
70
71static inline int unwind_user_frame(struct stackframe *old_frame,
72 const unsigned int max_instr_check)
73{
74 struct stackframe new_frame = *old_frame;
75 off_t ra_offset = 0;
76 size_t stack_size = 0;
77 unsigned long addr;
78
79 if (old_frame->pc == 0 || old_frame->sp == 0 || old_frame->ra == 0)
80 return -9;
81
82 for (addr = new_frame.pc; (addr + max_instr_check > new_frame.pc)
83 && (!ra_offset || !stack_size); --addr) {
84 union mips_instruction ip;
85
86 if (get_mem(addr, (unsigned long *) &ip))
87 return -11;
88
89 if (is_sp_move_ins(&ip)) {
90 int stack_adjustment = ip.i_format.simmediate;
91 if (stack_adjustment > 0)
92 /* This marks the end of the previous function,
93 which means we overran. */
94 break;
95 stack_size = (unsigned) stack_adjustment;
96 } else if (is_ra_save_ins(&ip)) {
97 int ra_slot = ip.i_format.simmediate;
98 if (ra_slot < 0)
99 /* This shouldn't happen. */
100 break;
101 ra_offset = ra_slot;
102 } else if (is_end_of_function_marker(&ip))
103 break;
104 }
105
106 if (!ra_offset || !stack_size)
107 return -1;
108
109 if (ra_offset) {
110 new_frame.ra = old_frame->sp + ra_offset;
111 if (get_mem(new_frame.ra, &(new_frame.ra)))
112 return -13;
113 }
114
115 if (stack_size) {
116 new_frame.sp = old_frame->sp + stack_size;
117 if (get_mem(new_frame.sp, &(new_frame.sp)))
118 return -14;
119 }
120
121 if (new_frame.sp > old_frame->sp)
122 return -2;
123
124 new_frame.pc = old_frame->ra;
125 *old_frame = new_frame;
126
127 return 0;
128}
129
130static inline void do_user_backtrace(unsigned long low_addr,
131 struct stackframe *frame,
132 unsigned int depth)
133{
134 const unsigned int max_instr_check = 512;
135 const unsigned long high_addr = low_addr + THREAD_SIZE;
136
137 while (depth-- && !unwind_user_frame(frame, max_instr_check)) {
138 oprofile_add_trace(frame->ra);
139 if (frame->sp < low_addr || frame->sp > high_addr)
140 break;
141 }
142}
143
144#ifndef CONFIG_KALLSYMS
145static inline void do_kernel_backtrace(unsigned long low_addr,
146 struct stackframe *frame,
147 unsigned int depth) { }
148#else
149static inline void do_kernel_backtrace(unsigned long low_addr,
150 struct stackframe *frame,
151 unsigned int depth)
152{
153 while (depth-- && frame->pc) {
154 frame->pc = unwind_stack_by_address(low_addr,
155 &(frame->sp),
156 frame->pc,
157 &(frame->ra));
158 oprofile_add_trace(frame->ra);
159 }
160}
161#endif
162
163void notrace op_mips_backtrace(struct pt_regs *const regs, unsigned int depth)
164{
165 struct stackframe frame = { .sp = regs->regs[29],
166 .pc = regs->cp0_epc,
167 .ra = regs->regs[31] };
168 const int userspace = user_mode(regs);
169 const unsigned long low_addr = ALIGN(frame.sp, THREAD_SIZE);
170
171 if (userspace)
172 do_user_backtrace(low_addr, &frame, depth);
173 else
174 do_kernel_backtrace(low_addr, &frame, depth);
175}
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index f9eb1aba6345..d1f2d4c52d42 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -115,6 +115,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
115 ops->start = op_mips_start; 115 ops->start = op_mips_start;
116 ops->stop = op_mips_stop; 116 ops->stop = op_mips_stop;
117 ops->cpu_type = lmodel->cpu_type; 117 ops->cpu_type = lmodel->cpu_type;
118 ops->backtrace = op_mips_backtrace;
118 119
119 printk(KERN_INFO "oprofile: using %s performance monitoring.\n", 120 printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
120 lmodel->cpu_type); 121 lmodel->cpu_type);
diff --git a/arch/mips/oprofile/op_impl.h b/arch/mips/oprofile/op_impl.h
index f04b54fb37d1..7c2da27ece04 100644
--- a/arch/mips/oprofile/op_impl.h
+++ b/arch/mips/oprofile/op_impl.h
@@ -36,4 +36,6 @@ struct op_mips_model {
36 unsigned char num_counters; 36 unsigned char num_counters;
37}; 37};
38 38
39void op_mips_backtrace(struct pt_regs * const regs, unsigned int depth);
40
39#endif 41#endif
diff --git a/arch/mips/pci/ops-nile4.c b/arch/mips/pci/ops-nile4.c
index b7f0fb0210f4..99929cf88419 100644
--- a/arch/mips/pci/ops-nile4.c
+++ b/arch/mips/pci/ops-nile4.c
@@ -4,7 +4,6 @@
4#include <asm/bootinfo.h> 4#include <asm/bootinfo.h>
5 5
6#include <asm/lasat/lasat.h> 6#include <asm/lasat/lasat.h>
7#include <asm/gt64120.h>
8#include <asm/nile4.h> 7#include <asm/nile4.h>
9 8
10#define PCI_ACCESS_READ 0 9#define PCI_ACCESS_READ 0
diff --git a/arch/mips/pci/pci-rc32434.c b/arch/mips/pci/pci-rc32434.c
index f31218e17d3c..764362ce5e40 100644
--- a/arch/mips/pci/pci-rc32434.c
+++ b/arch/mips/pci/pci-rc32434.c
@@ -215,7 +215,7 @@ static int __init rc32434_pci_init(void)
215 rc32434_pcibridge_init(); 215 rc32434_pcibridge_init();
216 216
217 io_map_base = ioremap(rc32434_res_pci_io1.start, 217 io_map_base = ioremap(rc32434_res_pci_io1.start,
218 rc32434_res_pci_io1.end - rc32434_res_pci_io1.start + 1); 218 resource_size(&rcrc32434_res_pci_io1));
219 219
220 if (!io_map_base) 220 if (!io_map_base)
221 return -ENOMEM; 221 return -ENOMEM;
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
index 56525711f8b7..444b8d8004ad 100644
--- a/arch/mips/pci/pci-vr41xx.c
+++ b/arch/mips/pci/pci-vr41xx.c
@@ -305,7 +305,7 @@ static int __init vr41xx_pciu_init(void)
305 struct resource *res = vr41xx_pci_controller.io_resource; 305 struct resource *res = vr41xx_pci_controller.io_resource;
306 master = setup->master_io; 306 master = setup->master_io;
307 io_map_base = ioremap(master->bus_base_address, 307 io_map_base = ioremap(master->bus_base_address,
308 res->end - res->start + 1); 308 resource_size(res));
309 if (!io_map_base) 309 if (!io_map_base)
310 return -EBUSY; 310 return -EBUSY;
311 311
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c
index 2413ea67877e..0abfbe04ffc9 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c
@@ -228,13 +228,11 @@ void __init prom_init(void)
228 */ 228 */
229 msp_serial_setup(); 229 msp_serial_setup();
230 230
231#ifdef CONFIG_MIPS_MT_SMP 231 if (register_vsmp_smp_ops()) {
232 register_smp_ops(&vsmp_smp_ops);
233#endif
234
235#ifdef CONFIG_MIPS_MT_SMTC 232#ifdef CONFIG_MIPS_MT_SMTC
236 register_smp_ops(&msp_smtc_smp_ops); 233 register_smp_ops(&msp_smtc_smp_ops);
237#endif 234#endif
235 }
238 236
239#ifdef CONFIG_PMCTWILED 237#ifdef CONFIG_PMCTWILED
240 /* 238 /*
diff --git a/arch/mips/pnx8550/common/setup.c b/arch/mips/pnx8550/common/setup.c
index 43cb3945fdbf..fccd6b0c6d3f 100644
--- a/arch/mips/pnx8550/common/setup.c
+++ b/arch/mips/pnx8550/common/setup.c
@@ -139,6 +139,4 @@ void __init plat_mem_setup(void)
139 PNX8XXX_UART_LCR_8BIT; 139 PNX8XXX_UART_LCR_8BIT;
140 ip3106_baud(UART_BASE, pnx8550_console_port) = 5; 140 ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
141 } 141 }
142
143 return;
144} 142}
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index e56fa61b3991..bce1872249ba 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -394,23 +394,21 @@ void __init platform_alloc_bootmem(void)
394 394
395 /* Loop through looking for resources that want a particular address */ 395 /* Loop through looking for resources that want a particular address */
396 for (i = 0; gp_resources[i].flags != 0; i++) { 396 for (i = 0; gp_resources[i].flags != 0; i++) {
397 int size = gp_resources[i].end - gp_resources[i].start + 1; 397 int size = resource_size(&gp_resources[i]);
398 if ((gp_resources[i].start != 0) && 398 if ((gp_resources[i].start != 0) &&
399 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) { 399 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
400 reserve_bootmem(dma_to_phys(gp_resources[i].start), 400 reserve_bootmem(dma_to_phys(gp_resources[i].start),
401 size, 0); 401 size, 0);
402 total += gp_resources[i].end - 402 total += resource_size(&gp_resources[i]);
403 gp_resources[i].start + 1;
404 pr_info("reserve resource %s at %08x (%u bytes)\n", 403 pr_info("reserve resource %s at %08x (%u bytes)\n",
405 gp_resources[i].name, gp_resources[i].start, 404 gp_resources[i].name, gp_resources[i].start,
406 gp_resources[i].end - 405 resource_size(&gp_resources[i]));
407 gp_resources[i].start + 1);
408 } 406 }
409 } 407 }
410 408
411 /* Loop through assigning addresses for those that are left */ 409 /* Loop through assigning addresses for those that are left */
412 for (i = 0; gp_resources[i].flags != 0; i++) { 410 for (i = 0; gp_resources[i].flags != 0; i++) {
413 int size = gp_resources[i].end - gp_resources[i].start + 1; 411 int size = resource_size(&gp_resources[i]);
414 if ((gp_resources[i].start == 0) && 412 if ((gp_resources[i].start == 0) &&
415 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) { 413 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
416 void *mem = alloc_bootmem_pages(size); 414 void *mem = alloc_bootmem_pages(size);
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 041fc1afc3f4..a969eb826634 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -251,28 +251,22 @@ static struct platform_device *rb532_devs[] = {
251 251
252static void __init parse_mac_addr(char *macstr) 252static void __init parse_mac_addr(char *macstr)
253{ 253{
254 int i, j; 254 int i, h, l;
255 unsigned char result, value;
256 255
257 for (i = 0; i < 6; i++) { 256 for (i = 0; i < 6; i++) {
258 result = 0;
259
260 if (i != 5 && *(macstr + 2) != ':') 257 if (i != 5 && *(macstr + 2) != ':')
261 return; 258 return;
262 259
263 for (j = 0; j < 2; j++) { 260 h = hex_to_bin(*macstr++);
264 if (isxdigit(*macstr) 261 if (h == -1)
265 && (value = 262 return;
266 isdigit(*macstr) ? *macstr - 263
267 '0' : toupper(*macstr) - 'A' + 10) < 16) { 264 l = hex_to_bin(*macstr++);
268 result = result * 16 + value; 265 if (l == -1)
269 macstr++; 266 return;
270 } else
271 return;
272 }
273 267
274 macstr++; 268 macstr++;
275 korina_dev0_data.mac[i] = result; 269 korina_dev0_data.mac[i] = (h << 4) + l;
276 } 270 }
277} 271}
278 272
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 1a94c9894188..607192449335 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -10,6 +10,7 @@
10 * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org) 10 * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org)
11 */ 11 */
12#include <linux/bcd.h> 12#include <linux/bcd.h>
13#include <linux/i8253.h>
13#include <linux/init.h> 14#include <linux/init.h>
14#include <linux/irq.h> 15#include <linux/irq.h>
15#include <linux/kernel.h> 16#include <linux/kernel.h>
@@ -20,7 +21,6 @@
20 21
21#include <asm/cpu.h> 22#include <asm/cpu.h>
22#include <asm/mipsregs.h> 23#include <asm/mipsregs.h>
23#include <asm/i8253.h>
24#include <asm/io.h> 24#include <asm/io.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26#include <asm/time.h> 26#include <asm/time.h>
diff --git a/arch/mips/sgi-ip27/ip27-nmi.c b/arch/mips/sgi-ip27/ip27-nmi.c
index bc4fa8dd67f3..005c29ed419a 100644
--- a/arch/mips/sgi-ip27/ip27-nmi.c
+++ b/arch/mips/sgi-ip27/ip27-nmi.c
@@ -3,7 +3,7 @@
3#include <linux/nodemask.h> 3#include <linux/nodemask.h>
4#include <linux/spinlock.h> 4#include <linux/spinlock.h>
5#include <linux/smp.h> 5#include <linux/smp.h>
6#include <asm/atomic.h> 6#include <linux/atomic.h>
7#include <asm/sn/types.h> 7#include <asm/sn/types.h>
8#include <asm/sn/addrs.h> 8#include <asm/sn/addrs.h>
9#include <asm/sn/nmi.h> 9#include <asm/sn/nmi.h>
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index be4460a5f6a8..76ee045e2ce4 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -123,6 +123,13 @@ static int sb1250_set_affinity(struct irq_data *d, const struct cpumask *mask,
123} 123}
124#endif 124#endif
125 125
126static void disable_sb1250_irq(struct irq_data *d)
127{
128 unsigned int irq = d->irq;
129
130 sb1250_mask_irq(sb1250_irq_owner[irq], irq);
131}
132
126static void enable_sb1250_irq(struct irq_data *d) 133static void enable_sb1250_irq(struct irq_data *d)
127{ 134{
128 unsigned int irq = d->irq; 135 unsigned int irq = d->irq;
@@ -180,6 +187,7 @@ static struct irq_chip sb1250_irq_type = {
180 .name = "SB1250-IMR", 187 .name = "SB1250-IMR",
181 .irq_mask_ack = ack_sb1250_irq, 188 .irq_mask_ack = ack_sb1250_irq,
182 .irq_unmask = enable_sb1250_irq, 189 .irq_unmask = enable_sb1250_irq,
190 .irq_mask = disable_sb1250_irq,
183#ifdef CONFIG_SMP 191#ifdef CONFIG_SMP
184 .irq_set_affinity = sb1250_set_affinity 192 .irq_set_affinity = sb1250_set_affinity
185#endif 193#endif
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 0904d4d30cb3..ec0be14996a4 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -1,11 +1,11 @@
1#include <linux/types.h> 1#include <linux/types.h>
2#include <linux/i8253.h>
2#include <linux/interrupt.h> 3#include <linux/interrupt.h>
3#include <linux/irq.h> 4#include <linux/irq.h>
4#include <linux/smp.h> 5#include <linux/smp.h>
5#include <linux/time.h> 6#include <linux/time.h>
6#include <linux/clockchips.h> 7#include <linux/clockchips.h>
7 8
8#include <asm/i8253.h>
9#include <asm/sni.h> 9#include <asm/sni.h>
10#include <asm/time.h> 10#include <asm/time.h>
11#include <asm-generic/rtc.h> 11#include <asm-generic/rtc.h>
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-07 06:32:47 -0500