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authorRoel Kluin <roel.kluin@gmail.com>2009-09-18 15:50:11 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-09-30 15:47:01 -0400
commit971842677c5a6c1dd15d9a80b67bf0085686e574 (patch)
tree748000b70d862e3f6783b3894db6e7a8cbb03594 /arch/mips
parentc2e32149074501fc12f6e05f85812e07148a2276 (diff)
MIPS: MSP71xx: request_irq() failure ignored in msp_pcibios_config_access()
Produce an error if request_irq() fails. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Cc: "Ithamar R. Adema" <ithamar.adema@team-embedded.nl> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/pci/ops-pmcmsp.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c
index 109c95ca698b..32548b5d68d6 100644
--- a/arch/mips/pci/ops-pmcmsp.c
+++ b/arch/mips/pci/ops-pmcmsp.c
@@ -385,6 +385,7 @@ int msp_pcibios_config_access(unsigned char access_type,
385 unsigned long intr; 385 unsigned long intr;
386 unsigned long value; 386 unsigned long value;
387 static char pciirqflag; 387 static char pciirqflag;
388 int ret;
388#if defined(CONFIG_PMC_MSP7120_GW) || defined(CONFIG_PMC_MSP7120_EVAL) 389#if defined(CONFIG_PMC_MSP7120_GW) || defined(CONFIG_PMC_MSP7120_EVAL)
389 unsigned int vpe_status; 390 unsigned int vpe_status;
390#endif 391#endif
@@ -402,11 +403,13 @@ int msp_pcibios_config_access(unsigned char access_type,
402 * allocation assigns an interrupt handler to the interrupt. 403 * allocation assigns an interrupt handler to the interrupt.
403 */ 404 */
404 if (pciirqflag == 0) { 405 if (pciirqflag == 0) {
405 request_irq(MSP_INT_PCI,/* Hardcoded internal MSP7120 wiring */ 406 ret = request_irq(MSP_INT_PCI,/* Hardcoded internal MSP7120 wiring */
406 bpci_interrupt, 407 bpci_interrupt,
407 IRQF_SHARED | IRQF_DISABLED, 408 IRQF_SHARED | IRQF_DISABLED,
408 "PMC MSP PCI Host", 409 "PMC MSP PCI Host",
409 preg); 410 preg);
411 if (ret != 0)
412 return ret;
410 pciirqflag = ~0; 413 pciirqflag = ~0;
411 } 414 }
412 415