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authorFlorian Fainelli <florian@openwrt.org>2013-04-09 08:29:26 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-04-09 19:57:44 -0400
commit9296d94d83649e1c2f25c87dc4ead9c2ab073305 (patch)
tree8dbba6b424cfb2b0e11269057be871f14aa269f1 /arch/mips
parent25e11ec4fe5271c4895265ecbb69531e6b0c0dd5 (diff)
USB: remove USB_EHCI_BIG_ENDIAN_{DESC,MMIO} depends on architecture symbol
Just like the OHCI counter part we just can remove the architecture specific symbols which prevent these configuration symbols from being selected by platforms/architectures requiring it. The original implementation did not scale at all since it required each and every single architecture to be added for these configuration symbols to be selected. Now it is up to the EHCI driver and/or platform to select these configuration symbols accordingly. Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 51244bf97271..3a7b3954ce1b 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -404,6 +404,8 @@ config PMC_MSP
404 select IRQ_CPU 404 select IRQ_CPU
405 select SERIAL_8250 405 select SERIAL_8250
406 select SERIAL_8250_CONSOLE 406 select SERIAL_8250_CONSOLE
407 select USB_EHCI_BIG_ENDIAN_MMIO
408 select USB_EHCI_BIG_ENDIAN_DESC
407 help 409 help
408 This adds support for the PMC-Sierra family of Multi-Service 410 This adds support for the PMC-Sierra family of Multi-Service
409 Processor System-On-A-Chips. These parts include a number 411 Processor System-On-A-Chips. These parts include a number
@@ -1433,6 +1435,7 @@ config CPU_CAVIUM_OCTEON
1433 select CPU_SUPPORTS_HUGEPAGES 1435 select CPU_SUPPORTS_HUGEPAGES
1434 select LIBFDT 1436 select LIBFDT
1435 select USE_OF 1437 select USE_OF
1438 select USB_EHCI_BIG_ENDIAN_MMIO
1436 help 1439 help
1437 The Cavium Octeon processor is a highly integrated chip containing 1440 The Cavium Octeon processor is a highly integrated chip containing
1438 many ethernet hardware widgets for networking tasks. The processor 1441 many ethernet hardware widgets for networking tasks. The processor