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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-05-15 12:26:03 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-06-19 12:39:18 -0400
commiteae89076e696f51762d81d6e2538c3beb59fa7bd (patch)
tree7aab0972d6786721eb6c9b01d77a1b5f13263c49 /arch/mips
parent5deee2dbf495b2693629f7e8f846483432096278 (diff)
[MIPS] Unify mips_fpu_soft_struct and mips_fpu_hard_structs.
The struct mips_fpu_soft_struct and mips_fpu_hard_struct are completely same now and the kernel fpu emulator assumes that. This patch unifies them to mips_fpu_struct and get rid of mips_fpu_union. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/asm-offsets.c66
-rw-r--r--arch/mips/kernel/branch.c2
-rw-r--r--arch/mips/kernel/irixsig.c2
-rw-r--r--arch/mips/kernel/ptrace.c26
-rw-r--r--arch/mips/kernel/ptrace32.c16
-rw-r--r--arch/mips/kernel/traps.c9
-rw-r--r--arch/mips/math-emu/cp1emu.c15
-rw-r--r--arch/mips/math-emu/ieee754.h2
-rw-r--r--arch/mips/math-emu/kernel_linkage.c24
9 files changed, 70 insertions, 92 deletions
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 0facfaf4e950..f1bb6a2dc5fc 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -141,72 +141,72 @@ void output_thread_defines(void)
141void output_thread_fpu_defines(void) 141void output_thread_fpu_defines(void)
142{ 142{
143 offset("#define THREAD_FPR0 ", 143 offset("#define THREAD_FPR0 ",
144 struct task_struct, thread.fpu.hard.fpr[0]); 144 struct task_struct, thread.fpu.fpr[0]);
145 offset("#define THREAD_FPR1 ", 145 offset("#define THREAD_FPR1 ",
146 struct task_struct, thread.fpu.hard.fpr[1]); 146 struct task_struct, thread.fpu.fpr[1]);
147 offset("#define THREAD_FPR2 ", 147 offset("#define THREAD_FPR2 ",
148 struct task_struct, thread.fpu.hard.fpr[2]); 148 struct task_struct, thread.fpu.fpr[2]);
149 offset("#define THREAD_FPR3 ", 149 offset("#define THREAD_FPR3 ",
150 struct task_struct, thread.fpu.hard.fpr[3]); 150 struct task_struct, thread.fpu.fpr[3]);
151 offset("#define THREAD_FPR4 ", 151 offset("#define THREAD_FPR4 ",
152 struct task_struct, thread.fpu.hard.fpr[4]); 152 struct task_struct, thread.fpu.fpr[4]);
153 offset("#define THREAD_FPR5 ", 153 offset("#define THREAD_FPR5 ",
154 struct task_struct, thread.fpu.hard.fpr[5]); 154 struct task_struct, thread.fpu.fpr[5]);
155 offset("#define THREAD_FPR6 ", 155 offset("#define THREAD_FPR6 ",
156 struct task_struct, thread.fpu.hard.fpr[6]); 156 struct task_struct, thread.fpu.fpr[6]);
157 offset("#define THREAD_FPR7 ", 157 offset("#define THREAD_FPR7 ",
158 struct task_struct, thread.fpu.hard.fpr[7]); 158 struct task_struct, thread.fpu.fpr[7]);
159 offset("#define THREAD_FPR8 ", 159 offset("#define THREAD_FPR8 ",
160 struct task_struct, thread.fpu.hard.fpr[8]); 160 struct task_struct, thread.fpu.fpr[8]);
161 offset("#define THREAD_FPR9 ", 161 offset("#define THREAD_FPR9 ",
162 struct task_struct, thread.fpu.hard.fpr[9]); 162 struct task_struct, thread.fpu.fpr[9]);
163 offset("#define THREAD_FPR10 ", 163 offset("#define THREAD_FPR10 ",
164 struct task_struct, thread.fpu.hard.fpr[10]); 164 struct task_struct, thread.fpu.fpr[10]);
165 offset("#define THREAD_FPR11 ", 165 offset("#define THREAD_FPR11 ",
166 struct task_struct, thread.fpu.hard.fpr[11]); 166 struct task_struct, thread.fpu.fpr[11]);
167 offset("#define THREAD_FPR12 ", 167 offset("#define THREAD_FPR12 ",
168 struct task_struct, thread.fpu.hard.fpr[12]); 168 struct task_struct, thread.fpu.fpr[12]);
169 offset("#define THREAD_FPR13 ", 169 offset("#define THREAD_FPR13 ",
170 struct task_struct, thread.fpu.hard.fpr[13]); 170 struct task_struct, thread.fpu.fpr[13]);
171 offset("#define THREAD_FPR14 ", 171 offset("#define THREAD_FPR14 ",
172 struct task_struct, thread.fpu.hard.fpr[14]); 172 struct task_struct, thread.fpu.fpr[14]);
173 offset("#define THREAD_FPR15 ", 173 offset("#define THREAD_FPR15 ",
174 struct task_struct, thread.fpu.hard.fpr[15]); 174 struct task_struct, thread.fpu.fpr[15]);
175 offset("#define THREAD_FPR16 ", 175 offset("#define THREAD_FPR16 ",
176 struct task_struct, thread.fpu.hard.fpr[16]); 176 struct task_struct, thread.fpu.fpr[16]);
177 offset("#define THREAD_FPR17 ", 177 offset("#define THREAD_FPR17 ",
178 struct task_struct, thread.fpu.hard.fpr[17]); 178 struct task_struct, thread.fpu.fpr[17]);
179 offset("#define THREAD_FPR18 ", 179 offset("#define THREAD_FPR18 ",
180 struct task_struct, thread.fpu.hard.fpr[18]); 180 struct task_struct, thread.fpu.fpr[18]);
181 offset("#define THREAD_FPR19 ", 181 offset("#define THREAD_FPR19 ",
182 struct task_struct, thread.fpu.hard.fpr[19]); 182 struct task_struct, thread.fpu.fpr[19]);
183 offset("#define THREAD_FPR20 ", 183 offset("#define THREAD_FPR20 ",
184 struct task_struct, thread.fpu.hard.fpr[20]); 184 struct task_struct, thread.fpu.fpr[20]);
185 offset("#define THREAD_FPR21 ", 185 offset("#define THREAD_FPR21 ",
186 struct task_struct, thread.fpu.hard.fpr[21]); 186 struct task_struct, thread.fpu.fpr[21]);
187 offset("#define THREAD_FPR22 ", 187 offset("#define THREAD_FPR22 ",
188 struct task_struct, thread.fpu.hard.fpr[22]); 188 struct task_struct, thread.fpu.fpr[22]);
189 offset("#define THREAD_FPR23 ", 189 offset("#define THREAD_FPR23 ",
190 struct task_struct, thread.fpu.hard.fpr[23]); 190 struct task_struct, thread.fpu.fpr[23]);
191 offset("#define THREAD_FPR24 ", 191 offset("#define THREAD_FPR24 ",
192 struct task_struct, thread.fpu.hard.fpr[24]); 192 struct task_struct, thread.fpu.fpr[24]);
193 offset("#define THREAD_FPR25 ", 193 offset("#define THREAD_FPR25 ",
194 struct task_struct, thread.fpu.hard.fpr[25]); 194 struct task_struct, thread.fpu.fpr[25]);
195 offset("#define THREAD_FPR26 ", 195 offset("#define THREAD_FPR26 ",
196 struct task_struct, thread.fpu.hard.fpr[26]); 196 struct task_struct, thread.fpu.fpr[26]);
197 offset("#define THREAD_FPR27 ", 197 offset("#define THREAD_FPR27 ",
198 struct task_struct, thread.fpu.hard.fpr[27]); 198 struct task_struct, thread.fpu.fpr[27]);
199 offset("#define THREAD_FPR28 ", 199 offset("#define THREAD_FPR28 ",
200 struct task_struct, thread.fpu.hard.fpr[28]); 200 struct task_struct, thread.fpu.fpr[28]);
201 offset("#define THREAD_FPR29 ", 201 offset("#define THREAD_FPR29 ",
202 struct task_struct, thread.fpu.hard.fpr[29]); 202 struct task_struct, thread.fpu.fpr[29]);
203 offset("#define THREAD_FPR30 ", 203 offset("#define THREAD_FPR30 ",
204 struct task_struct, thread.fpu.hard.fpr[30]); 204 struct task_struct, thread.fpu.fpr[30]);
205 offset("#define THREAD_FPR31 ", 205 offset("#define THREAD_FPR31 ",
206 struct task_struct, thread.fpu.hard.fpr[31]); 206 struct task_struct, thread.fpu.fpr[31]);
207 207
208 offset("#define THREAD_FCR31 ", 208 offset("#define THREAD_FCR31 ",
209 struct task_struct, thread.fpu.hard.fcr31); 209 struct task_struct, thread.fpu.fcr31);
210 linefeed; 210 linefeed;
211} 211}
212 212
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index b6232d9033cb..76fd3f22c766 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -178,7 +178,7 @@ int __compute_return_epc(struct pt_regs *regs)
178 if (is_fpu_owner()) 178 if (is_fpu_owner())
179 asm volatile("cfc1\t%0,$31" : "=r" (fcr31)); 179 asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
180 else 180 else
181 fcr31 = current->thread.fpu.hard.fcr31; 181 fcr31 = current->thread.fpu.fcr31;
182 preempt_enable(); 182 preempt_enable();
183 183
184 bit = (insn.i_format.rt >> 2); 184 bit = (insn.i_format.rt >> 2);
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
index 8150f071f80a..a9bf6cc3abd1 100644
--- a/arch/mips/kernel/irixsig.c
+++ b/arch/mips/kernel/irixsig.c
@@ -260,7 +260,7 @@ irix_sigreturn(struct pt_regs *regs)
260 260
261 for(i = 0; i < 32; i++) 261 for(i = 0; i < 32; i++)
262 error |= __get_user(fregs[i], &context->fpregs[i]); 262 error |= __get_user(fregs[i], &context->fpregs[i]);
263 error |= __get_user(current->thread.fpu.hard.fcr31, &context->fpcsr); 263 error |= __get_user(current->thread.fpu.fcr31, &context->fpcsr);
264 } 264 }
265 265
266 /* XXX do sigstack crapola here... XXX */ 266 /* XXX do sigstack crapola here... XXX */
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 9b4733c12395..1d44025188d8 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -120,11 +120,11 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
120 __put_user ((__u64) -1, i + (__u64 __user *) data); 120 __put_user ((__u64) -1, i + (__u64 __user *) data);
121 } 121 }
122 122
123 __put_user (child->thread.fpu.fcr31, data + 64);
124
123 if (cpu_has_fpu) { 125 if (cpu_has_fpu) {
124 unsigned int flags, tmp; 126 unsigned int flags, tmp;
125 127
126 __put_user (child->thread.fpu.hard.fcr31, data + 64);
127
128 preempt_disable(); 128 preempt_disable();
129 if (cpu_has_mipsmt) { 129 if (cpu_has_mipsmt) {
130 unsigned int vpflags = dvpe(); 130 unsigned int vpflags = dvpe();
@@ -142,7 +142,6 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
142 preempt_enable(); 142 preempt_enable();
143 __put_user (tmp, data + 65); 143 __put_user (tmp, data + 65);
144 } else { 144 } else {
145 __put_user (child->thread.fpu.soft.fcr31, data + 64);
146 __put_user ((__u32) 0, data + 65); 145 __put_user ((__u32) 0, data + 65);
147 } 146 }
148 147
@@ -162,10 +161,7 @@ int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
162 for (i = 0; i < 32; i++) 161 for (i = 0; i < 32; i++)
163 __get_user (fregs[i], i + (__u64 __user *) data); 162 __get_user (fregs[i], i + (__u64 __user *) data);
164 163
165 if (cpu_has_fpu) 164 __get_user (child->thread.fpu.fcr31, data + 64);
166 __get_user (child->thread.fpu.hard.fcr31, data + 64);
167 else
168 __get_user (child->thread.fpu.soft.fcr31, data + 64);
169 165
170 /* FIR may not be written. */ 166 /* FIR may not be written. */
171 167
@@ -241,10 +237,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
241 tmp = regs->lo; 237 tmp = regs->lo;
242 break; 238 break;
243 case FPC_CSR: 239 case FPC_CSR:
244 if (cpu_has_fpu) 240 tmp = child->thread.fpu.fcr31;
245 tmp = child->thread.fpu.hard.fcr31;
246 else
247 tmp = child->thread.fpu.soft.fcr31;
248 break; 241 break;
249 case FPC_EIR: { /* implementation / version register */ 242 case FPC_EIR: { /* implementation / version register */
250 unsigned int flags; 243 unsigned int flags;
@@ -336,9 +329,9 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
336 329
337 if (!tsk_used_math(child)) { 330 if (!tsk_used_math(child)) {
338 /* FP not yet used */ 331 /* FP not yet used */
339 memset(&child->thread.fpu.hard, ~0, 332 memset(&child->thread.fpu, ~0,
340 sizeof(child->thread.fpu.hard)); 333 sizeof(child->thread.fpu));
341 child->thread.fpu.hard.fcr31 = 0; 334 child->thread.fpu.fcr31 = 0;
342 } 335 }
343#ifdef CONFIG_32BIT 336#ifdef CONFIG_32BIT
344 /* 337 /*
@@ -369,10 +362,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
369 regs->lo = data; 362 regs->lo = data;
370 break; 363 break;
371 case FPC_CSR: 364 case FPC_CSR:
372 if (cpu_has_fpu) 365 child->thread.fpu.fcr31 = data;
373 child->thread.fpu.hard.fcr31 = data;
374 else
375 child->thread.fpu.soft.fcr31 = data;
376 break; 366 break;
377 case DSP_BASE ... DSP_BASE + 5: { 367 case DSP_BASE ... DSP_BASE + 5: {
378 dspreg_t *dregs; 368 dspreg_t *dregs;
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 8704dc0496ea..f40ecd8be05f 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -166,10 +166,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
166 tmp = regs->lo; 166 tmp = regs->lo;
167 break; 167 break;
168 case FPC_CSR: 168 case FPC_CSR:
169 if (cpu_has_fpu) 169 tmp = child->thread.fpu.fcr31;
170 tmp = child->thread.fpu.hard.fcr31;
171 else
172 tmp = child->thread.fpu.soft.fcr31;
173 break; 170 break;
174 case FPC_EIR: { /* implementation / version register */ 171 case FPC_EIR: { /* implementation / version register */
175 unsigned int flags; 172 unsigned int flags;
@@ -288,9 +285,9 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
288 285
289 if (!tsk_used_math(child)) { 286 if (!tsk_used_math(child)) {
290 /* FP not yet used */ 287 /* FP not yet used */
291 memset(&child->thread.fpu.hard, ~0, 288 memset(&child->thread.fpu, ~0,
292 sizeof(child->thread.fpu.hard)); 289 sizeof(child->thread.fpu));
293 child->thread.fpu.hard.fcr31 = 0; 290 child->thread.fpu.fcr31 = 0;
294 } 291 }
295 /* 292 /*
296 * The odd registers are actually the high order bits 293 * The odd registers are actually the high order bits
@@ -318,10 +315,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
318 regs->lo = data; 315 regs->lo = data;
319 break; 316 break;
320 case FPC_CSR: 317 case FPC_CSR:
321 if (cpu_has_fpu) 318 child->thread.fpu.fcr31 = data;
322 child->thread.fpu.hard.fcr31 = data;
323 else
324 child->thread.fpu.soft.fcr31 = data;
325 break; 319 break;
326 case DSP_BASE ... DSP_BASE + 5: { 320 case DSP_BASE ... DSP_BASE + 5: {
327 dspreg_t *dregs; 321 dspreg_t *dregs;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index a7564b08eb4d..ad16eceb24dd 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -65,7 +65,7 @@ extern asmlinkage void handle_mcheck(void);
65extern asmlinkage void handle_reserved(void); 65extern asmlinkage void handle_reserved(void);
66 66
67extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, 67extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
68 struct mips_fpu_soft_struct *ctx); 68 struct mips_fpu_struct *ctx);
69 69
70void (*board_be_init)(void); 70void (*board_be_init)(void);
71int (*board_be_handler)(struct pt_regs *regs, int is_fixup); 71int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
@@ -600,8 +600,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
600 preempt_enable(); 600 preempt_enable();
601 601
602 /* Run the emulator */ 602 /* Run the emulator */
603 sig = fpu_emulator_cop1Handler (regs, 603 sig = fpu_emulator_cop1Handler (regs, &current->thread.fpu);
604 &current->thread.fpu.soft);
605 604
606 preempt_disable(); 605 preempt_disable();
607 606
@@ -610,7 +609,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
610 * We can't allow the emulated instruction to leave any of 609 * We can't allow the emulated instruction to leave any of
611 * the cause bit set in $fcr31. 610 * the cause bit set in $fcr31.
612 */ 611 */
613 current->thread.fpu.soft.fcr31 &= ~FPU_CSR_ALL_X; 612 current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
614 613
615 /* Restore the hardware register state */ 614 /* Restore the hardware register state */
616 restore_fp(current); 615 restore_fp(current);
@@ -755,7 +754,7 @@ asmlinkage void do_cpu(struct pt_regs *regs)
755 754
756 if (!cpu_has_fpu) { 755 if (!cpu_has_fpu) {
757 int sig = fpu_emulator_cop1Handler(regs, 756 int sig = fpu_emulator_cop1Handler(regs,
758 &current->thread.fpu.soft); 757 &current->thread.fpu);
759 if (sig) 758 if (sig)
760 force_sig(sig, current); 759 force_sig(sig, current);
761#ifdef CONFIG_MIPS_MT_FPAFF 760#ifdef CONFIG_MIPS_MT_FPAFF
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index aa5818a0d884..3f0d5d26d506 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -60,15 +60,15 @@
60 60
61/* Function which emulates a floating point instruction. */ 61/* Function which emulates a floating point instruction. */
62 62
63static int fpu_emu(struct pt_regs *, struct mips_fpu_soft_struct *, 63static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
64 mips_instruction); 64 mips_instruction);
65 65
66#if __mips >= 4 && __mips != 32 66#if __mips >= 4 && __mips != 32
67static int fpux_emu(struct pt_regs *, 67static int fpux_emu(struct pt_regs *,
68 struct mips_fpu_soft_struct *, mips_instruction); 68 struct mips_fpu_struct *, mips_instruction);
69#endif 69#endif
70 70
71/* Further private data for which no space exists in mips_fpu_soft_struct */ 71/* Further private data for which no space exists in mips_fpu_struct */
72 72
73struct mips_fpu_emulator_stats fpuemustats; 73struct mips_fpu_emulator_stats fpuemustats;
74 74
@@ -203,7 +203,7 @@ static int isBranchInstr(mips_instruction * i)
203 * Two instructions if the instruction is in a branch delay slot. 203 * Two instructions if the instruction is in a branch delay slot.
204 */ 204 */
205 205
206static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) 206static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
207{ 207{
208 mips_instruction ir; 208 mips_instruction ir;
209 void * emulpc, *contpc; 209 void * emulpc, *contpc;
@@ -595,7 +595,7 @@ DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub,);
595DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg); 595DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
596DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg); 596DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
597 597
598static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx, 598static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
599 mips_instruction ir) 599 mips_instruction ir)
600{ 600{
601 unsigned rcsr = 0; /* resulting csr */ 601 unsigned rcsr = 0; /* resulting csr */
@@ -759,7 +759,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
759/* 759/*
760 * Emulate a single COP1 arithmetic instruction. 760 * Emulate a single COP1 arithmetic instruction.
761 */ 761 */
762static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx, 762static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
763 mips_instruction ir) 763 mips_instruction ir)
764{ 764{
765 int rfmt; /* resulting format */ 765 int rfmt; /* resulting format */
@@ -1233,8 +1233,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1233 return 0; 1233 return 0;
1234} 1234}
1235 1235
1236int fpu_emulator_cop1Handler(struct pt_regs *xcp, 1236int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
1237 struct mips_fpu_soft_struct *ctx)
1238{ 1237{
1239 unsigned long oldepc, prevepc; 1238 unsigned long oldepc, prevepc;
1240 mips_instruction insn; 1239 mips_instruction insn;
diff --git a/arch/mips/math-emu/ieee754.h b/arch/mips/math-emu/ieee754.h
index 171f177c0f88..dd917332792c 100644
--- a/arch/mips/math-emu/ieee754.h
+++ b/arch/mips/math-emu/ieee754.h
@@ -329,7 +329,7 @@ struct _ieee754_csr {
329 unsigned pad0:7; 329 unsigned pad0:7;
330#endif 330#endif
331}; 331};
332#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.soft.fcr31)) 332#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.fcr31))
333 333
334static inline unsigned ieee754_getrm(void) 334static inline unsigned ieee754_getrm(void)
335{ 335{
diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c
index d187ab71c2ff..56ca0c6a7178 100644
--- a/arch/mips/math-emu/kernel_linkage.c
+++ b/arch/mips/math-emu/kernel_linkage.c
@@ -39,9 +39,9 @@ void fpu_emulator_init_fpu(void)
39 printk("Algorithmics/MIPS FPU Emulator v1.5\n"); 39 printk("Algorithmics/MIPS FPU Emulator v1.5\n");
40 } 40 }
41 41
42 current->thread.fpu.soft.fcr31 = 0; 42 current->thread.fpu.fcr31 = 0;
43 for (i = 0; i < 32; i++) { 43 for (i = 0; i < 32; i++) {
44 current->thread.fpu.soft.fpr[i] = SIGNALLING_NAN; 44 current->thread.fpu.fpr[i] = SIGNALLING_NAN;
45 } 45 }
46} 46}
47 47
@@ -59,10 +59,9 @@ int fpu_emulator_save_context(struct sigcontext *sc)
59 59
60 for (i = 0; i < 32; i++) { 60 for (i = 0; i < 32; i++) {
61 err |= 61 err |=
62 __put_user(current->thread.fpu.soft.fpr[i], 62 __put_user(current->thread.fpu.fpr[i], &sc->sc_fpregs[i]);
63 &sc->sc_fpregs[i]);
64 } 63 }
65 err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr); 64 err |= __put_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
66 65
67 return err; 66 return err;
68} 67}
@@ -74,10 +73,9 @@ int fpu_emulator_restore_context(struct sigcontext *sc)
74 73
75 for (i = 0; i < 32; i++) { 74 for (i = 0; i < 32; i++) {
76 err |= 75 err |=
77 __get_user(current->thread.fpu.soft.fpr[i], 76 __get_user(current->thread.fpu.fpr[i], &sc->sc_fpregs[i]);
78 &sc->sc_fpregs[i]);
79 } 77 }
80 err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr); 78 err |= __get_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
81 79
82 return err; 80 return err;
83} 81}
@@ -94,10 +92,9 @@ int fpu_emulator_save_context32(struct sigcontext32 *sc)
94 92
95 for (i = 0; i < 32; i+=2) { 93 for (i = 0; i < 32; i+=2) {
96 err |= 94 err |=
97 __put_user(current->thread.fpu.soft.fpr[i], 95 __put_user(current->thread.fpu.fpr[i], &sc->sc_fpregs[i]);
98 &sc->sc_fpregs[i]);
99 } 96 }
100 err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr); 97 err |= __put_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
101 98
102 return err; 99 return err;
103} 100}
@@ -109,10 +106,9 @@ int fpu_emulator_restore_context32(struct sigcontext32 *sc)
109 106
110 for (i = 0; i < 32; i+=2) { 107 for (i = 0; i < 32; i+=2) {
111 err |= 108 err |=
112 __get_user(current->thread.fpu.soft.fpr[i], 109 __get_user(current->thread.fpu.fpr[i], &sc->sc_fpregs[i]);
113 &sc->sc_fpregs[i]);
114 } 110 }
115 err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr); 111 err |= __get_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
116 112
117 return err; 113 return err;
118} 114}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-30 02:09:56 -0500