diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-02-06 11:53:15 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-06 11:53:15 -0500 |
commit | 130e2fb78305b148b15cd3b5129596844c5f5e4f (patch) | |
tree | 09ee69826322949a06768d6addc8b5b97981a882 /arch/mips | |
parent | 24d55728dc96d2cb8f49064e012559300eb97610 (diff) |
[MIPS] Kconfig: Provide sane NR_CPUS defaults for more configurations
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 35 |
1 files changed, 32 insertions, 3 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 21db07efd7a0..44a0224c32dd 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -575,6 +575,7 @@ config SGI_IP27 | |||
575 | select DMA_IP27 | 575 | select DMA_IP27 |
576 | select EARLY_PRINTK | 576 | select EARLY_PRINTK |
577 | select HW_HAS_PCI | 577 | select HW_HAS_PCI |
578 | select NR_CPUS_DEFAULT_64 | ||
578 | select PCI_DOMAINS | 579 | select PCI_DOMAINS |
579 | select SYS_HAS_CPU_R10000 | 580 | select SYS_HAS_CPU_R10000 |
580 | select SYS_SUPPORTS_64BIT_KERNEL | 581 | select SYS_SUPPORTS_64BIT_KERNEL |
@@ -612,6 +613,7 @@ config SIBYTE_BIGSUR | |||
612 | bool "Sibyte BCM91480B-BigSur" | 613 | bool "Sibyte BCM91480B-BigSur" |
613 | select BOOT_ELF32 | 614 | select BOOT_ELF32 |
614 | select DMA_COHERENT | 615 | select DMA_COHERENT |
616 | select NR_CPUS_DEFAULT_4 | ||
615 | select PCI_DOMAINS | 617 | select PCI_DOMAINS |
616 | select SIBYTE_BCM1x80 | 618 | select SIBYTE_BCM1x80 |
617 | select SWAP_IO_SPACE | 619 | select SWAP_IO_SPACE |
@@ -623,6 +625,7 @@ config SIBYTE_SWARM | |||
623 | bool "Sibyte BCM91250A-SWARM" | 625 | bool "Sibyte BCM91250A-SWARM" |
624 | select BOOT_ELF32 | 626 | select BOOT_ELF32 |
625 | select DMA_COHERENT | 627 | select DMA_COHERENT |
628 | select NR_CPUS_DEFAULT_2 | ||
626 | select SIBYTE_SB1250 | 629 | select SIBYTE_SB1250 |
627 | select SWAP_IO_SPACE | 630 | select SWAP_IO_SPACE |
628 | select SYS_HAS_CPU_SB1 | 631 | select SYS_HAS_CPU_SB1 |
@@ -635,6 +638,7 @@ config SIBYTE_SENTOSA | |||
635 | depends on EXPERIMENTAL | 638 | depends on EXPERIMENTAL |
636 | select BOOT_ELF32 | 639 | select BOOT_ELF32 |
637 | select DMA_COHERENT | 640 | select DMA_COHERENT |
641 | select NR_CPUS_DEFAULT_2 | ||
638 | select SIBYTE_SB1250 | 642 | select SIBYTE_SB1250 |
639 | select SWAP_IO_SPACE | 643 | select SWAP_IO_SPACE |
640 | select SYS_HAS_CPU_SB1 | 644 | select SYS_HAS_CPU_SB1 |
@@ -668,6 +672,7 @@ config SIBYTE_PTSWARM | |||
668 | depends on EXPERIMENTAL | 672 | depends on EXPERIMENTAL |
669 | select BOOT_ELF32 | 673 | select BOOT_ELF32 |
670 | select DMA_COHERENT | 674 | select DMA_COHERENT |
675 | select NR_CPUS_DEFAULT_2 | ||
671 | select SIBYTE_SB1250 | 676 | select SIBYTE_SB1250 |
672 | select SWAP_IO_SPACE | 677 | select SWAP_IO_SPACE |
673 | select SYS_HAS_CPU_SB1 | 678 | select SYS_HAS_CPU_SB1 |
@@ -680,6 +685,7 @@ config SIBYTE_LITTLESUR | |||
680 | depends on EXPERIMENTAL | 685 | depends on EXPERIMENTAL |
681 | select BOOT_ELF32 | 686 | select BOOT_ELF32 |
682 | select DMA_COHERENT | 687 | select DMA_COHERENT |
688 | select NR_CPUS_DEFAULT_2 | ||
683 | select SIBYTE_SB1250 | 689 | select SIBYTE_SB1250 |
684 | select SWAP_IO_SPACE | 690 | select SWAP_IO_SPACE |
685 | select SYS_HAS_CPU_SB1 | 691 | select SYS_HAS_CPU_SB1 |
@@ -1524,6 +1530,8 @@ config MIPS_MT_SMTC | |||
1524 | select CPU_MIPSR2_IRQ_VI | 1530 | select CPU_MIPSR2_IRQ_VI |
1525 | select CPU_MIPSR2_SRS | 1531 | select CPU_MIPSR2_SRS |
1526 | select MIPS_MT | 1532 | select MIPS_MT |
1533 | select NR_CPUS_DEFAULT_2 | ||
1534 | select NR_CPUS_DEFAULT_8 | ||
1527 | select SMP | 1535 | select SMP |
1528 | select SYS_SUPPORTS_SMP | 1536 | select SYS_SUPPORTS_SMP |
1529 | help | 1537 | help |
@@ -1739,13 +1747,34 @@ config SMP | |||
1739 | config SYS_SUPPORTS_SMP | 1747 | config SYS_SUPPORTS_SMP |
1740 | bool | 1748 | bool |
1741 | 1749 | ||
1750 | config NR_CPUS_DEFAULT_2 | ||
1751 | bool | ||
1752 | |||
1753 | config NR_CPUS_DEFAULT_4 | ||
1754 | bool | ||
1755 | |||
1756 | config NR_CPUS_DEFAULT_8 | ||
1757 | bool | ||
1758 | |||
1759 | config NR_CPUS_DEFAULT_16 | ||
1760 | bool | ||
1761 | |||
1762 | config NR_CPUS_DEFAULT_32 | ||
1763 | bool | ||
1764 | |||
1765 | config NR_CPUS_DEFAULT_64 | ||
1766 | bool | ||
1767 | |||
1742 | config NR_CPUS | 1768 | config NR_CPUS |
1743 | int "Maximum number of CPUs (2-64)" | 1769 | int "Maximum number of CPUs (2-64)" |
1744 | range 2 64 | 1770 | range 2 64 |
1745 | depends on SMP | 1771 | depends on SMP |
1746 | default "64" if SGI_IP27 | 1772 | default "2" if NR_CPUS_DEFAULT_2 |
1747 | default "2" | 1773 | default "4" if NR_CPUS_DEFAULT_4 |
1748 | default "8" if MIPS_MT_SMTC | 1774 | default "8" if NR_CPUS_DEFAULT_8 |
1775 | default "16" if NR_CPUS_DEFAULT_16 | ||
1776 | default "32" if NR_CPUS_DEFAULT_32 | ||
1777 | default "64" if NR_CPUS_DEFAULT_64 | ||
1749 | help | 1778 | help |
1750 | This allows you to specify the maximum number of CPUs which this | 1779 | This allows you to specify the maximum number of CPUs which this |
1751 | kernel will support. The maximum supported value is 32 for 32-bit | 1780 | kernel will support. The maximum supported value is 32 for 32-bit |