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authorThomas Gleixner <tglx@linutronix.de>2011-03-23 17:09:15 -0400
committerRalf Baechle <ralf@linux-mips.org>2011-03-25 13:45:20 -0400
commit0b888c7f3a0396cfe59116575a35cdcd166fd515 (patch)
treee29b182b20927b2fc2c1f77c181d4cb01fa6690e /arch/mips
parentd6d5d5c4afd4c8bb4c5e3753a2141e9c3a874629 (diff)
MIPS: SNI: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2206/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/sni/a20r.c23
-rw-r--r--arch/mips/sni/pcimt.c21
-rw-r--r--arch/mips/sni/pcit.c21
-rw-r--r--arch/mips/sni/rm200.c42
4 files changed, 33 insertions, 74 deletions
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index bbe7187879fa..72b94155778d 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -168,33 +168,22 @@ static u32 a20r_ack_hwint(void)
168 return status; 168 return status;
169} 169}
170 170
171static inline void unmask_a20r_irq(unsigned int irq) 171static inline void unmask_a20r_irq(struct irq_data *d)
172{ 172{
173 set_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE)); 173 set_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
174 irq_enable_hazard(); 174 irq_enable_hazard();
175} 175}
176 176
177static inline void mask_a20r_irq(unsigned int irq) 177static inline void mask_a20r_irq(struct irq_data *d)
178{ 178{
179 clear_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE)); 179 clear_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
180 irq_disable_hazard(); 180 irq_disable_hazard();
181} 181}
182 182
183static void end_a20r_irq(unsigned int irq)
184{
185 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
186 a20r_ack_hwint();
187 unmask_a20r_irq(irq);
188 }
189}
190
191static struct irq_chip a20r_irq_type = { 183static struct irq_chip a20r_irq_type = {
192 .name = "A20R", 184 .name = "A20R",
193 .ack = mask_a20r_irq, 185 .irq_mask = mask_a20r_irq,
194 .mask = mask_a20r_irq, 186 .irq_unmask = unmask_a20r_irq,
195 .mask_ack = mask_a20r_irq,
196 .unmask = unmask_a20r_irq,
197 .end = end_a20r_irq,
198}; 187};
199 188
200/* 189/*
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 8c92c73bc717..cfcc68abc5b2 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -194,33 +194,24 @@ static struct pci_controller sni_controller = {
194 .io_map_base = SNI_PORT_BASE 194 .io_map_base = SNI_PORT_BASE
195}; 195};
196 196
197static void enable_pcimt_irq(unsigned int irq) 197static void enable_pcimt_irq(struct irq_data *d)
198{ 198{
199 unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); 199 unsigned int mask = 1 << (d->irq - PCIMT_IRQ_INT2);
200 200
201 *(volatile u8 *) PCIMT_IRQSEL |= mask; 201 *(volatile u8 *) PCIMT_IRQSEL |= mask;
202} 202}
203 203
204void disable_pcimt_irq(unsigned int irq) 204void disable_pcimt_irq(struct irq_data *d)
205{ 205{
206 unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2)); 206 unsigned int mask = ~(1 << (d->irq - PCIMT_IRQ_INT2));
207 207
208 *(volatile u8 *) PCIMT_IRQSEL &= mask; 208 *(volatile u8 *) PCIMT_IRQSEL &= mask;
209} 209}
210 210
211static void end_pcimt_irq(unsigned int irq)
212{
213 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
214 enable_pcimt_irq(irq);
215}
216
217static struct irq_chip pcimt_irq_type = { 211static struct irq_chip pcimt_irq_type = {
218 .name = "PCIMT", 212 .name = "PCIMT",
219 .ack = disable_pcimt_irq, 213 .irq_mask = disable_pcimt_irq,
220 .mask = disable_pcimt_irq, 214 .irq_unmask = enable_pcimt_irq,
221 .mask_ack = disable_pcimt_irq,
222 .unmask = enable_pcimt_irq,
223 .end = end_pcimt_irq,
224}; 215};
225 216
226/* 217/*
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index dc9874553bec..0846e99a6efe 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -156,33 +156,24 @@ static struct pci_controller sni_pcit_controller = {
156 .io_map_base = SNI_PORT_BASE 156 .io_map_base = SNI_PORT_BASE
157}; 157};
158 158
159static void enable_pcit_irq(unsigned int irq) 159static void enable_pcit_irq(struct irq_data *d)
160{ 160{
161 u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24); 161 u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);
162 162
163 *(volatile u32 *)SNI_PCIT_INT_REG |= mask; 163 *(volatile u32 *)SNI_PCIT_INT_REG |= mask;
164} 164}
165 165
166void disable_pcit_irq(unsigned int irq) 166void disable_pcit_irq(struct irq_data *d)
167{ 167{
168 u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24); 168 u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);
169 169
170 *(volatile u32 *)SNI_PCIT_INT_REG &= ~mask; 170 *(volatile u32 *)SNI_PCIT_INT_REG &= ~mask;
171} 171}
172 172
173void end_pcit_irq(unsigned int irq)
174{
175 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
176 enable_pcit_irq(irq);
177}
178
179static struct irq_chip pcit_irq_type = { 173static struct irq_chip pcit_irq_type = {
180 .name = "PCIT", 174 .name = "PCIT",
181 .ack = disable_pcit_irq, 175 .irq_mask = disable_pcit_irq,
182 .mask = disable_pcit_irq, 176 .irq_unmask = enable_pcit_irq,
183 .mask_ack = disable_pcit_irq,
184 .unmask = enable_pcit_irq,
185 .end = end_pcit_irq,
186}; 177};
187 178
188static void pcit_hwint1(void) 179static void pcit_hwint1(void)
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 0e6f42c2bbc8..f05d8e593300 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -155,12 +155,11 @@ static __iomem u8 *rm200_pic_slave;
155#define cached_master_mask (rm200_cached_irq_mask) 155#define cached_master_mask (rm200_cached_irq_mask)
156#define cached_slave_mask (rm200_cached_irq_mask >> 8) 156#define cached_slave_mask (rm200_cached_irq_mask >> 8)
157 157
158static void sni_rm200_disable_8259A_irq(unsigned int irq) 158static void sni_rm200_disable_8259A_irq(struct irq_data *d)
159{ 159{
160 unsigned int mask; 160 unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
161 unsigned long flags; 161 unsigned long flags;
162 162
163 irq -= RM200_I8259A_IRQ_BASE;
164 mask = 1 << irq; 163 mask = 1 << irq;
165 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); 164 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
166 rm200_cached_irq_mask |= mask; 165 rm200_cached_irq_mask |= mask;
@@ -171,12 +170,11 @@ static void sni_rm200_disable_8259A_irq(unsigned int irq)
171 raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags); 170 raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags);
172} 171}
173 172
174static void sni_rm200_enable_8259A_irq(unsigned int irq) 173static void sni_rm200_enable_8259A_irq(struct irq_data *d)
175{ 174{
176 unsigned int mask; 175 unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
177 unsigned long flags; 176 unsigned long flags;
178 177
179 irq -= RM200_I8259A_IRQ_BASE;
180 mask = ~(1 << irq); 178 mask = ~(1 << irq);
181 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); 179 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
182 rm200_cached_irq_mask &= mask; 180 rm200_cached_irq_mask &= mask;
@@ -210,12 +208,11 @@ static inline int sni_rm200_i8259A_irq_real(unsigned int irq)
210 * first, _then_ send the EOI, and the order of EOI 208 * first, _then_ send the EOI, and the order of EOI
211 * to the two 8259s is important! 209 * to the two 8259s is important!
212 */ 210 */
213void sni_rm200_mask_and_ack_8259A(unsigned int irq) 211void sni_rm200_mask_and_ack_8259A(struct irq_data *d)
214{ 212{
215 unsigned int irqmask; 213 unsigned int irqmask, irq = d->irq - RM200_I8259A_IRQ_BASE;
216 unsigned long flags; 214 unsigned long flags;
217 215
218 irq -= RM200_I8259A_IRQ_BASE;
219 irqmask = 1 << irq; 216 irqmask = 1 << irq;
220 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); 217 raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
221 /* 218 /*
@@ -285,9 +282,9 @@ spurious_8259A_irq:
285 282
286static struct irq_chip sni_rm200_i8259A_chip = { 283static struct irq_chip sni_rm200_i8259A_chip = {
287 .name = "RM200-XT-PIC", 284 .name = "RM200-XT-PIC",
288 .mask = sni_rm200_disable_8259A_irq, 285 .irq_mask = sni_rm200_disable_8259A_irq,
289 .unmask = sni_rm200_enable_8259A_irq, 286 .irq_unmask = sni_rm200_enable_8259A_irq,
290 .mask_ack = sni_rm200_mask_and_ack_8259A, 287 .irq_mask_ack = sni_rm200_mask_and_ack_8259A,
291}; 288};
292 289
293/* 290/*
@@ -429,33 +426,24 @@ void __init sni_rm200_i8259_irqs(void)
429#define SNI_RM200_INT_START 24 426#define SNI_RM200_INT_START 24
430#define SNI_RM200_INT_END 28 427#define SNI_RM200_INT_END 28
431 428
432static void enable_rm200_irq(unsigned int irq) 429static void enable_rm200_irq(struct irq_data *d)
433{ 430{
434 unsigned int mask = 1 << (irq - SNI_RM200_INT_START); 431 unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);
435 432
436 *(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask; 433 *(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask;
437} 434}
438 435
439void disable_rm200_irq(unsigned int irq) 436void disable_rm200_irq(struct irq_data *d)
440{ 437{
441 unsigned int mask = 1 << (irq - SNI_RM200_INT_START); 438 unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);
442 439
443 *(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask; 440 *(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask;
444} 441}
445 442
446void end_rm200_irq(unsigned int irq)
447{
448 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
449 enable_rm200_irq(irq);
450}
451
452static struct irq_chip rm200_irq_type = { 443static struct irq_chip rm200_irq_type = {
453 .name = "RM200", 444 .name = "RM200",
454 .ack = disable_rm200_irq, 445 .irq_mask = disable_rm200_irq,
455 .mask = disable_rm200_irq, 446 .irq_unmask = enable_rm200_irq,
456 .mask_ack = disable_rm200_irq,
457 .unmask = enable_rm200_irq,
458 .end = end_rm200_irq,
459}; 447};
460 448
461static void sni_rm200_hwint(void) 449static void sni_rm200_hwint(void)