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authorRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:15 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:15 -0400
commit49a89efbbbcc178a39555c43bd59a7593c429664 (patch)
tree93ab78ec340d3f2fe23f9f853edd0bd62dcc64bb /arch/mips
parent10cc3529072d5415fb040018a8a99aa7a60190b6 (diff)
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/au1000/common/dbdma.c2
-rw-r--r--arch/mips/au1000/common/reset.c2
-rw-r--r--arch/mips/au1000/common/time.c2
-rw-r--r--arch/mips/au1000/db1x00/board_setup.c2
-rw-r--r--arch/mips/au1000/db1x00/init.c6
-rw-r--r--arch/mips/au1000/mtx-1/board_setup.c2
-rw-r--r--arch/mips/au1000/pb1000/board_setup.c2
-rw-r--r--arch/mips/au1000/pb1100/board_setup.c2
-rw-r--r--arch/mips/au1000/pb1200/board_setup.c8
-rw-r--r--arch/mips/au1000/pb1500/board_setup.c2
-rw-r--r--arch/mips/au1000/pb1550/board_setup.c2
-rw-r--r--arch/mips/au1000/xxs1500/board_setup.c2
-rw-r--r--arch/mips/basler/excite/excite_setup.c12
-rw-r--r--arch/mips/boot/addinitrd.c52
-rw-r--r--arch/mips/fw/arc/memory.c6
-rw-r--r--arch/mips/jazz/reset.c4
-rw-r--r--arch/mips/jazz/setup.c6
-rw-r--r--arch/mips/kernel/cpu-bugs64.c2
-rw-r--r--arch/mips/kernel/gdb-stub.c4
-rw-r--r--arch/mips/kernel/i8259.c2
-rw-r--r--arch/mips/kernel/irixelf.c32
-rw-r--r--arch/mips/kernel/irixinv.c42
-rw-r--r--arch/mips/kernel/irixioctl.c2
-rw-r--r--arch/mips/kernel/irq-msc01.c4
-rw-r--r--arch/mips/kernel/kspd.c10
-rw-r--r--arch/mips/kernel/linux32.c14
-rw-r--r--arch/mips/kernel/mips-mt.c2
-rw-r--r--arch/mips/kernel/process.c4
-rw-r--r--arch/mips/kernel/ptrace.c50
-rw-r--r--arch/mips/kernel/ptrace32.c16
-rw-r--r--arch/mips/kernel/signal32.c44
-rw-r--r--arch/mips/kernel/signal_n32.c4
-rw-r--r--arch/mips/kernel/smp-mt.c2
-rw-r--r--arch/mips/kernel/smtc.c4
-rw-r--r--arch/mips/kernel/syscall.c58
-rw-r--r--arch/mips/kernel/sysirix.c20
-rw-r--r--arch/mips/kernel/time.c2
-rw-r--r--arch/mips/kernel/traps.c26
-rw-r--r--arch/mips/kernel/unaligned.c2
-rw-r--r--arch/mips/lib/ucmpdi2.c2
-rw-r--r--arch/mips/math-emu/cp1emu.c8
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c22
-rw-r--r--arch/mips/mips-boards/atlas/atlas_setup.c2
-rw-r--r--arch/mips/mips-boards/generic/init.c12
-rw-r--r--arch/mips/mips-boards/generic/memory.c4
-rw-r--r--arch/mips/mips-boards/generic/pci.c2
-rw-r--r--arch/mips/mips-boards/generic/time.c6
-rw-r--r--arch/mips/mips-boards/malta/malta_int.c34
-rw-r--r--arch/mips/mips-boards/malta/malta_setup.c10
-rw-r--r--arch/mips/mips-boards/sead/sead_int.c2
-rw-r--r--arch/mips/mips-boards/sead/sead_setup.c2
-rw-r--r--arch/mips/mipssim/sim_int.c2
-rw-r--r--arch/mips/mipssim/sim_mem.c4
-rw-r--r--arch/mips/mipssim/sim_time.c2
-rw-r--r--arch/mips/mm/c-r3k.c12
-rw-r--r--arch/mips/mm/sc-mips.c2
-rw-r--r--arch/mips/mm/tlb-r4k.c2
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c2
-rw-r--r--arch/mips/oprofile/op_model_rm9000.c2
-rw-r--r--arch/mips/pci/fixup-atlas.c6
-rw-r--r--arch/mips/pci/ops-au1000.c2
-rw-r--r--arch/mips/pci/ops-sni.c22
-rw-r--r--arch/mips/philips/pnx8550/common/proc.c4
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_usb.c8
-rw-r--r--arch/mips/qemu/q-firmware.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-eisa.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c2
-rw-r--r--arch/mips/sgi-ip32/crime.c6
-rw-r--r--arch/mips/sgi-ip32/ip32-irq.c26
-rw-r--r--arch/mips/sgi-ip32/ip32-memory.c4
-rw-r--r--arch/mips/sibyte/common/sb_tbprof.c4
-rw-r--r--arch/mips/sni/a20r.c6
-rw-r--r--arch/mips/sni/pcimt.c4
-rw-r--r--arch/mips/sni/pcit.c26
-rw-r--r--arch/mips/sni/rm200.c10
-rw-r--r--arch/mips/sni/setup.c6
-rw-r--r--arch/mips/sni/sniprom.c6
-rw-r--r--arch/mips/sni/time.c16
78 files changed, 378 insertions, 378 deletions
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 626de44bd888..d15b047d480d 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -184,7 +184,7 @@ static dbdev_tab_t dbdev_tab[] = {
184static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS]; 184static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS];
185 185
186static dbdev_tab_t * 186static dbdev_tab_t *
187find_dbdev_id (u32 id) 187find_dbdev_id(u32 id)
188{ 188{
189 int i; 189 int i;
190 dbdev_tab_t *p; 190 dbdev_tab_t *p;
diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index de5447e83849..b8638d293cf9 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -42,7 +42,7 @@ extern void (*flush_cache_all)(void);
42void au1000_restart(char *command) 42void au1000_restart(char *command)
43{ 43{
44 /* Set all integrated peripherals to disabled states */ 44 /* Set all integrated peripherals to disabled states */
45 extern void board_reset (void); 45 extern void board_reset(void);
46 u32 prid = read_c0_prid(); 46 u32 prid = read_c0_prid();
47 47
48 printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n"); 48 printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 726c340460b6..2556399708ba 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -200,7 +200,7 @@ unsigned long cal_r4koff(void)
200 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S); 200 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
201 201
202 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S); 202 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
203 au_writel (0, SYS_TOYWRITE); 203 au_writel(0, SYS_TOYWRITE);
204 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S); 204 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
205 205
206 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * 206 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/au1000/db1x00/board_setup.c
index 8b08edb977be..99eafeada518 100644
--- a/arch/mips/au1000/db1x00/board_setup.c
+++ b/arch/mips/au1000/db1x00/board_setup.c
@@ -46,7 +46,7 @@
46 46
47static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; 47static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
48 48
49void board_reset (void) 49void board_reset(void)
50{ 50{
51 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 51 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
52 bcsr->swreset = 0x0000; 52 bcsr->swreset = 0x0000;
diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c
index e6bdd07cc093..4d7bcfc8cf73 100644
--- a/arch/mips/au1000/db1x00/init.c
+++ b/arch/mips/au1000/db1x00/init.c
@@ -60,11 +60,11 @@ void __init prom_init(void)
60 prom_envp = (char **) fw_arg2; 60 prom_envp = (char **) fw_arg2;
61 61
62 /* Set the platform # */ 62 /* Set the platform # */
63#if defined (CONFIG_MIPS_DB1550) 63#if defined(CONFIG_MIPS_DB1550)
64 mips_machtype = MACH_DB1550; 64 mips_machtype = MACH_DB1550;
65#elif defined (CONFIG_MIPS_DB1500) 65#elif defined(CONFIG_MIPS_DB1500)
66 mips_machtype = MACH_DB1500; 66 mips_machtype = MACH_DB1500;
67#elif defined (CONFIG_MIPS_DB1100) 67#elif defined(CONFIG_MIPS_DB1100)
68 mips_machtype = MACH_DB1100; 68 mips_machtype = MACH_DB1100;
69#else 69#else
70 mips_machtype = MACH_DB1000; 70 mips_machtype = MACH_DB1000;
diff --git a/arch/mips/au1000/mtx-1/board_setup.c b/arch/mips/au1000/mtx-1/board_setup.c
index 2c460c116570..abfc4bcddf7a 100644
--- a/arch/mips/au1000/mtx-1/board_setup.c
+++ b/arch/mips/au1000/mtx-1/board_setup.c
@@ -46,7 +46,7 @@
46extern int (*board_pci_idsel)(unsigned int devsel, int assert); 46extern int (*board_pci_idsel)(unsigned int devsel, int assert);
47int mtx1_pci_idsel(unsigned int devsel, int assert); 47int mtx1_pci_idsel(unsigned int devsel, int assert);
48 48
49void board_reset (void) 49void board_reset(void)
50{ 50{
51 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 51 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
52 au_writel(0x00000000, 0xAE00001C); 52 au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
index 0aed89114bfc..5198c4f98b43 100644
--- a/arch/mips/au1000/pb1000/board_setup.c
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -39,7 +39,7 @@
39#include <asm/mach-au1x00/au1000.h> 39#include <asm/mach-au1x00/au1000.h>
40#include <asm/mach-pb1x00/pb1000.h> 40#include <asm/mach-pb1x00/pb1000.h>
41 41
42void board_reset (void) 42void board_reset(void)
43{ 43{
44} 44}
45 45
diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c
index 259ca05860c3..42874a6b31d1 100644
--- a/arch/mips/au1000/pb1100/board_setup.c
+++ b/arch/mips/au1000/pb1100/board_setup.c
@@ -39,7 +39,7 @@
39#include <asm/mach-au1x00/au1000.h> 39#include <asm/mach-au1x00/au1000.h>
40#include <asm/mach-pb1x00/pb1100.h> 40#include <asm/mach-pb1x00/pb1100.h>
41 41
42void board_reset (void) 42void board_reset(void)
43{ 43{
44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
45 au_writel(0x00000000, 0xAE00001C); 45 au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
index eea2092bde8d..2122515f79d7 100644
--- a/arch/mips/au1000/pb1200/board_setup.c
+++ b/arch/mips/au1000/pb1200/board_setup.c
@@ -57,7 +57,7 @@
57extern void _board_init_irq(void); 57extern void _board_init_irq(void);
58extern void (*board_init_irq)(void); 58extern void (*board_init_irq)(void);
59 59
60void board_reset (void) 60void board_reset(void)
61{ 61{
62 bcsr->resets = 0; 62 bcsr->resets = 0;
63 bcsr->system = 0; 63 bcsr->system = 0;
@@ -148,7 +148,7 @@ void __init board_setup(void)
148} 148}
149 149
150int 150int
151board_au1200fb_panel (void) 151board_au1200fb_panel(void)
152{ 152{
153 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; 153 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
154 int p; 154 int p;
@@ -160,7 +160,7 @@ board_au1200fb_panel (void)
160} 160}
161 161
162int 162int
163board_au1200fb_panel_init (void) 163board_au1200fb_panel_init(void)
164{ 164{
165 /* Apply power */ 165 /* Apply power */
166 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; 166 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
@@ -170,7 +170,7 @@ board_au1200fb_panel_init (void)
170} 170}
171 171
172int 172int
173board_au1200fb_panel_shutdown (void) 173board_au1200fb_panel_shutdown(void)
174{ 174{
175 /* Remove power */ 175 /* Remove power */
176 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; 176 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c
index a2d850db8902..5446836869d6 100644
--- a/arch/mips/au1000/pb1500/board_setup.c
+++ b/arch/mips/au1000/pb1500/board_setup.c
@@ -39,7 +39,7 @@
39#include <asm/mach-au1x00/au1000.h> 39#include <asm/mach-au1x00/au1000.h>
40#include <asm/mach-pb1x00/pb1500.h> 40#include <asm/mach-pb1x00/pb1500.h>
41 41
42void board_reset (void) 42void board_reset(void)
43{ 43{
44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
45 au_writel(0x00000000, 0xAE00001C); 45 au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/pb1550/board_setup.c b/arch/mips/au1000/pb1550/board_setup.c
index 05fd27dc24e6..e3cfb0d73180 100644
--- a/arch/mips/au1000/pb1550/board_setup.c
+++ b/arch/mips/au1000/pb1550/board_setup.c
@@ -44,7 +44,7 @@
44#include <asm/mach-au1x00/au1000.h> 44#include <asm/mach-au1x00/au1000.h>
45#include <asm/mach-pb1x00/pb1550.h> 45#include <asm/mach-pb1x00/pb1550.h>
46 46
47void board_reset (void) 47void board_reset(void)
48{ 48{
49 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 49 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
50 au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C); 50 au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
diff --git a/arch/mips/au1000/xxs1500/board_setup.c b/arch/mips/au1000/xxs1500/board_setup.c
index ae3d6b19e94d..a9237f41933d 100644
--- a/arch/mips/au1000/xxs1500/board_setup.c
+++ b/arch/mips/au1000/xxs1500/board_setup.c
@@ -39,7 +39,7 @@
39#include <asm/pgtable.h> 39#include <asm/pgtable.h>
40#include <asm/au1000.h> 40#include <asm/au1000.h>
41 41
42void board_reset (void) 42void board_reset(void)
43{ 43{
44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
45 au_writel(0x00000000, 0xAE00001C); 45 au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
index 68be19d1802e..404ca9284b30 100644
--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -216,7 +216,7 @@ static int __init excite_platform_init(void)
216 titan_writel(0x80021dff, GXCFG); /* XDMA reset */ 216 titan_writel(0x80021dff, GXCFG); /* XDMA reset */
217 titan_writel(0x00000000, CPXCISRA); 217 titan_writel(0x00000000, CPXCISRA);
218 titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */ 218 titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */
219#if defined (CONFIG_HIGHMEM) 219#if defined(CONFIG_HIGHMEM)
220# error change for HIGHMEM support! 220# error change for HIGHMEM support!
221#else 221#else
222 titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */ 222 titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */
@@ -262,12 +262,12 @@ void __init plat_mem_setup(void)
262 add_memory_region(0x00000000, memsize, BOOT_MEM_RAM); 262 add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
263 263
264 /* Set up the peripheral address map */ 264 /* Set up the peripheral address map */
265 *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0; 265 *(boot_ocd_base + (LKB9 / sizeof(u32))) = 0;
266 *(boot_ocd_base + (LKB10 / sizeof (u32))) = 0; 266 *(boot_ocd_base + (LKB10 / sizeof(u32))) = 0;
267 *(boot_ocd_base + (LKB11 / sizeof (u32))) = 0; 267 *(boot_ocd_base + (LKB11 / sizeof(u32))) = 0;
268 *(boot_ocd_base + (LKB12 / sizeof (u32))) = 0; 268 *(boot_ocd_base + (LKB12 / sizeof(u32))) = 0;
269 wmb(); 269 wmb();
270 *(boot_ocd_base + (LKB0 / sizeof (u32))) = EXCITE_PHYS_OCD >> 4; 270 *(boot_ocd_base + (LKB0 / sizeof(u32))) = EXCITE_PHYS_OCD >> 4;
271 wmb(); 271 wmb();
272 272
273 ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5); 273 ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5);
diff --git a/arch/mips/boot/addinitrd.c b/arch/mips/boot/addinitrd.c
index 8b3033304770..193e4be52e79 100644
--- a/arch/mips/boot/addinitrd.c
+++ b/arch/mips/boot/addinitrd.c
@@ -32,13 +32,13 @@
32 32
33#define SWAB(a) (swab ? swab32(a) : (a)) 33#define SWAB(a) (swab ? swab32(a) : (a))
34 34
35void die (char *s) 35void die(char *s)
36{ 36{
37 perror (s); 37 perror(s);
38 exit (1); 38 exit(1);
39} 39}
40 40
41int main (int argc, char *argv[]) 41int main(int argc, char *argv[])
42{ 42{
43 int fd_vmlinux,fd_initrd,fd_outfile; 43 int fd_vmlinux,fd_initrd,fd_outfile;
44 FILHDR efile; 44 FILHDR efile;
@@ -52,18 +52,18 @@ int main (int argc, char *argv[])
52 int swab = 0; 52 int swab = 0;
53 53
54 if (argc != 4) { 54 if (argc != 4) {
55 printf ("Usage: %s <vmlinux> <initrd> <outfile>\n",argv[0]); 55 printf("Usage: %s <vmlinux> <initrd> <outfile>\n",argv[0]);
56 exit (1); 56 exit(1);
57 } 57 }
58 58
59 if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0) 59 if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0)
60 die ("open vmlinux"); 60 die("open vmlinux");
61 if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile) 61 if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile)
62 die ("read file header"); 62 die("read file header");
63 if (read (fd_vmlinux, &eaout, sizeof eaout) != sizeof eaout) 63 if (read (fd_vmlinux, &eaout, sizeof eaout) != sizeof eaout)
64 die ("read aout header"); 64 die("read aout header");
65 if (read (fd_vmlinux, esecs, sizeof esecs) != sizeof esecs) 65 if (read (fd_vmlinux, esecs, sizeof esecs) != sizeof esecs)
66 die ("read section headers"); 66 die("read section headers");
67 /* 67 /*
68 * check whether the file is good for us 68 * check whether the file is good for us
69 */ 69 */
@@ -82,13 +82,13 @@ int main (int argc, char *argv[])
82 82
83 /* make sure we have an empty data segment for the initrd */ 83 /* make sure we have an empty data segment for the initrd */
84 if (eaout.dsize || esecs[1].s_size) { 84 if (eaout.dsize || esecs[1].s_size) {
85 fprintf (stderr, "Data segment not empty. Giving up!\n"); 85 fprintf(stderr, "Data segment not empty. Giving up!\n");
86 exit (1); 86 exit(1);
87 } 87 }
88 if ((fd_initrd = open (argv[2], O_RDONLY)) < 0) 88 if ((fd_initrd = open (argv[2], O_RDONLY)) < 0)
89 die ("open initrd"); 89 die("open initrd");
90 if (fstat (fd_initrd, &st) < 0) 90 if (fstat (fd_initrd, &st) < 0)
91 die ("fstat initrd"); 91 die("fstat initrd");
92 loadaddr = ((SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size) 92 loadaddr = ((SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size)
93 + MIPS_PAGE_SIZE-1) & ~MIPS_PAGE_MASK) - 8; 93 + MIPS_PAGE_SIZE-1) & ~MIPS_PAGE_MASK) - 8;
94 if (loadaddr < (SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size))) 94 if (loadaddr < (SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size)))
@@ -99,33 +99,33 @@ int main (int argc, char *argv[])
99 eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr); 99 eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr);
100 100
101 if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC,0666)) < 0) 101 if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC,0666)) < 0)
102 die ("open outfile"); 102 die("open outfile");
103 if (write (fd_outfile, &efile, sizeof efile) != sizeof efile) 103 if (write (fd_outfile, &efile, sizeof efile) != sizeof efile)
104 die ("write file header"); 104 die("write file header");
105 if (write (fd_outfile, &eaout, sizeof eaout) != sizeof eaout) 105 if (write (fd_outfile, &eaout, sizeof eaout) != sizeof eaout)
106 die ("write aout header"); 106 die("write aout header");
107 if (write (fd_outfile, esecs, sizeof esecs) != sizeof esecs) 107 if (write (fd_outfile, esecs, sizeof esecs) != sizeof esecs)
108 die ("write section headers"); 108 die("write section headers");
109 /* skip padding */ 109 /* skip padding */
110 if(lseek(fd_vmlinux, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1) 110 if(lseek(fd_vmlinux, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1)
111 die ("lseek vmlinux"); 111 die("lseek vmlinux");
112 if(lseek(fd_outfile, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1) 112 if(lseek(fd_outfile, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1)
113 die ("lseek outfile"); 113 die("lseek outfile");
114 /* copy text segment */ 114 /* copy text segment */
115 cnt = SWAB(eaout.tsize); 115 cnt = SWAB(eaout.tsize);
116 while (cnt) { 116 while (cnt) {
117 if ((i = read (fd_vmlinux, buf, sizeof buf)) <= 0) 117 if ((i = read (fd_vmlinux, buf, sizeof buf)) <= 0)
118 die ("read vmlinux"); 118 die("read vmlinux");
119 if (write (fd_outfile, buf, i) != i) 119 if (write (fd_outfile, buf, i) != i)
120 die ("write vmlinux"); 120 die("write vmlinux");
121 cnt -= i; 121 cnt -= i;
122 } 122 }
123 if (write (fd_outfile, initrd_header, sizeof initrd_header) != sizeof initrd_header) 123 if (write (fd_outfile, initrd_header, sizeof initrd_header) != sizeof initrd_header)
124 die ("write initrd header"); 124 die("write initrd header");
125 while ((i = read (fd_initrd, buf, sizeof buf)) > 0) 125 while ((i = read (fd_initrd, buf, sizeof buf)) > 0)
126 if (write (fd_outfile, buf, i) != i) 126 if (write (fd_outfile, buf, i) != i)
127 die ("write initrd"); 127 die("write initrd");
128 close (fd_vmlinux); 128 close(fd_vmlinux);
129 close (fd_initrd); 129 close(fd_initrd);
130 return 0; 130 return 0;
131} 131}
diff --git a/arch/mips/fw/arc/memory.c b/arch/mips/fw/arc/memory.c
index 83d15791ef6a..8b8eea2b6cf6 100644
--- a/arch/mips/fw/arc/memory.c
+++ b/arch/mips/fw/arc/memory.c
@@ -63,7 +63,7 @@ static char *arc_mtypes[8] = {
63 : arc_mtypes[a.arc] 63 : arc_mtypes[a.arc]
64#endif 64#endif
65 65
66static inline int memtype_classify_arcs (union linux_memtypes type) 66static inline int memtype_classify_arcs(union linux_memtypes type)
67{ 67{
68 switch (type.arcs) { 68 switch (type.arcs) {
69 case arcs_fcontig: 69 case arcs_fcontig:
@@ -83,7 +83,7 @@ static inline int memtype_classify_arcs (union linux_memtypes type)
83 while(1); /* Nuke warning. */ 83 while(1); /* Nuke warning. */
84} 84}
85 85
86static inline int memtype_classify_arc (union linux_memtypes type) 86static inline int memtype_classify_arc(union linux_memtypes type)
87{ 87{
88 switch (type.arc) { 88 switch (type.arc) {
89 case arc_free: 89 case arc_free:
@@ -103,7 +103,7 @@ static inline int memtype_classify_arc (union linux_memtypes type)
103 while(1); /* Nuke warning. */ 103 while(1); /* Nuke warning. */
104} 104}
105 105
106static int __init prom_memtype_classify (union linux_memtypes type) 106static int __init prom_memtype_classify(union linux_memtypes type)
107{ 107{
108 if (prom_flags & PROM_FLAG_ARCS) /* SGI is ``different'' ... */ 108 if (prom_flags & PROM_FLAG_ARCS) /* SGI is ``different'' ... */
109 return memtype_classify_arcs(type); 109 return memtype_classify_arcs(type);
diff --git a/arch/mips/jazz/reset.c b/arch/mips/jazz/reset.c
index d8ade85060b3..dd889fe86bd1 100644
--- a/arch/mips/jazz/reset.c
+++ b/arch/mips/jazz/reset.c
@@ -49,8 +49,8 @@ void jazz_machine_restart(char *command)
49{ 49{
50 while(1) { 50 while(1) {
51 kb_wait(); 51 kb_wait();
52 jazz_write_command (0xd1); 52 jazz_write_command(0xd1);
53 kb_wait(); 53 kb_wait();
54 jazz_write_output (0x00); 54 jazz_write_output(0x00);
55 } 55 }
56} 56}
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index 2a7ec08b6bad..cfc7dce78dab 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -74,11 +74,11 @@ void __init plat_mem_setup(void)
74 int i; 74 int i;
75 75
76 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ 76 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */
77 add_wired_entry (0x02000017, 0x03c00017, 0xe0000000, PM_64K); 77 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K);
78 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */ 78 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */
79 add_wired_entry (0x02400017, 0x02440017, 0xe2000000, PM_16M); 79 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M);
80 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */ 80 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */
81 add_wired_entry (0x01800017, 0x01000017, 0xe4000000, PM_4M); 81 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M);
82 82
83 set_io_port_base(JAZZ_PORT_BASE); 83 set_io_port_base(JAZZ_PORT_BASE);
84#ifdef CONFIG_EISA 84#ifdef CONFIG_EISA
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index 6648fde20b96..af78456d4138 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -29,7 +29,7 @@ static inline void align_mod(const int align, const int mod)
29 ".endr\n\t" 29 ".endr\n\t"
30 ".set pop" 30 ".set pop"
31 : 31 :
32 : GCC_IMM_ASM (align), GCC_IMM_ASM (mod)); 32 : GCC_IMM_ASM(align), GCC_IMM_ASM(mod));
33} 33}
34 34
35static inline void mult_sh_align_mod(long *v1, long *v2, long *w, 35static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index cb5623aad552..989d06c3827b 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -733,7 +733,7 @@ static int kgdb_smp_call_kgdb_wait(void)
733 * returns 1 if you should skip the instruction at the trap address, 0 733 * returns 1 if you should skip the instruction at the trap address, 0
734 * otherwise. 734 * otherwise.
735 */ 735 */
736void handle_exception (struct gdb_regs *regs) 736void handle_exception(struct gdb_regs *regs)
737{ 737{
738 int trap; /* Trap type */ 738 int trap; /* Trap type */
739 int sigval; 739 int sigval;
@@ -917,7 +917,7 @@ void handle_exception (struct gdb_regs *regs)
917 && hexToInt(&ptr, &length)) { 917 && hexToInt(&ptr, &length)) {
918 if (mem2hex((char *)addr, output_buffer, length, 1)) 918 if (mem2hex((char *)addr, output_buffer, length, 1))
919 break; 919 break;
920 strcpy (output_buffer, "E03"); 920 strcpy(output_buffer, "E03");
921 } else 921 } else
922 strcpy(output_buffer,"E01"); 922 strcpy(output_buffer,"E01");
923 break; 923 break;
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index b6e5bb41b06b..a860b21e63e9 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -329,7 +329,7 @@ static struct resource pic2_io_resource = {
329 * driver compatibility reasons interrupts 0 - 15 to be the i8259 329 * driver compatibility reasons interrupts 0 - 15 to be the i8259
330 * interrupts even if the hardware uses a different interrupt numbering. 330 * interrupts even if the hardware uses a different interrupt numbering.
331 */ 331 */
332void __init init_i8259_irqs (void) 332void __init init_i8259_irqs(void)
333{ 333{
334 int i; 334 int i;
335 335
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 403d96f99e77..e3b4b547a822 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -203,8 +203,8 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc,
203 * Put the ELF interpreter info on the stack 203 * Put the ELF interpreter info on the stack
204 */ 204 */
205#define NEW_AUX_ENT(nr, id, val) \ 205#define NEW_AUX_ENT(nr, id, val) \
206 __put_user ((id), sp+(nr*2)); \ 206 __put_user((id), sp+(nr*2)); \
207 __put_user ((val), sp+(nr*2+1)); \ 207 __put_user((val), sp+(nr*2+1)); \
208 208
209 sp -= 2; 209 sp -= 2;
210 NEW_AUX_ENT(0, AT_NULL, 0); 210 NEW_AUX_ENT(0, AT_NULL, 0);
@@ -212,17 +212,17 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc,
212 if (exec) { 212 if (exec) {
213 sp -= 11*2; 213 sp -= 11*2;
214 214
215 NEW_AUX_ENT (0, AT_PHDR, load_addr + exec->e_phoff); 215 NEW_AUX_ENT(0, AT_PHDR, load_addr + exec->e_phoff);
216 NEW_AUX_ENT (1, AT_PHENT, sizeof (struct elf_phdr)); 216 NEW_AUX_ENT(1, AT_PHENT, sizeof(struct elf_phdr));
217 NEW_AUX_ENT (2, AT_PHNUM, exec->e_phnum); 217 NEW_AUX_ENT(2, AT_PHNUM, exec->e_phnum);
218 NEW_AUX_ENT (3, AT_PAGESZ, ELF_EXEC_PAGESIZE); 218 NEW_AUX_ENT(3, AT_PAGESZ, ELF_EXEC_PAGESIZE);
219 NEW_AUX_ENT (4, AT_BASE, interp_load_addr); 219 NEW_AUX_ENT(4, AT_BASE, interp_load_addr);
220 NEW_AUX_ENT (5, AT_FLAGS, 0); 220 NEW_AUX_ENT(5, AT_FLAGS, 0);
221 NEW_AUX_ENT (6, AT_ENTRY, (elf_addr_t) exec->e_entry); 221 NEW_AUX_ENT(6, AT_ENTRY, (elf_addr_t) exec->e_entry);
222 NEW_AUX_ENT (7, AT_UID, (elf_addr_t) current->uid); 222 NEW_AUX_ENT(7, AT_UID, (elf_addr_t) current->uid);
223 NEW_AUX_ENT (8, AT_EUID, (elf_addr_t) current->euid); 223 NEW_AUX_ENT(8, AT_EUID, (elf_addr_t) current->euid);
224 NEW_AUX_ENT (9, AT_GID, (elf_addr_t) current->gid); 224 NEW_AUX_ENT(9, AT_GID, (elf_addr_t) current->gid);
225 NEW_AUX_ENT (10, AT_EGID, (elf_addr_t) current->egid); 225 NEW_AUX_ENT(10, AT_EGID, (elf_addr_t) current->egid);
226 } 226 }
227#undef NEW_AUX_ENT 227#undef NEW_AUX_ENT
228 228
@@ -581,7 +581,7 @@ static void irix_map_prda_page(void)
581 struct prda *pp; 581 struct prda *pp;
582 582
583 down_write(&current->mm->mmap_sem); 583 down_write(&current->mm->mmap_sem);
584 v = do_brk (PRDA_ADDRESS, PAGE_SIZE); 584 v = do_brk(PRDA_ADDRESS, PAGE_SIZE);
585 up_write(&current->mm->mmap_sem); 585 up_write(&current->mm->mmap_sem);
586 586
587 if (v < 0) 587 if (v < 0)
@@ -815,7 +815,7 @@ out_free_interp:
815 kfree(elf_interpreter); 815 kfree(elf_interpreter);
816out_free_file: 816out_free_file:
817out_free_ph: 817out_free_ph:
818 kfree (elf_phdata); 818 kfree(elf_phdata);
819 goto out; 819 goto out;
820} 820}
821 821
@@ -1232,7 +1232,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file)
1232 strlcpy(psinfo.pr_fname, current->comm, sizeof(psinfo.pr_fname)); 1232 strlcpy(psinfo.pr_fname, current->comm, sizeof(psinfo.pr_fname));
1233 1233
1234 /* Try to dump the FPU. */ 1234 /* Try to dump the FPU. */
1235 prstatus.pr_fpvalid = dump_fpu (regs, &fpu); 1235 prstatus.pr_fpvalid = dump_fpu(regs, &fpu);
1236 if (!prstatus.pr_fpvalid) { 1236 if (!prstatus.pr_fpvalid) {
1237 numnote--; 1237 numnote--;
1238 } else { 1238 } else {
diff --git a/arch/mips/kernel/irixinv.c b/arch/mips/kernel/irixinv.c
index de8584f62311..cf2dcd3d6a93 100644
--- a/arch/mips/kernel/irixinv.c
+++ b/arch/mips/kernel/irixinv.c
@@ -14,7 +14,7 @@ int inventory_items = 0;
14 14
15static inventory_t inventory [MAX_INVENTORY]; 15static inventory_t inventory [MAX_INVENTORY];
16 16
17void add_to_inventory (int class, int type, int controller, int unit, int state) 17void add_to_inventory(int class, int type, int controller, int unit, int state)
18{ 18{
19 inventory_t *ni = &inventory [inventory_items]; 19 inventory_t *ni = &inventory [inventory_items];
20 20
@@ -30,7 +30,7 @@ void add_to_inventory (int class, int type, int controller, int unit, int state)
30 inventory_items++; 30 inventory_items++;
31} 31}
32 32
33int dump_inventory_to_user (void __user *userbuf, int size) 33int dump_inventory_to_user(void __user *userbuf, int size)
34{ 34{
35 inventory_t *inv = &inventory [0]; 35 inventory_t *inv = &inventory [0];
36 inventory_t __user *user = userbuf; 36 inventory_t __user *user = userbuf;
@@ -45,7 +45,7 @@ int dump_inventory_to_user (void __user *userbuf, int size)
45 return -EFAULT; 45 return -EFAULT;
46 user++; 46 user++;
47 } 47 }
48 return inventory_items * sizeof (inventory_t); 48 return inventory_items * sizeof(inventory_t);
49} 49}
50 50
51int __init init_inventory(void) 51int __init init_inventory(void)
@@ -55,24 +55,24 @@ int __init init_inventory(void)
55 * most likely this will not let just anyone run the X server 55 * most likely this will not let just anyone run the X server
56 * until we put the right values all over the place 56 * until we put the right values all over the place
57 */ 57 */
58 add_to_inventory (10, 3, 0, 0, 16400); 58 add_to_inventory(10, 3, 0, 0, 16400);
59 add_to_inventory (1, 1, 150, -1, 12); 59 add_to_inventory(1, 1, 150, -1, 12);
60 add_to_inventory (1, 3, 0, 0, 8976); 60 add_to_inventory(1, 3, 0, 0, 8976);
61 add_to_inventory (1, 2, 0, 0, 8976); 61 add_to_inventory(1, 2, 0, 0, 8976);
62 add_to_inventory (4, 8, 0, 0, 2); 62 add_to_inventory(4, 8, 0, 0, 2);
63 add_to_inventory (5, 5, 0, 0, 1); 63 add_to_inventory(5, 5, 0, 0, 1);
64 add_to_inventory (3, 3, 0, 0, 32768); 64 add_to_inventory(3, 3, 0, 0, 32768);
65 add_to_inventory (3, 4, 0, 0, 32768); 65 add_to_inventory(3, 4, 0, 0, 32768);
66 add_to_inventory (3, 8, 0, 0, 524288); 66 add_to_inventory(3, 8, 0, 0, 524288);
67 add_to_inventory (3, 9, 0, 0, 64); 67 add_to_inventory(3, 9, 0, 0, 64);
68 add_to_inventory (3, 1, 0, 0, 67108864); 68 add_to_inventory(3, 1, 0, 0, 67108864);
69 add_to_inventory (12, 3, 0, 0, 16); 69 add_to_inventory(12, 3, 0, 0, 16);
70 add_to_inventory (8, 7, 17, 0, 16777472); 70 add_to_inventory(8, 7, 17, 0, 16777472);
71 add_to_inventory (8, 0, 0, 0, 1); 71 add_to_inventory(8, 0, 0, 0, 1);
72 add_to_inventory (2, 1, 0, 13, 2); 72 add_to_inventory(2, 1, 0, 13, 2);
73 add_to_inventory (2, 2, 0, 2, 0); 73 add_to_inventory(2, 2, 0, 2, 0);
74 add_to_inventory (2, 2, 0, 1, 0); 74 add_to_inventory(2, 2, 0, 1, 0);
75 add_to_inventory (7, 14, 0, 0, 6); 75 add_to_inventory(7, 14, 0, 0, 6);
76 76
77 return 0; 77 return 0;
78} 78}
diff --git a/arch/mips/kernel/irixioctl.c b/arch/mips/kernel/irixioctl.c
index 30f9eb09db3f..2bde200d5ad0 100644
--- a/arch/mips/kernel/irixioctl.c
+++ b/arch/mips/kernel/irixioctl.c
@@ -238,7 +238,7 @@ asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
238 current->comm, current->pid, cmd); 238 current->comm, current->pid, cmd);
239 do_exit(255); 239 do_exit(255);
240#else 240#else
241 error = sys_ioctl (fd, cmd, arg); 241 error = sys_ioctl(fd, cmd, arg);
242#endif 242#endif
243 } 243 }
244 244
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 1ecdd50bfc60..4edc7e451d91 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -99,7 +99,7 @@ void ll_msc_irq(void)
99} 99}
100 100
101void 101void
102msc_bind_eic_interrupt (unsigned int irq, unsigned int set) 102msc_bind_eic_interrupt(unsigned int irq, unsigned int set)
103{ 103{
104 MSCIC_WRITE(MSC01_IC_RAMW, 104 MSCIC_WRITE(MSC01_IC_RAMW,
105 (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF)); 105 (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF));
@@ -130,7 +130,7 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma
130{ 130{
131 extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset); 131 extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset);
132 132
133 _icctrl_msc = (unsigned long) ioremap (icubase, 0x40000); 133 _icctrl_msc = (unsigned long) ioremap(icubase, 0x40000);
134 134
135 /* Reset interrupt controller - initialises all registers to 0 */ 135 /* Reset interrupt controller - initialises all registers to 0 */
136 MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT); 136 MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT);
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index cb9a14a1ca5b..1ed176606548 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -118,11 +118,11 @@ struct apsp_table syscall_command_table[] = {
118 118
119static int sp_syscall(int num, int arg0, int arg1, int arg2, int arg3) 119static int sp_syscall(int num, int arg0, int arg1, int arg2, int arg3)
120{ 120{
121 register long int _num __asm__ ("$2") = num; 121 register long int _num __asm__("$2") = num;
122 register long int _arg0 __asm__ ("$4") = arg0; 122 register long int _arg0 __asm__("$4") = arg0;
123 register long int _arg1 __asm__ ("$5") = arg1; 123 register long int _arg1 __asm__("$5") = arg1;
124 register long int _arg2 __asm__ ("$6") = arg2; 124 register long int _arg2 __asm__("$6") = arg2;
125 register long int _arg3 __asm__ ("$7") = arg3; 125 register long int _arg3 __asm__("$7") = arg3;
126 126
127 mm_segment_t old_fs; 127 mm_segment_t old_fs;
128 128
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 135d9a5fe337..a6de17081cad 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -300,13 +300,13 @@ asmlinkage int sys32_sched_rr_get_interval(compat_pid_t pid,
300{ 300{
301 struct timespec t; 301 struct timespec t;
302 int ret; 302 int ret;
303 mm_segment_t old_fs = get_fs (); 303 mm_segment_t old_fs = get_fs();
304 304
305 set_fs (KERNEL_DS); 305 set_fs(KERNEL_DS);
306 ret = sys_sched_rr_get_interval(pid, (struct timespec __user *)&t); 306 ret = sys_sched_rr_get_interval(pid, (struct timespec __user *)&t);
307 set_fs (old_fs); 307 set_fs(old_fs);
308 if (put_user (t.tv_sec, &interval->tv_sec) || 308 if (put_user (t.tv_sec, &interval->tv_sec) ||
309 __put_user (t.tv_nsec, &interval->tv_nsec)) 309 __put_user(t.tv_nsec, &interval->tv_nsec))
310 return -EFAULT; 310 return -EFAULT;
311 return ret; 311 return ret;
312} 312}
@@ -314,7 +314,7 @@ asmlinkage int sys32_sched_rr_get_interval(compat_pid_t pid,
314#ifdef CONFIG_SYSVIPC 314#ifdef CONFIG_SYSVIPC
315 315
316asmlinkage long 316asmlinkage long
317sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth) 317sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth)
318{ 318{
319 int version, err; 319 int version, err;
320 320
@@ -373,7 +373,7 @@ sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth)
373#else 373#else
374 374
375asmlinkage long 375asmlinkage long
376sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth) 376sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth)
377{ 377{
378 return -ENOSYS; 378 return -ENOSYS;
379} 379}
@@ -505,7 +505,7 @@ asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32)
505 505
506 set_fs(KERNEL_DS); 506 set_fs(KERNEL_DS);
507 err = sys_ustat(dev, (struct ustat __user *)&tmp); 507 err = sys_ustat(dev, (struct ustat __user *)&tmp);
508 set_fs (old_fs); 508 set_fs(old_fs);
509 509
510 if (err) 510 if (err)
511 goto out; 511 goto out;
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index 56750b02ab40..3d6b1ec1f328 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -236,7 +236,7 @@ void mips_mt_set_cpuoptions(void)
236 if (oconfig7 != nconfig7) { 236 if (oconfig7 != nconfig7) {
237 __asm__ __volatile("sync"); 237 __asm__ __volatile("sync");
238 write_c0_config7(nconfig7); 238 write_c0_config7(nconfig7);
239 ehb (); 239 ehb();
240 printk("Config7: 0x%08x\n", read_c0_config7()); 240 printk("Config7: 0x%08x\n", read_c0_config7());
241 } 241 }
242 242
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index f99bb4085430..11cb264f59ce 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -202,13 +202,13 @@ void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
202#endif 202#endif
203} 203}
204 204
205int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs) 205int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
206{ 206{
207 elf_dump_regs(*regs, task_pt_regs(tsk)); 207 elf_dump_regs(*regs, task_pt_regs(tsk));
208 return 1; 208 return 1;
209} 209}
210 210
211int dump_task_fpu (struct task_struct *t, elf_fpregset_t *fpr) 211int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
212{ 212{
213 memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu)); 213 memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
214 214
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index bbd57b20b43e..58aa6fec1146 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -54,7 +54,7 @@ void ptrace_disable(struct task_struct *child)
54 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel. 54 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
55 * Registers are sign extended to fill the available space. 55 * Registers are sign extended to fill the available space.
56 */ 56 */
57int ptrace_getregs (struct task_struct *child, __s64 __user *data) 57int ptrace_getregs(struct task_struct *child, __s64 __user *data)
58{ 58{
59 struct pt_regs *regs; 59 struct pt_regs *regs;
60 int i; 60 int i;
@@ -65,13 +65,13 @@ int ptrace_getregs (struct task_struct *child, __s64 __user *data)
65 regs = task_pt_regs(child); 65 regs = task_pt_regs(child);
66 66
67 for (i = 0; i < 32; i++) 67 for (i = 0; i < 32; i++)
68 __put_user (regs->regs[i], data + i); 68 __put_user(regs->regs[i], data + i);
69 __put_user (regs->lo, data + EF_LO - EF_R0); 69 __put_user(regs->lo, data + EF_LO - EF_R0);
70 __put_user (regs->hi, data + EF_HI - EF_R0); 70 __put_user(regs->hi, data + EF_HI - EF_R0);
71 __put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0); 71 __put_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
72 __put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0); 72 __put_user(regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
73 __put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0); 73 __put_user(regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
74 __put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0); 74 __put_user(regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
75 75
76 return 0; 76 return 0;
77} 77}
@@ -81,7 +81,7 @@ int ptrace_getregs (struct task_struct *child, __s64 __user *data)
81 * the 64-bit format. On a 32-bit kernel only the lower order half 81 * the 64-bit format. On a 32-bit kernel only the lower order half
82 * (according to endianness) will be used. 82 * (according to endianness) will be used.
83 */ 83 */
84int ptrace_setregs (struct task_struct *child, __s64 __user *data) 84int ptrace_setregs(struct task_struct *child, __s64 __user *data)
85{ 85{
86 struct pt_regs *regs; 86 struct pt_regs *regs;
87 int i; 87 int i;
@@ -92,17 +92,17 @@ int ptrace_setregs (struct task_struct *child, __s64 __user *data)
92 regs = task_pt_regs(child); 92 regs = task_pt_regs(child);
93 93
94 for (i = 0; i < 32; i++) 94 for (i = 0; i < 32; i++)
95 __get_user (regs->regs[i], data + i); 95 __get_user(regs->regs[i], data + i);
96 __get_user (regs->lo, data + EF_LO - EF_R0); 96 __get_user(regs->lo, data + EF_LO - EF_R0);
97 __get_user (regs->hi, data + EF_HI - EF_R0); 97 __get_user(regs->hi, data + EF_HI - EF_R0);
98 __get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0); 98 __get_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
99 99
100 /* badvaddr, status, and cause may not be written. */ 100 /* badvaddr, status, and cause may not be written. */
101 101
102 return 0; 102 return 0;
103} 103}
104 104
105int ptrace_getfpregs (struct task_struct *child, __u32 __user *data) 105int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
106{ 106{
107 int i; 107 int i;
108 unsigned int tmp; 108 unsigned int tmp;
@@ -113,13 +113,13 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
113 if (tsk_used_math(child)) { 113 if (tsk_used_math(child)) {
114 fpureg_t *fregs = get_fpu_regs(child); 114 fpureg_t *fregs = get_fpu_regs(child);
115 for (i = 0; i < 32; i++) 115 for (i = 0; i < 32; i++)
116 __put_user (fregs[i], i + (__u64 __user *) data); 116 __put_user(fregs[i], i + (__u64 __user *) data);
117 } else { 117 } else {
118 for (i = 0; i < 32; i++) 118 for (i = 0; i < 32; i++)
119 __put_user ((__u64) -1, i + (__u64 __user *) data); 119 __put_user((__u64) -1, i + (__u64 __user *) data);
120 } 120 }
121 121
122 __put_user (child->thread.fpu.fcr31, data + 64); 122 __put_user(child->thread.fpu.fcr31, data + 64);
123 123
124 preempt_disable(); 124 preempt_disable();
125 if (cpu_has_fpu) { 125 if (cpu_has_fpu) {
@@ -142,12 +142,12 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
142 tmp = 0; 142 tmp = 0;
143 } 143 }
144 preempt_enable(); 144 preempt_enable();
145 __put_user (tmp, data + 65); 145 __put_user(tmp, data + 65);
146 146
147 return 0; 147 return 0;
148} 148}
149 149
150int ptrace_setfpregs (struct task_struct *child, __u32 __user *data) 150int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
151{ 151{
152 fpureg_t *fregs; 152 fpureg_t *fregs;
153 int i; 153 int i;
@@ -158,9 +158,9 @@ int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
158 fregs = get_fpu_regs(child); 158 fregs = get_fpu_regs(child);
159 159
160 for (i = 0; i < 32; i++) 160 for (i = 0; i < 32; i++)
161 __get_user (fregs[i], i + (__u64 __user *) data); 161 __get_user(fregs[i], i + (__u64 __user *) data);
162 162
163 __get_user (child->thread.fpu.fcr31, data + 64); 163 __get_user(child->thread.fpu.fcr31, data + 64);
164 164
165 /* FIR may not be written. */ 165 /* FIR may not be written. */
166 166
@@ -390,19 +390,19 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
390 } 390 }
391 391
392 case PTRACE_GETREGS: 392 case PTRACE_GETREGS:
393 ret = ptrace_getregs (child, (__u64 __user *) data); 393 ret = ptrace_getregs(child, (__u64 __user *) data);
394 break; 394 break;
395 395
396 case PTRACE_SETREGS: 396 case PTRACE_SETREGS:
397 ret = ptrace_setregs (child, (__u64 __user *) data); 397 ret = ptrace_setregs(child, (__u64 __user *) data);
398 break; 398 break;
399 399
400 case PTRACE_GETFPREGS: 400 case PTRACE_GETFPREGS:
401 ret = ptrace_getfpregs (child, (__u32 __user *) data); 401 ret = ptrace_getfpregs(child, (__u32 __user *) data);
402 break; 402 break;
403 403
404 case PTRACE_SETFPREGS: 404 case PTRACE_SETFPREGS:
405 ret = ptrace_setfpregs (child, (__u32 __user *) data); 405 ret = ptrace_setfpregs(child, (__u32 __user *) data);
406 break; 406 break;
407 407
408 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ 408 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index d9a39c169450..f2bffed94fa3 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -36,11 +36,11 @@
36#include <asm/uaccess.h> 36#include <asm/uaccess.h>
37#include <asm/bootinfo.h> 37#include <asm/bootinfo.h>
38 38
39int ptrace_getregs (struct task_struct *child, __s64 __user *data); 39int ptrace_getregs(struct task_struct *child, __s64 __user *data);
40int ptrace_setregs (struct task_struct *child, __s64 __user *data); 40int ptrace_setregs(struct task_struct *child, __s64 __user *data);
41 41
42int ptrace_getfpregs (struct task_struct *child, __u32 __user *data); 42int ptrace_getfpregs(struct task_struct *child, __u32 __user *data);
43int ptrace_setfpregs (struct task_struct *child, __u32 __user *data); 43int ptrace_setfpregs(struct task_struct *child, __u32 __user *data);
44 44
45/* 45/*
46 * Tracing a 32-bit process with a 64-bit strace and vice versa will not 46 * Tracing a 32-bit process with a 64-bit strace and vice versa will not
@@ -346,19 +346,19 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
346 } 346 }
347 347
348 case PTRACE_GETREGS: 348 case PTRACE_GETREGS:
349 ret = ptrace_getregs (child, (__u64 __user *) (__u64) data); 349 ret = ptrace_getregs(child, (__u64 __user *) (__u64) data);
350 break; 350 break;
351 351
352 case PTRACE_SETREGS: 352 case PTRACE_SETREGS:
353 ret = ptrace_setregs (child, (__u64 __user *) (__u64) data); 353 ret = ptrace_setregs(child, (__u64 __user *) (__u64) data);
354 break; 354 break;
355 355
356 case PTRACE_GETFPREGS: 356 case PTRACE_GETFPREGS:
357 ret = ptrace_getfpregs (child, (__u32 __user *) (__u64) data); 357 ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data);
358 break; 358 break;
359 359
360 case PTRACE_SETFPREGS: 360 case PTRACE_SETFPREGS:
361 ret = ptrace_setfpregs (child, (__u32 __user *) (__u64) data); 361 ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data);
362 break; 362 break;
363 363
364 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ 364 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index 64b612a0a622..572c610db1b1 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -261,11 +261,11 @@ static inline int put_sigset(const sigset_t *kbuf, compat_sigset_t __user *ubuf)
261 default: 261 default:
262 __put_sigset_unknown_nsig(); 262 __put_sigset_unknown_nsig();
263 case 2: 263 case 2:
264 err |= __put_user (kbuf->sig[1] >> 32, &ubuf->sig[3]); 264 err |= __put_user(kbuf->sig[1] >> 32, &ubuf->sig[3]);
265 err |= __put_user (kbuf->sig[1] & 0xffffffff, &ubuf->sig[2]); 265 err |= __put_user(kbuf->sig[1] & 0xffffffff, &ubuf->sig[2]);
266 case 1: 266 case 1:
267 err |= __put_user (kbuf->sig[0] >> 32, &ubuf->sig[1]); 267 err |= __put_user(kbuf->sig[0] >> 32, &ubuf->sig[1]);
268 err |= __put_user (kbuf->sig[0] & 0xffffffff, &ubuf->sig[0]); 268 err |= __put_user(kbuf->sig[0] & 0xffffffff, &ubuf->sig[0]);
269 } 269 }
270 270
271 return err; 271 return err;
@@ -283,12 +283,12 @@ static inline int get_sigset(sigset_t *kbuf, const compat_sigset_t __user *ubuf)
283 default: 283 default:
284 __get_sigset_unknown_nsig(); 284 __get_sigset_unknown_nsig();
285 case 2: 285 case 2:
286 err |= __get_user (sig[3], &ubuf->sig[3]); 286 err |= __get_user(sig[3], &ubuf->sig[3]);
287 err |= __get_user (sig[2], &ubuf->sig[2]); 287 err |= __get_user(sig[2], &ubuf->sig[2]);
288 kbuf->sig[1] = sig[2] | (sig[3] << 32); 288 kbuf->sig[1] = sig[2] | (sig[3] << 32);
289 case 1: 289 case 1:
290 err |= __get_user (sig[1], &ubuf->sig[1]); 290 err |= __get_user(sig[1], &ubuf->sig[1]);
291 err |= __get_user (sig[0], &ubuf->sig[0]); 291 err |= __get_user(sig[0], &ubuf->sig[0]);
292 kbuf->sig[0] = sig[0] | (sig[1] << 32); 292 kbuf->sig[0] = sig[0] | (sig[1] << 32);
293 } 293 }
294 294
@@ -412,10 +412,10 @@ asmlinkage int sys32_sigaltstack(nabi_no_regargs struct pt_regs regs)
412 return -EFAULT; 412 return -EFAULT;
413 } 413 }
414 414
415 set_fs (KERNEL_DS); 415 set_fs(KERNEL_DS);
416 ret = do_sigaltstack(uss ? (stack_t __user *)&kss : NULL, 416 ret = do_sigaltstack(uss ? (stack_t __user *)&kss : NULL,
417 uoss ? (stack_t __user *)&koss : NULL, usp); 417 uoss ? (stack_t __user *)&koss : NULL, usp);
418 set_fs (old_fs); 418 set_fs(old_fs);
419 419
420 if (!ret && uoss) { 420 if (!ret && uoss) {
421 if (!access_ok(VERIFY_WRITE, uoss, sizeof(*uoss))) 421 if (!access_ok(VERIFY_WRITE, uoss, sizeof(*uoss)))
@@ -559,9 +559,9 @@ asmlinkage void sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
559 /* It is more difficult to avoid calling this function than to 559 /* It is more difficult to avoid calling this function than to
560 call it and ignore errors. */ 560 call it and ignore errors. */
561 old_fs = get_fs(); 561 old_fs = get_fs();
562 set_fs (KERNEL_DS); 562 set_fs(KERNEL_DS);
563 do_sigaltstack((stack_t __user *)&st, NULL, regs.regs[29]); 563 do_sigaltstack((stack_t __user *)&st, NULL, regs.regs[29]);
564 set_fs (old_fs); 564 set_fs(old_fs);
565 565
566 /* 566 /*
567 * Don't let your children do this ... 567 * Don't let your children do this ...
@@ -746,11 +746,11 @@ asmlinkage int sys32_rt_sigprocmask(int how, compat_sigset_t __user *set,
746 if (set && get_sigset(&new_set, set)) 746 if (set && get_sigset(&new_set, set))
747 return -EFAULT; 747 return -EFAULT;
748 748
749 set_fs (KERNEL_DS); 749 set_fs(KERNEL_DS);
750 ret = sys_rt_sigprocmask(how, set ? (sigset_t __user *)&new_set : NULL, 750 ret = sys_rt_sigprocmask(how, set ? (sigset_t __user *)&new_set : NULL,
751 oset ? (sigset_t __user *)&old_set : NULL, 751 oset ? (sigset_t __user *)&old_set : NULL,
752 sigsetsize); 752 sigsetsize);
753 set_fs (old_fs); 753 set_fs(old_fs);
754 754
755 if (!ret && oset && put_sigset(&old_set, oset)) 755 if (!ret && oset && put_sigset(&old_set, oset))
756 return -EFAULT; 756 return -EFAULT;
@@ -765,9 +765,9 @@ asmlinkage int sys32_rt_sigpending(compat_sigset_t __user *uset,
765 sigset_t set; 765 sigset_t set;
766 mm_segment_t old_fs = get_fs(); 766 mm_segment_t old_fs = get_fs();
767 767
768 set_fs (KERNEL_DS); 768 set_fs(KERNEL_DS);
769 ret = sys_rt_sigpending((sigset_t __user *)&set, sigsetsize); 769 ret = sys_rt_sigpending((sigset_t __user *)&set, sigsetsize);
770 set_fs (old_fs); 770 set_fs(old_fs);
771 771
772 if (!ret && put_sigset(&set, uset)) 772 if (!ret && put_sigset(&set, uset))
773 return -EFAULT; 773 return -EFAULT;
@@ -781,12 +781,12 @@ asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *
781 int ret; 781 int ret;
782 mm_segment_t old_fs = get_fs(); 782 mm_segment_t old_fs = get_fs();
783 783
784 if (copy_from_user (&info, uinfo, 3*sizeof(int)) || 784 if (copy_from_user(&info, uinfo, 3*sizeof(int)) ||
785 copy_from_user (info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE)) 785 copy_from_user(info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE))
786 return -EFAULT; 786 return -EFAULT;
787 set_fs (KERNEL_DS); 787 set_fs(KERNEL_DS);
788 ret = sys_rt_sigqueueinfo(pid, sig, (siginfo_t __user *)&info); 788 ret = sys_rt_sigqueueinfo(pid, sig, (siginfo_t __user *)&info);
789 set_fs (old_fs); 789 set_fs(old_fs);
790 return ret; 790 return ret;
791} 791}
792 792
@@ -801,10 +801,10 @@ sys32_waitid(int which, compat_pid_t pid,
801 mm_segment_t old_fs = get_fs(); 801 mm_segment_t old_fs = get_fs();
802 802
803 info.si_signo = 0; 803 info.si_signo = 0;
804 set_fs (KERNEL_DS); 804 set_fs(KERNEL_DS);
805 ret = sys_waitid(which, pid, (siginfo_t __user *) &info, options, 805 ret = sys_waitid(which, pid, (siginfo_t __user *) &info, options,
806 uru ? (struct rusage __user *) &ru : NULL); 806 uru ? (struct rusage __user *) &ru : NULL);
807 set_fs (old_fs); 807 set_fs(old_fs);
808 808
809 if (ret < 0 || info.si_signo == 0) 809 if (ret < 0 || info.si_signo == 0)
810 return ret; 810 return ret;
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index eb7e05926ebe..bb277e82d421 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -88,7 +88,7 @@ struct rt_sigframe_n32 {
88 88
89#endif /* !ICACHE_REFILLS_WORKAROUND_WAR */ 89#endif /* !ICACHE_REFILLS_WORKAROUND_WAR */
90 90
91extern void sigset_from_compat (sigset_t *set, compat_sigset_t *compat); 91extern void sigset_from_compat(sigset_t *set, compat_sigset_t *compat);
92 92
93asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) 93asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
94{ 94{
@@ -105,7 +105,7 @@ asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
105 unewset = (compat_sigset_t __user *) regs.regs[4]; 105 unewset = (compat_sigset_t __user *) regs.regs[4];
106 if (copy_from_user(&uset, unewset, sizeof(uset))) 106 if (copy_from_user(&uset, unewset, sizeof(uset)))
107 return -EFAULT; 107 return -EFAULT;
108 sigset_from_compat (&newset, &uset); 108 sigset_from_compat(&newset, &uset);
109 sigdelsetmask(&newset, ~_BLOCKABLE); 109 sigdelsetmask(&newset, ~_BLOCKABLE);
110 110
111 spin_lock_irq(&current->sighand->siglock); 111 spin_lock_irq(&current->sighand->siglock);
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 05dcce416325..94e210cc6cb6 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -353,7 +353,7 @@ void core_send_ipi(int cpu, unsigned int action)
353 unsigned long flags; 353 unsigned long flags;
354 int vpflags; 354 int vpflags;
355 355
356 local_irq_save (flags); 356 local_irq_save(flags);
357 357
358 vpflags = dvpe(); /* cant access the other CPU's registers whilst MVPE enabled */ 358 vpflags = dvpe(); /* cant access the other CPU's registers whilst MVPE enabled */
359 359
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 4d1ac9692dcd..770182887c5b 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -372,7 +372,7 @@ void mipsmt_prepare_cpus(void)
372 cpu++; 372 cpu++;
373 373
374 /* Report on boot-time options */ 374 /* Report on boot-time options */
375 mips_mt_set_cpuoptions (); 375 mips_mt_set_cpuoptions();
376 if (vpelimit > 0) 376 if (vpelimit > 0)
377 printk("Limit of %d VPEs set\n", vpelimit); 377 printk("Limit of %d VPEs set\n", vpelimit);
378 if (tclimit > 0) 378 if (tclimit > 0)
@@ -572,7 +572,7 @@ void smtc_init_secondary(void)
572 if (((read_c0_tcbind() & TCBIND_CURTC) != 0) && 572 if (((read_c0_tcbind() & TCBIND_CURTC) != 0) &&
573 ((read_c0_tcbind() & TCBIND_CURVPE) 573 ((read_c0_tcbind() & TCBIND_CURVPE)
574 != cpu_data[smp_processor_id() - 1].vpe_id)){ 574 != cpu_data[smp_processor_id() - 1].vpe_id)){
575 write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ); 575 write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);
576 } 576 }
577 577
578 local_irq_enable(); 578 local_irq_enable();
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 7c800ec3ff55..ef2c6360d052 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -314,8 +314,8 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
314 * 314 *
315 * This is really horribly ugly. 315 * This is really horribly ugly.
316 */ 316 */
317asmlinkage int sys_ipc (unsigned int call, int first, int second, 317asmlinkage int sys_ipc(unsigned int call, int first, int second,
318 unsigned long third, void __user *ptr, long fifth) 318 unsigned long third, void __user *ptr, long fifth)
319{ 319{
320 int version, ret; 320 int version, ret;
321 321
@@ -324,26 +324,26 @@ asmlinkage int sys_ipc (unsigned int call, int first, int second,
324 324
325 switch (call) { 325 switch (call) {
326 case SEMOP: 326 case SEMOP:
327 return sys_semtimedop (first, (struct sembuf __user *)ptr, 327 return sys_semtimedop(first, (struct sembuf __user *)ptr,
328 second, NULL); 328 second, NULL);
329 case SEMTIMEDOP: 329 case SEMTIMEDOP:
330 return sys_semtimedop (first, (struct sembuf __user *)ptr, 330 return sys_semtimedop(first, (struct sembuf __user *)ptr,
331 second, 331 second,
332 (const struct timespec __user *)fifth); 332 (const struct timespec __user *)fifth);
333 case SEMGET: 333 case SEMGET:
334 return sys_semget (first, second, third); 334 return sys_semget(first, second, third);
335 case SEMCTL: { 335 case SEMCTL: {
336 union semun fourth; 336 union semun fourth;
337 if (!ptr) 337 if (!ptr)
338 return -EINVAL; 338 return -EINVAL;
339 if (get_user(fourth.__pad, (void __user *__user *) ptr)) 339 if (get_user(fourth.__pad, (void __user *__user *) ptr))
340 return -EFAULT; 340 return -EFAULT;
341 return sys_semctl (first, second, third, fourth); 341 return sys_semctl(first, second, third, fourth);
342 } 342 }
343 343
344 case MSGSND: 344 case MSGSND:
345 return sys_msgsnd (first, (struct msgbuf __user *) ptr, 345 return sys_msgsnd(first, (struct msgbuf __user *) ptr,
346 second, third); 346 second, third);
347 case MSGRCV: 347 case MSGRCV:
348 switch (version) { 348 switch (version) {
349 case 0: { 349 case 0: {
@@ -353,45 +353,45 @@ asmlinkage int sys_ipc (unsigned int call, int first, int second,
353 353
354 if (copy_from_user(&tmp, 354 if (copy_from_user(&tmp,
355 (struct ipc_kludge __user *) ptr, 355 (struct ipc_kludge __user *) ptr,
356 sizeof (tmp))) 356 sizeof(tmp)))
357 return -EFAULT; 357 return -EFAULT;
358 return sys_msgrcv (first, tmp.msgp, second, 358 return sys_msgrcv(first, tmp.msgp, second,
359 tmp.msgtyp, third); 359 tmp.msgtyp, third);
360 } 360 }
361 default: 361 default:
362 return sys_msgrcv (first, 362 return sys_msgrcv(first,
363 (struct msgbuf __user *) ptr, 363 (struct msgbuf __user *) ptr,
364 second, fifth, third); 364 second, fifth, third);
365 } 365 }
366 case MSGGET: 366 case MSGGET:
367 return sys_msgget ((key_t) first, second); 367 return sys_msgget((key_t) first, second);
368 case MSGCTL: 368 case MSGCTL:
369 return sys_msgctl (first, second, 369 return sys_msgctl(first, second,
370 (struct msqid_ds __user *) ptr); 370 (struct msqid_ds __user *) ptr);
371 371
372 case SHMAT: 372 case SHMAT:
373 switch (version) { 373 switch (version) {
374 default: { 374 default: {
375 unsigned long raddr; 375 unsigned long raddr;
376 ret = do_shmat (first, (char __user *) ptr, second, 376 ret = do_shmat(first, (char __user *) ptr, second,
377 &raddr); 377 &raddr);
378 if (ret) 378 if (ret)
379 return ret; 379 return ret;
380 return put_user (raddr, (unsigned long __user *) third); 380 return put_user(raddr, (unsigned long __user *) third);
381 } 381 }
382 case 1: /* iBCS2 emulator entry point */ 382 case 1: /* iBCS2 emulator entry point */
383 if (!segment_eq(get_fs(), get_ds())) 383 if (!segment_eq(get_fs(), get_ds()))
384 return -EINVAL; 384 return -EINVAL;
385 return do_shmat (first, (char __user *) ptr, second, 385 return do_shmat(first, (char __user *) ptr, second,
386 (unsigned long *) third); 386 (unsigned long *) third);
387 } 387 }
388 case SHMDT: 388 case SHMDT:
389 return sys_shmdt ((char __user *)ptr); 389 return sys_shmdt((char __user *)ptr);
390 case SHMGET: 390 case SHMGET:
391 return sys_shmget (first, second, third); 391 return sys_shmget(first, second, third);
392 case SHMCTL: 392 case SHMCTL:
393 return sys_shmctl (first, second, 393 return sys_shmctl(first, second,
394 (struct shmid_ds __user *) ptr); 394 (struct shmid_ds __user *) ptr);
395 default: 395 default:
396 return -ENOSYS; 396 return -ENOSYS;
397 } 397 }
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
index 93a148486f88..b50239574c95 100644
--- a/arch/mips/kernel/sysirix.c
+++ b/arch/mips/kernel/sysirix.c
@@ -486,10 +486,10 @@ asmlinkage int irix_syssgi(struct pt_regs *regs)
486 486
487 switch (arg1) { 487 switch (arg1) {
488 case SGI_INV_SIZEOF: 488 case SGI_INV_SIZEOF:
489 retval = sizeof (inventory_t); 489 retval = sizeof(inventory_t);
490 break; 490 break;
491 case SGI_INV_READ: 491 case SGI_INV_READ:
492 retval = dump_inventory_to_user (buffer, count); 492 retval = dump_inventory_to_user(buffer, count);
493 break; 493 break;
494 default: 494 default:
495 retval = -EINVAL; 495 retval = -EINVAL;
@@ -1042,9 +1042,9 @@ asmlinkage unsigned long irix_mmap32(unsigned long addr, size_t len, int prot,
1042 long max_size = offset + len; 1042 long max_size = offset + len;
1043 1043
1044 if (max_size > file->f_path.dentry->d_inode->i_size) { 1044 if (max_size > file->f_path.dentry->d_inode->i_size) {
1045 old_pos = sys_lseek (fd, max_size - 1, 0); 1045 old_pos = sys_lseek(fd, max_size - 1, 0);
1046 sys_write (fd, (void __user *) "", 1); 1046 sys_write(fd, (void __user *) "", 1);
1047 sys_lseek (fd, old_pos, 0); 1047 sys_lseek(fd, old_pos, 0);
1048 } 1048 }
1049 } 1049 }
1050 } 1050 }
@@ -1176,7 +1176,7 @@ static int irix_xstat32_xlate(struct kstat *stat, void __user *ubuf)
1176 ub.st_ctime1 = stat->atime.tv_nsec; 1176 ub.st_ctime1 = stat->atime.tv_nsec;
1177 ub.st_blksize = stat->blksize; 1177 ub.st_blksize = stat->blksize;
1178 ub.st_blocks = stat->blocks; 1178 ub.st_blocks = stat->blocks;
1179 strcpy (ub.st_fstype, "efs"); 1179 strcpy(ub.st_fstype, "efs");
1180 1180
1181 return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0; 1181 return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0;
1182} 1182}
@@ -1208,7 +1208,7 @@ static int irix_xstat64_xlate(struct kstat *stat, void __user *ubuf)
1208 ks.st_nlink = (u32) stat->nlink; 1208 ks.st_nlink = (u32) stat->nlink;
1209 ks.st_uid = (s32) stat->uid; 1209 ks.st_uid = (s32) stat->uid;
1210 ks.st_gid = (s32) stat->gid; 1210 ks.st_gid = (s32) stat->gid;
1211 ks.st_rdev = sysv_encode_dev (stat->rdev); 1211 ks.st_rdev = sysv_encode_dev(stat->rdev);
1212 ks.st_pad2[0] = ks.st_pad2[1] = 0; 1212 ks.st_pad2[0] = ks.st_pad2[1] = 0;
1213 ks.st_size = (long long) stat->size; 1213 ks.st_size = (long long) stat->size;
1214 ks.st_pad3 = 0; 1214 ks.st_pad3 = 0;
@@ -1527,9 +1527,9 @@ asmlinkage int irix_mmap64(struct pt_regs *regs)
1527 long max_size = off2 + len; 1527 long max_size = off2 + len;
1528 1528
1529 if (max_size > file->f_path.dentry->d_inode->i_size) { 1529 if (max_size > file->f_path.dentry->d_inode->i_size) {
1530 old_pos = sys_lseek (fd, max_size - 1, 0); 1530 old_pos = sys_lseek(fd, max_size - 1, 0);
1531 sys_write (fd, (void __user *) "", 1); 1531 sys_write(fd, (void __user *) "", 1);
1532 sys_lseek (fd, old_pos, 0); 1532 sys_lseek(fd, old_pos, 0);
1533 } 1533 }
1534 } 1534 }
1535 } 1535 }
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 369a5f9ad268..5892491b40eb 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -149,7 +149,7 @@ EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
149 * Possibly handle a performance counter interrupt. 149 * Possibly handle a performance counter interrupt.
150 * Return true if the timer interrupt should not be checked 150 * Return true if the timer interrupt should not be checked
151 */ 151 */
152static inline int handle_perf_irq (int r2) 152static inline int handle_perf_irq(int r2)
153{ 153{
154 /* 154 /*
155 * The performance counter overflow interrupt may be shared with the 155 * The performance counter overflow interrupt may be shared with the
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index ac762d8d802d..b3e408b54c24 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -627,7 +627,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
627 lose_fpu(1); 627 lose_fpu(1);
628 628
629 /* Run the emulator */ 629 /* Run the emulator */
630 sig = fpu_emulator_cop1Handler (regs, &current->thread.fpu, 1); 630 sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 1);
631 631
632 /* 632 /*
633 * We can't allow the emulated instruction to leave any of 633 * We can't allow the emulated instruction to leave any of
@@ -1165,11 +1165,11 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
1165 1165
1166 if (cpu_has_veic) { 1166 if (cpu_has_veic) {
1167 if (board_bind_eic_interrupt) 1167 if (board_bind_eic_interrupt)
1168 board_bind_eic_interrupt (n, srs); 1168 board_bind_eic_interrupt(n, srs);
1169 } else if (cpu_has_vint) { 1169 } else if (cpu_has_vint) {
1170 /* SRSMap is only defined if shadow sets are implemented */ 1170 /* SRSMap is only defined if shadow sets are implemented */
1171 if (mips_srs_max() > 1) 1171 if (mips_srs_max() > 1)
1172 change_c0_srsmap (0xf << n*4, srs << n*4); 1172 change_c0_srsmap(0xf << n*4, srs << n*4);
1173 } 1173 }
1174 1174
1175 if (srs == 0) { 1175 if (srs == 0) {
@@ -1198,10 +1198,10 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
1198 * Sigh... panicing won't help as the console 1198 * Sigh... panicing won't help as the console
1199 * is probably not configured :( 1199 * is probably not configured :(
1200 */ 1200 */
1201 panic ("VECTORSPACING too small"); 1201 panic("VECTORSPACING too small");
1202 } 1202 }
1203 1203
1204 memcpy (b, &except_vec_vi, handler_len); 1204 memcpy(b, &except_vec_vi, handler_len);
1205#ifdef CONFIG_MIPS_MT_SMTC 1205#ifdef CONFIG_MIPS_MT_SMTC
1206 BUG_ON(n > 7); /* Vector index %d exceeds SMTC maximum. */ 1206 BUG_ON(n > 7); /* Vector index %d exceeds SMTC maximum. */
1207 1207
@@ -1370,9 +1370,9 @@ void __init per_cpu_trap_init(void)
1370#endif /* CONFIG_MIPS_MT_SMTC */ 1370#endif /* CONFIG_MIPS_MT_SMTC */
1371 1371
1372 if (cpu_has_veic || cpu_has_vint) { 1372 if (cpu_has_veic || cpu_has_vint) {
1373 write_c0_ebase (ebase); 1373 write_c0_ebase(ebase);
1374 /* Setting vector spacing enables EI/VI mode */ 1374 /* Setting vector spacing enables EI/VI mode */
1375 change_c0_intctl (0x3e0, VECTORSPACING); 1375 change_c0_intctl(0x3e0, VECTORSPACING);
1376 } 1376 }
1377 if (cpu_has_divec) { 1377 if (cpu_has_divec) {
1378 if (cpu_has_mipsmt) { 1378 if (cpu_has_mipsmt) {
@@ -1390,8 +1390,8 @@ void __init per_cpu_trap_init(void)
1390 * o read IntCtl.IPPCI to determine the performance counter interrupt 1390 * o read IntCtl.IPPCI to determine the performance counter interrupt
1391 */ 1391 */
1392 if (cpu_has_mips_r2) { 1392 if (cpu_has_mips_r2) {
1393 cp0_compare_irq = (read_c0_intctl () >> 29) & 7; 1393 cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
1394 cp0_perfcount_irq = (read_c0_intctl () >> 26) & 7; 1394 cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
1395 if (cp0_perfcount_irq == cp0_compare_irq) 1395 if (cp0_perfcount_irq == cp0_compare_irq)
1396 cp0_perfcount_irq = -1; 1396 cp0_perfcount_irq = -1;
1397 } else { 1397 } else {
@@ -1429,7 +1429,7 @@ void __init per_cpu_trap_init(void)
1429} 1429}
1430 1430
1431/* Install CPU exception handler */ 1431/* Install CPU exception handler */
1432void __init set_handler (unsigned long offset, void *addr, unsigned long size) 1432void __init set_handler(unsigned long offset, void *addr, unsigned long size)
1433{ 1433{
1434 memcpy((void *)(ebase + offset), addr, size); 1434 memcpy((void *)(ebase + offset), addr, size);
1435 flush_icache_range(ebase + offset, ebase + offset + size); 1435 flush_icache_range(ebase + offset, ebase + offset + size);
@@ -1439,7 +1439,7 @@ static char panic_null_cerr[] __initdata =
1439 "Trying to set NULL cache error exception handler"; 1439 "Trying to set NULL cache error exception handler";
1440 1440
1441/* Install uncached CPU exception handler */ 1441/* Install uncached CPU exception handler */
1442void __init set_uncached_handler (unsigned long offset, void *addr, unsigned long size) 1442void __init set_uncached_handler(unsigned long offset, void *addr, unsigned long size)
1443{ 1443{
1444#ifdef CONFIG_32BIT 1444#ifdef CONFIG_32BIT
1445 unsigned long uncached_ebase = KSEG1ADDR(ebase); 1445 unsigned long uncached_ebase = KSEG1ADDR(ebase);
@@ -1470,7 +1470,7 @@ void __init trap_init(void)
1470 unsigned long i; 1470 unsigned long i;
1471 1471
1472 if (cpu_has_veic || cpu_has_vint) 1472 if (cpu_has_veic || cpu_has_vint)
1473 ebase = (unsigned long) alloc_bootmem_low_pages (0x200 + VECTORSPACING*64); 1473 ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
1474 else 1474 else
1475 ebase = CAC_BASE; 1475 ebase = CAC_BASE;
1476 1476
@@ -1496,7 +1496,7 @@ void __init trap_init(void)
1496 * destination. 1496 * destination.
1497 */ 1497 */
1498 if (cpu_has_ejtag && board_ejtag_handler_setup) 1498 if (cpu_has_ejtag && board_ejtag_handler_setup)
1499 board_ejtag_handler_setup (); 1499 board_ejtag_handler_setup();
1500 1500
1501 /* 1501 /*
1502 * Only some CPUs have the watch exceptions. 1502 * Only some CPUs have the watch exceptions.
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index d34b1fb3665d..c327b21bca81 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -481,7 +481,7 @@ fault:
481 if (fixup_exception(regs)) 481 if (fixup_exception(regs))
482 return; 482 return;
483 483
484 die_if_kernel ("Unhandled kernel unaligned access", regs); 484 die_if_kernel("Unhandled kernel unaligned access", regs);
485 send_sig(SIGSEGV, current, 1); 485 send_sig(SIGSEGV, current, 1);
486 486
487 return; 487 return;
diff --git a/arch/mips/lib/ucmpdi2.c b/arch/mips/lib/ucmpdi2.c
index e2ff6072b5a3..b33d8569bcb0 100644
--- a/arch/mips/lib/ucmpdi2.c
+++ b/arch/mips/lib/ucmpdi2.c
@@ -2,7 +2,7 @@
2 2
3#include "libgcc.h" 3#include "libgcc.h"
4 4
5word_type __ucmpdi2 (unsigned long long a, unsigned long long b) 5word_type __ucmpdi2(unsigned long long a, unsigned long long b)
6{ 6{
7 const DWunion au = {.ll = a}; 7 const DWunion au = {.ll = a};
8 const DWunion bu = {.ll = b}; 8 const DWunion bu = {.ll = b};
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 17419e11ecad..c44e9cc2b19c 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -549,16 +549,16 @@ static const unsigned char cmptab[8] = {
549 */ 549 */
550 550
551#define DEF3OP(name, p, f1, f2, f3) \ 551#define DEF3OP(name, p, f1, f2, f3) \
552static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \ 552static ieee754##p fpemu_##p##_##name(ieee754##p r, ieee754##p s, \
553 ieee754##p t) \ 553 ieee754##p t) \
554{ \ 554{ \
555 struct _ieee754_csr ieee754_csr_save; \ 555 struct _ieee754_csr ieee754_csr_save; \
556 s = f1 (s, t); \ 556 s = f1(s, t); \
557 ieee754_csr_save = ieee754_csr; \ 557 ieee754_csr_save = ieee754_csr; \
558 s = f2 (s, r); \ 558 s = f2(s, r); \
559 ieee754_csr_save.cx |= ieee754_csr.cx; \ 559 ieee754_csr_save.cx |= ieee754_csr.cx; \
560 ieee754_csr_save.sx |= ieee754_csr.sx; \ 560 ieee754_csr_save.sx |= ieee754_csr.sx; \
561 s = f3 (s); \ 561 s = f3(s); \
562 ieee754_csr.cx |= ieee754_csr_save.cx; \ 562 ieee754_csr.cx |= ieee754_csr_save.cx; \
563 ieee754_csr.sx |= ieee754_csr_save.sx; \ 563 ieee754_csr.sx |= ieee754_csr_save.sx; \
564 return s; \ 564 return s; \
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index 3c692abc2553..6fb29c3ff62d 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -112,7 +112,7 @@ static inline void atlas_hw0_irqdispatch(void)
112 112
113static inline int clz(unsigned long x) 113static inline int clz(unsigned long x)
114{ 114{
115 __asm__ ( 115 __asm__(
116 " .set push \n" 116 " .set push \n"
117 " .set mips32 \n" 117 " .set mips32 \n"
118 " clz %0, %1 \n" 118 " clz %0, %1 \n"
@@ -194,7 +194,7 @@ asmlinkage void plat_irq_dispatch(void)
194 spurious_interrupt(); 194 spurious_interrupt();
195} 195}
196 196
197static inline void init_atlas_irqs (int base) 197static inline void init_atlas_irqs(int base)
198{ 198{
199 int i; 199 int i;
200 200
@@ -249,21 +249,21 @@ void __init arch_init_irq(void)
249 case MIPS_REVISION_CORID_CORE_24K: 249 case MIPS_REVISION_CORID_CORE_24K:
250 case MIPS_REVISION_CORID_CORE_EMUL_MSC: 250 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
251 if (cpu_has_veic) 251 if (cpu_has_veic)
252 init_msc_irqs (MSC01E_INT_BASE, MSC01E_INT_BASE, 252 init_msc_irqs(MSC01E_INT_BASE, MSC01E_INT_BASE,
253 msc_eicirqmap, msc_nr_eicirqs); 253 msc_eicirqmap, msc_nr_eicirqs);
254 else 254 else
255 init_msc_irqs (MSC01E_INT_BASE, MSC01C_INT_BASE, 255 init_msc_irqs(MSC01E_INT_BASE, MSC01C_INT_BASE,
256 msc_irqmap, msc_nr_irqs); 256 msc_irqmap, msc_nr_irqs);
257 } 257 }
258 258
259 if (cpu_has_veic) { 259 if (cpu_has_veic) {
260 set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch); 260 set_vi_handler(MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
261 setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq); 261 setup_irq(MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
262 } else if (cpu_has_vint) { 262 } else if (cpu_has_vint) {
263 set_vi_handler (MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch); 263 set_vi_handler(MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
264#ifdef CONFIG_MIPS_MT_SMTC 264#ifdef CONFIG_MIPS_MT_SMTC
265 setup_irq_smtc (MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, 265 setup_irq_smtc(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS,
266 &atlasirq, (0x100 << MIPSCPU_INT_ATLAS)); 266 &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
267#else /* Not SMTC */ 267#else /* Not SMTC */
268 setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq); 268 setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
269#endif /* CONFIG_MIPS_MT_SMTC */ 269#endif /* CONFIG_MIPS_MT_SMTC */
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
index 86bfc0548164..e405d112a067 100644
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ b/arch/mips/mips-boards/atlas/atlas_setup.c
@@ -55,7 +55,7 @@ void __init plat_mem_setup(void)
55 55
56 ioport_resource.end = 0x7fffffff; 56 ioport_resource.end = 0x7fffffff;
57 57
58 serial_init (); 58 serial_init();
59 59
60#ifdef CONFIG_KGDB 60#ifdef CONFIG_KGDB
61 kgdb_config(); 61 kgdb_config();
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index e2c7147fedf7..30f1f54cb68b 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -166,15 +166,15 @@ static void __init console_config(void)
166 bits = '8'; 166 bits = '8';
167 if (flow == '\0') 167 if (flow == '\0')
168 flow = 'r'; 168 flow = 'r';
169 sprintf (console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow); 169 sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
170 strcat (prom_getcmdline(), console_string); 170 strcat(prom_getcmdline(), console_string);
171 pr_info("Config serial console:%s\n", console_string); 171 pr_info("Config serial console:%s\n", console_string);
172 } 172 }
173} 173}
174#endif 174#endif
175 175
176#ifdef CONFIG_KGDB 176#ifdef CONFIG_KGDB
177void __init kgdb_config (void) 177void __init kgdb_config(void)
178{ 178{
179 extern int (*generic_putDebugChar)(char); 179 extern int (*generic_putDebugChar)(char);
180 extern char (*generic_getDebugChar)(void); 180 extern char (*generic_getDebugChar)(void);
@@ -218,7 +218,7 @@ void __init kgdb_config (void)
218 { 218 {
219 char *s; 219 char *s;
220 for (s = "Please connect GDB to this port\r\n"; *s; ) 220 for (s = "Please connect GDB to this port\r\n"; *s; )
221 generic_putDebugChar (*s++); 221 generic_putDebugChar(*s++);
222 } 222 }
223 223
224 /* Breakpoint is invoked after interrupts are initialised */ 224 /* Breakpoint is invoked after interrupts are initialised */
@@ -226,7 +226,7 @@ void __init kgdb_config (void)
226} 226}
227#endif 227#endif
228 228
229void __init mips_nmi_setup (void) 229void __init mips_nmi_setup(void)
230{ 230{
231 void *base; 231 void *base;
232 extern char except_vec_nmi; 232 extern char except_vec_nmi;
@@ -238,7 +238,7 @@ void __init mips_nmi_setup (void)
238 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); 238 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
239} 239}
240 240
241void __init mips_ejtag_setup (void) 241void __init mips_ejtag_setup(void)
242{ 242{
243 void *base; 243 void *base;
244 extern char except_vec_ejtag_debug; 244 extern char except_vec_ejtag_debug;
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index ae39953da2c4..dc272c188233 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -125,7 +125,7 @@ struct prom_pmemblock * __init prom_getmdesc(void)
125 return &mdesc[0]; 125 return &mdesc[0];
126} 126}
127 127
128static int __init prom_memtype_classify (unsigned int type) 128static int __init prom_memtype_classify(unsigned int type)
129{ 129{
130 switch (type) { 130 switch (type) {
131 case yamon_free: 131 case yamon_free:
@@ -158,7 +158,7 @@ void __init prom_meminit(void)
158 long type; 158 long type;
159 unsigned long base, size; 159 unsigned long base, size;
160 160
161 type = prom_memtype_classify (p->type); 161 type = prom_memtype_classify(p->type);
162 base = p->base; 162 base = p->base;
163 size = p->size; 163 size = p->size;
164 164
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index c9852206890a..b9743190609a 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -239,5 +239,5 @@ void __init mips_pcibios_init(void)
239 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */ 239 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */
240 ioport_resource.end = controller->io_resource->end; 240 ioport_resource.end = controller->io_resource->end;
241 241
242 register_pci_controller (controller); 242 register_pci_controller(controller);
243} 243}
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 4fab3b2e8736..1d00b778ff1e 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -134,7 +134,7 @@ void __init plat_time_init(void)
134 /* Set Data mode - binary. */ 134 /* Set Data mode - binary. */
135 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); 135 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
136 136
137 est_freq = estimate_cpu_frequency (); 137 est_freq = estimate_cpu_frequency();
138 138
139 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, 139 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
140 (est_freq%1000000)*100/1000000); 140 (est_freq%1000000)*100/1000000);
@@ -166,7 +166,7 @@ void __init plat_perf_setup(void)
166 166
167#ifdef MSC01E_INT_BASE 167#ifdef MSC01E_INT_BASE
168 if (cpu_has_veic) { 168 if (cpu_has_veic) {
169 set_vi_handler (MSC01E_INT_PERFCTR, mips_perf_dispatch); 169 set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
170 cp0_perfcount_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR; 170 cp0_perfcount_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
171 } else 171 } else
172#endif 172#endif
@@ -183,7 +183,7 @@ void __init plat_timer_setup(struct irqaction *irq)
183{ 183{
184#ifdef MSC01E_INT_BASE 184#ifdef MSC01E_INT_BASE
185 if (cpu_has_veic) { 185 if (cpu_has_veic) {
186 set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch); 186 set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
187 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; 187 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
188 } 188 }
189 else 189 else
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index b73f21823c5e..8232392750a8 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -178,7 +178,7 @@ static void corehi_irqdispatch(void)
178 178
179static inline int clz(unsigned long x) 179static inline int clz(unsigned long x)
180{ 180{
181 __asm__ ( 181 __asm__(
182 " .set push \n" 182 " .set push \n"
183 " .set mips32 \n" 183 " .set mips32 \n"
184 " clz %0, %1 \n" 184 " clz %0, %1 \n"
@@ -303,32 +303,32 @@ void __init arch_init_irq(void)
303 case MIPS_REVISION_SCON_SOCIT: 303 case MIPS_REVISION_SCON_SOCIT:
304 case MIPS_REVISION_SCON_ROCIT: 304 case MIPS_REVISION_SCON_ROCIT:
305 if (cpu_has_veic) 305 if (cpu_has_veic)
306 init_msc_irqs (MIPS_MSC01_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs); 306 init_msc_irqs(MIPS_MSC01_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
307 else 307 else
308 init_msc_irqs (MIPS_MSC01_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs); 308 init_msc_irqs(MIPS_MSC01_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs);
309 break; 309 break;
310 310
311 case MIPS_REVISION_SCON_SOCITSC: 311 case MIPS_REVISION_SCON_SOCITSC:
312 case MIPS_REVISION_SCON_SOCITSCP: 312 case MIPS_REVISION_SCON_SOCITSCP:
313 if (cpu_has_veic) 313 if (cpu_has_veic)
314 init_msc_irqs (MIPS_SOCITSC_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs); 314 init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
315 else 315 else
316 init_msc_irqs (MIPS_SOCITSC_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs); 316 init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs);
317 } 317 }
318 318
319 if (cpu_has_veic) { 319 if (cpu_has_veic) {
320 set_vi_handler (MSC01E_INT_I8259A, malta_hw0_irqdispatch); 320 set_vi_handler(MSC01E_INT_I8259A, malta_hw0_irqdispatch);
321 set_vi_handler (MSC01E_INT_COREHI, corehi_irqdispatch); 321 set_vi_handler(MSC01E_INT_COREHI, corehi_irqdispatch);
322 setup_irq (MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq); 322 setup_irq(MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq);
323 setup_irq (MSC01E_INT_BASE+MSC01E_INT_COREHI, &corehi_irqaction); 323 setup_irq(MSC01E_INT_BASE+MSC01E_INT_COREHI, &corehi_irqaction);
324 } 324 }
325 else if (cpu_has_vint) { 325 else if (cpu_has_vint) {
326 set_vi_handler (MIPSCPU_INT_I8259A, malta_hw0_irqdispatch); 326 set_vi_handler(MIPSCPU_INT_I8259A, malta_hw0_irqdispatch);
327 set_vi_handler (MIPSCPU_INT_COREHI, corehi_irqdispatch); 327 set_vi_handler(MIPSCPU_INT_COREHI, corehi_irqdispatch);
328#ifdef CONFIG_MIPS_MT_SMTC 328#ifdef CONFIG_MIPS_MT_SMTC
329 setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq, 329 setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq,
330 (0x100 << MIPSCPU_INT_I8259A)); 330 (0x100 << MIPSCPU_INT_I8259A));
331 setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, 331 setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
332 &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI)); 332 &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI));
333 /* 333 /*
334 * Temporary hack to ensure that the subsidiary device 334 * Temporary hack to ensure that the subsidiary device
@@ -343,12 +343,12 @@ void __init arch_init_irq(void)
343 irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A); 343 irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A);
344 } 344 }
345#else /* Not SMTC */ 345#else /* Not SMTC */
346 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq); 346 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
347 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction); 347 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
348#endif /* CONFIG_MIPS_MT_SMTC */ 348#endif /* CONFIG_MIPS_MT_SMTC */
349 } 349 }
350 else { 350 else {
351 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq); 351 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
352 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction); 352 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
353 } 353 }
354} 354}
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index a5a5a43a1984..e243d5efcb38 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -99,7 +99,7 @@ void __init plat_mem_setup(void)
99 enable_dma(4); 99 enable_dma(4);
100 100
101#ifdef CONFIG_KGDB 101#ifdef CONFIG_KGDB
102 kgdb_config (); 102 kgdb_config();
103#endif 103#endif
104 104
105 if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) { 105 if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
@@ -108,7 +108,7 @@ void __init plat_mem_setup(void)
108 argptr = prom_getcmdline(); 108 argptr = prom_getcmdline();
109 if (strstr(argptr, "debug")) { 109 if (strstr(argptr, "debug")) {
110 BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE; 110 BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
111 printk ("Enabled Bonito debug mode\n"); 111 printk("Enabled Bonito debug mode\n");
112 } 112 }
113 else 113 else
114 BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; 114 BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
@@ -159,14 +159,14 @@ void __init plat_mem_setup(void)
159 if (pciclock != 33 && !strstr (argptr, "idebus=")) { 159 if (pciclock != 33 && !strstr (argptr, "idebus=")) {
160 printk("WARNING: PCI clock is %dMHz, setting idebus\n", pciclock); 160 printk("WARNING: PCI clock is %dMHz, setting idebus\n", pciclock);
161 argptr += strlen(argptr); 161 argptr += strlen(argptr);
162 sprintf (argptr, " idebus=%d", pciclock); 162 sprintf(argptr, " idebus=%d", pciclock);
163 if (pciclock < 20 || pciclock > 66) 163 if (pciclock < 20 || pciclock > 66)
164 printk ("WARNING: IDE timing calculations will be incorrect\n"); 164 printk("WARNING: IDE timing calculations will be incorrect\n");
165 } 165 }
166 } 166 }
167#endif 167#endif
168#ifdef CONFIG_BLK_DEV_FD 168#ifdef CONFIG_BLK_DEV_FD
169 fd_activate (); 169 fd_activate();
170#endif 170#endif
171#ifdef CONFIG_VT 171#ifdef CONFIG_VT
172#if defined(CONFIG_VGA_CONSOLE) 172#if defined(CONFIG_VGA_CONSOLE)
diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c
index 9ca0f82f1360..ec6dd194c14a 100644
--- a/arch/mips/mips-boards/sead/sead_int.c
+++ b/arch/mips/mips-boards/sead/sead_int.c
@@ -31,7 +31,7 @@
31 31
32static inline int clz(unsigned long x) 32static inline int clz(unsigned long x)
33{ 33{
34 __asm__ ( 34 __asm__(
35 " .set push \n" 35 " .set push \n"
36 " .set mips32 \n" 36 " .set mips32 \n"
37 " clz %0, %1 \n" 37 " clz %0, %1 \n"
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
index fad58972f3ac..1fb61b852304 100644
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@@ -49,7 +49,7 @@ void __init plat_mem_setup(void)
49{ 49{
50 ioport_resource.end = 0x7fffffff; 50 ioport_resource.end = 0x7fffffff;
51 51
52 serial_init (); 52 serial_init();
53 53
54 mips_reboot_setup(); 54 mips_reboot_setup();
55} 55}
diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c
index 5cbc3509ab52..46067ad542dc 100644
--- a/arch/mips/mipssim/sim_int.c
+++ b/arch/mips/mipssim/sim_int.c
@@ -25,7 +25,7 @@
25 25
26static inline int clz(unsigned long x) 26static inline int clz(unsigned long x)
27{ 27{
28 __asm__ ( 28 __asm__(
29 " .set push \n" 29 " .set push \n"
30 " .set mips32 \n" 30 " .set mips32 \n"
31 " clz %0, %1 \n" 31 " clz %0, %1 \n"
diff --git a/arch/mips/mipssim/sim_mem.c b/arch/mips/mipssim/sim_mem.c
index 2312483eb838..953d836a7713 100644
--- a/arch/mips/mipssim/sim_mem.c
+++ b/arch/mips/mipssim/sim_mem.c
@@ -69,7 +69,7 @@ struct prom_pmemblock * __init prom_getmdesc(void)
69 return &mdesc[0]; 69 return &mdesc[0];
70} 70}
71 71
72static int __init prom_memtype_classify (unsigned int type) 72static int __init prom_memtype_classify(unsigned int type)
73{ 73{
74 switch (type) { 74 switch (type) {
75 case simmem_free: 75 case simmem_free:
@@ -90,7 +90,7 @@ void __init prom_meminit(void)
90 long type; 90 long type;
91 unsigned long base, size; 91 unsigned long base, size;
92 92
93 type = prom_memtype_classify (p->type); 93 type = prom_memtype_classify(p->type);
94 base = p->base; 94 base = p->base;
95 size = p->size; 95 size = p->size;
96 96
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c
index 3625f7d49035..e7fa0d1078a3 100644
--- a/arch/mips/mipssim/sim_time.c
+++ b/arch/mips/mipssim/sim_time.c
@@ -84,7 +84,7 @@ void __init plat_time_init(void)
84 /* Set Data mode - binary. */ 84 /* Set Data mode - binary. */
85 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); 85 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
86 86
87 est_freq = estimate_cpu_frequency (); 87 est_freq = estimate_cpu_frequency();
88 88
89 printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000, 89 printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000,
90 (est_freq % 1000000) * 100 / 1000000); 90 (est_freq % 1000000) * 100 / 1000000);
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index 59868a1edf66..c55312f6fd3a 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -121,7 +121,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end)
121 write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC); 121 write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
122 122
123 for (i = 0; i < size; i += 0x080) { 123 for (i = 0; i < size; i += 0x080) {
124 asm ( "sb\t$0, 0x000(%0)\n\t" 124 asm( "sb\t$0, 0x000(%0)\n\t"
125 "sb\t$0, 0x004(%0)\n\t" 125 "sb\t$0, 0x004(%0)\n\t"
126 "sb\t$0, 0x008(%0)\n\t" 126 "sb\t$0, 0x008(%0)\n\t"
127 "sb\t$0, 0x00c(%0)\n\t" 127 "sb\t$0, 0x00c(%0)\n\t"
@@ -178,7 +178,7 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end)
178 write_c0_status((ST0_ISC|flags)&~ST0_IEC); 178 write_c0_status((ST0_ISC|flags)&~ST0_IEC);
179 179
180 for (i = 0; i < size; i += 0x080) { 180 for (i = 0; i < size; i += 0x080) {
181 asm ( "sb\t$0, 0x000(%0)\n\t" 181 asm( "sb\t$0, 0x000(%0)\n\t"
182 "sb\t$0, 0x004(%0)\n\t" 182 "sb\t$0, 0x004(%0)\n\t"
183 "sb\t$0, 0x008(%0)\n\t" 183 "sb\t$0, 0x008(%0)\n\t"
184 "sb\t$0, 0x00c(%0)\n\t" 184 "sb\t$0, 0x00c(%0)\n\t"
@@ -217,8 +217,8 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end)
217 write_c0_status(flags); 217 write_c0_status(flags);
218} 218}
219 219
220static inline unsigned long get_phys_page (unsigned long addr, 220static inline unsigned long get_phys_page(unsigned long addr,
221 struct mm_struct *mm) 221 struct mm_struct *mm)
222{ 222{
223 pgd_t *pgd; 223 pgd_t *pgd;
224 pud_t *pud; 224 pud_t *pud;
@@ -281,13 +281,13 @@ static void r3k_flush_cache_sigtramp(unsigned long addr)
281 write_c0_status(flags&~ST0_IEC); 281 write_c0_status(flags&~ST0_IEC);
282 282
283 /* Fill the TLB to avoid an exception with caches isolated. */ 283 /* Fill the TLB to avoid an exception with caches isolated. */
284 asm ( "lw\t$0, 0x000(%0)\n\t" 284 asm( "lw\t$0, 0x000(%0)\n\t"
285 "lw\t$0, 0x004(%0)\n\t" 285 "lw\t$0, 0x004(%0)\n\t"
286 : : "r" (addr) ); 286 : : "r" (addr) );
287 287
288 write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC); 288 write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
289 289
290 asm ( "sb\t$0, 0x000(%0)\n\t" 290 asm( "sb\t$0, 0x000(%0)\n\t"
291 "sb\t$0, 0x004(%0)\n\t" 291 "sb\t$0, 0x004(%0)\n\t"
292 : : "r" (addr) ); 292 : : "r" (addr) );
293 293
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 42b50964c644..c13170bc675c 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -102,7 +102,7 @@ static inline int __init mips_sc_probe(void)
102 102
103int __init mips_sc_init(void) 103int __init mips_sc_init(void)
104{ 104{
105 int found = mips_sc_probe (); 105 int found = mips_sc_probe();
106 if (found) { 106 if (found) {
107 mips_sc_enable(); 107 mips_sc_enable();
108 bcops = &mips_sc_ops; 108 bcops = &mips_sc_ops;
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index dcd6913dc1ff..74ae0348cc92 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -491,7 +491,7 @@ void __init tlb_init(void)
491 int wired = current_cpu_data.tlbsize - ntlb; 491 int wired = current_cpu_data.tlbsize - ntlb;
492 write_c0_wired(wired); 492 write_c0_wired(wired);
493 write_c0_index(wired-1); 493 write_c0_index(wired-1);
494 printk ("Restricting TLB to %d entries\n", ntlb); 494 printk("Restricting TLB to %d entries\n", ntlb);
495 } else 495 } else
496 printk("Ignoring invalid argument ntlb=%d\n", ntlb); 496 printk("Ignoring invalid argument ntlb=%d\n", ntlb);
497 } 497 }
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 6383000422ab..423bc2c473df 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -118,7 +118,7 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
118 118
119/* Program all of the registers in preparation for enabling profiling. */ 119/* Program all of the registers in preparation for enabling profiling. */
120 120
121static void mipsxx_cpu_setup (void *args) 121static void mipsxx_cpu_setup(void *args)
122{ 122{
123 unsigned int counters = op_model_mipsxx_ops.num_counters; 123 unsigned int counters = op_model_mipsxx_ops.num_counters;
124 124
diff --git a/arch/mips/oprofile/op_model_rm9000.c b/arch/mips/oprofile/op_model_rm9000.c
index d29040a56aea..a45d3202894f 100644
--- a/arch/mips/oprofile/op_model_rm9000.c
+++ b/arch/mips/oprofile/op_model_rm9000.c
@@ -60,7 +60,7 @@ static void rm9000_reg_setup(struct op_counter_config *ctr)
60 60
61/* Program all of the registers in preparation for enabling profiling. */ 61/* Program all of the registers in preparation for enabling profiling. */
62 62
63static void rm9000_cpu_setup (void *args) 63static void rm9000_cpu_setup(void *args)
64{ 64{
65 uint64_t perfcount; 65 uint64_t perfcount;
66 66
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
index 45224fd2c7ba..506e883a8c71 100644
--- a/arch/mips/pci/fixup-atlas.c
+++ b/arch/mips/pci/fixup-atlas.c
@@ -77,12 +77,12 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
77 * code, but it is better than nothing... 77 * code, but it is better than nothing...
78 */ 78 */
79 79
80static void atlas_saa9730_base_fixup (struct pci_dev *pdev) 80static void atlas_saa9730_base_fixup(struct pci_dev *pdev)
81{ 81{
82 extern void *saa9730_base; 82 extern void *saa9730_base;
83 if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19) 83 if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19)
84 (void) pci_read_config_dword (pdev, 0x14, (u32 *)&saa9730_base); 84 (void) pci_read_config_dword(pdev, 0x14, (u32 *)&saa9730_base);
85 printk ("saa9730_base = %x\n", saa9730_base); 85 printk("saa9730_base = %x\n", saa9730_base);
86} 86}
87 87
88DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730, 88DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index 7932dfe5eb9b..6b29904acf45 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -112,7 +112,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
112 first_cfg = 0; 112 first_cfg = 0;
113 pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); 113 pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP);
114 if (!pci_cfg_vm) 114 if (!pci_cfg_vm)
115 panic (KERN_ERR "PCI unable to get vm area\n"); 115 panic(KERN_ERR "PCI unable to get vm area\n");
116 pci_cfg_wired_entry = read_c0_wired(); 116 pci_cfg_wired_entry = read_c0_wired();
117 add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K); 117 add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K);
118 last_entryLo0 = last_entryLo1 = 0xffffffff; 118 last_entryLo0 = last_entryLo1 = 0xffffffff;
diff --git a/arch/mips/pci/ops-sni.c b/arch/mips/pci/ops-sni.c
index fa2d2c60f797..97ed25b92edf 100644
--- a/arch/mips/pci/ops-sni.c
+++ b/arch/mips/pci/ops-sni.c
@@ -70,13 +70,13 @@ static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg,
70 70
71 switch (size) { 71 switch (size) {
72 case 1: 72 case 1:
73 outb (val, PCIMT_CONFIG_DATA + (reg & 3)); 73 outb(val, PCIMT_CONFIG_DATA + (reg & 3));
74 break; 74 break;
75 case 2: 75 case 2:
76 outw (val, PCIMT_CONFIG_DATA + (reg & 2)); 76 outw(val, PCIMT_CONFIG_DATA + (reg & 2));
77 break; 77 break;
78 case 4: 78 case 4:
79 outl (val, PCIMT_CONFIG_DATA); 79 outl(val, PCIMT_CONFIG_DATA);
80 break; 80 break;
81 } 81 }
82 82
@@ -93,7 +93,7 @@ static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int r
93 if ((devfn > 255) || (reg > 255) || (busno > 255)) 93 if ((devfn > 255) || (reg > 255) || (busno > 255))
94 return PCIBIOS_BAD_REGISTER_NUMBER; 94 return PCIBIOS_BAD_REGISTER_NUMBER;
95 95
96 outl ((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8); 96 outl((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8);
97 return PCIBIOS_SUCCESSFUL; 97 return PCIBIOS_SUCCESSFUL;
98} 98}
99 99
@@ -108,12 +108,12 @@ static int pcit_read(struct pci_bus *bus, unsigned int devfn, int reg,
108 * we don't do it, we will get a data bus error 108 * we don't do it, we will get a data bus error
109 */ 109 */
110 if (bus->number == 0) { 110 if (bus->number == 0) {
111 pcit_set_config_address (0, 0, 0x68); 111 pcit_set_config_address(0, 0, 0x68);
112 outl (inl (0xcfc) | 0xc0000000, 0xcfc); 112 outl(inl(0xcfc) | 0xc0000000, 0xcfc);
113 if ((res = pcit_set_config_address(0, devfn, 0))) 113 if ((res = pcit_set_config_address(0, devfn, 0)))
114 return res; 114 return res;
115 outl (0xffffffff, 0xcfc); 115 outl(0xffffffff, 0xcfc);
116 pcit_set_config_address (0, 0, 0x68); 116 pcit_set_config_address(0, 0, 0x68);
117 if (inl(0xcfc) & 0x100000) 117 if (inl(0xcfc) & 0x100000)
118 return PCIBIOS_DEVICE_NOT_FOUND; 118 return PCIBIOS_DEVICE_NOT_FOUND;
119 } 119 }
@@ -144,13 +144,13 @@ static int pcit_write(struct pci_bus *bus, unsigned int devfn, int reg,
144 144
145 switch (size) { 145 switch (size) {
146 case 1: 146 case 1:
147 outb (val, PCIMT_CONFIG_DATA + (reg & 3)); 147 outb(val, PCIMT_CONFIG_DATA + (reg & 3));
148 break; 148 break;
149 case 2: 149 case 2:
150 outw (val, PCIMT_CONFIG_DATA + (reg & 2)); 150 outw(val, PCIMT_CONFIG_DATA + (reg & 2));
151 break; 151 break;
152 case 4: 152 case 4:
153 outl (val, PCIMT_CONFIG_DATA); 153 outl(val, PCIMT_CONFIG_DATA);
154 break; 154 break;
155 } 155 }
156 156
diff --git a/arch/mips/philips/pnx8550/common/proc.c b/arch/mips/philips/pnx8550/common/proc.c
index 92311e95b700..416f834784bc 100644
--- a/arch/mips/philips/pnx8550/common/proc.c
+++ b/arch/mips/philips/pnx8550/common/proc.c
@@ -27,7 +27,7 @@
27#include <uart.h> 27#include <uart.h>
28 28
29 29
30static int pnx8550_timers_read (char* page, char** start, off_t offset, int count, int* eof, void* data) 30static int pnx8550_timers_read(char* page, char** start, off_t offset, int count, int* eof, void* data)
31{ 31{
32 int len = 0; 32 int len = 0;
33 int configPR = read_c0_config7(); 33 int configPR = read_c0_config7();
@@ -48,7 +48,7 @@ static int pnx8550_timers_read (char* page, char** start, off_t offset, int coun
48 return len; 48 return len;
49} 49}
50 50
51static int pnx8550_registers_read (char* page, char** start, off_t offset, int count, int* eof, void* data) 51static int pnx8550_registers_read(char* page, char** start, off_t offset, int count, int* eof, void* data)
52{ 52{
53 int len = 0; 53 int len = 0;
54 54
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_usb.c b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
index 21f9c70b6923..f7ca4f582331 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_usb.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
@@ -58,7 +58,7 @@ static struct platform_device msp_usbhost_device = {
58 .dma_mask = &msp_usbhost_dma_mask, 58 .dma_mask = &msp_usbhost_dma_mask,
59 .coherent_dma_mask = DMA_32BIT_MASK, 59 .coherent_dma_mask = DMA_32BIT_MASK,
60 }, 60 },
61 .num_resources = ARRAY_SIZE (msp_usbhost_resources), 61 .num_resources = ARRAY_SIZE(msp_usbhost_resources),
62 .resource = msp_usbhost_resources, 62 .resource = msp_usbhost_resources,
63}; 63};
64#endif /* CONFIG_USB_EHCI_HCD */ 64#endif /* CONFIG_USB_EHCI_HCD */
@@ -86,7 +86,7 @@ static struct platform_device msp_usbdev_device = {
86 .dma_mask = &msp_usbdev_dma_mask, 86 .dma_mask = &msp_usbdev_dma_mask,
87 .coherent_dma_mask = DMA_32BIT_MASK, 87 .coherent_dma_mask = DMA_32BIT_MASK,
88 }, 88 },
89 .num_resources = ARRAY_SIZE (msp_usbdev_resources), 89 .num_resources = ARRAY_SIZE(msp_usbdev_resources),
90 .resource = msp_usbdev_resources, 90 .resource = msp_usbdev_resources,
91}; 91};
92#endif /* CONFIG_USB_GADGET */ 92#endif /* CONFIG_USB_GADGET */
@@ -129,7 +129,7 @@ static int __init msp_usb_setup(void)
129 ppfinit("platform add USB HOST done %s.\n", 129 ppfinit("platform add USB HOST done %s.\n",
130 msp_devs[0]->name); 130 msp_devs[0]->name);
131 131
132 result = platform_add_devices(msp_devs, ARRAY_SIZE (msp_devs)); 132 result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs));
133#endif /* CONFIG_USB_EHCI_HCD */ 133#endif /* CONFIG_USB_EHCI_HCD */
134 } 134 }
135#if defined(CONFIG_USB_GADGET) 135#if defined(CONFIG_USB_GADGET)
@@ -139,7 +139,7 @@ static int __init msp_usb_setup(void)
139 ppfinit("platform add USB DEVICE done %s.\n", 139 ppfinit("platform add USB DEVICE done %s.\n",
140 msp_devs[0]->name); 140 msp_devs[0]->name);
141 141
142 result = platform_add_devices(msp_devs, ARRAY_SIZE (msp_devs)); 142 result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs));
143 } 143 }
144#endif /* CONFIG_USB_GADGET */ 144#endif /* CONFIG_USB_GADGET */
145#endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */ 145#endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */
diff --git a/arch/mips/qemu/q-firmware.c b/arch/mips/qemu/q-firmware.c
index fb2a8673a6bf..c2239b417587 100644
--- a/arch/mips/qemu/q-firmware.c
+++ b/arch/mips/qemu/q-firmware.c
@@ -10,7 +10,7 @@ void __init prom_init(void)
10 cmdline = (int *) (CKSEG0 + (0x10 << 20) - 260); 10 cmdline = (int *) (CKSEG0 + (0x10 << 20) - 260);
11 if (*cmdline == 0x12345678) { 11 if (*cmdline == 0x12345678) {
12 if (*(char *)(cmdline + 1)) 12 if (*(char *)(cmdline + 1))
13 strcpy (arcs_cmdline, (char *)(cmdline + 1)); 13 strcpy(arcs_cmdline, (char *)(cmdline + 1));
14 add_memory_region(0x0<<20, cmdline[-1], BOOT_MEM_RAM); 14 add_memory_region(0x0<<20, cmdline[-1], BOOT_MEM_RAM);
15 } else { 15 } else {
16 add_memory_region(0x0<<20, 0x10<<20, BOOT_MEM_RAM); 16 add_memory_region(0x0<<20, 0x10<<20, BOOT_MEM_RAM);
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index 6b6e97b90c6e..26854fb11e7c 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -55,7 +55,7 @@ static char __init *decode_eisa_sig(unsigned long addr)
55 int i; 55 int i;
56 56
57 for (i = 0; i < 4; i++) { 57 for (i = 0; i < 4; i++) {
58 sig[i] = inb (addr + i); 58 sig[i] = inb(addr + i);
59 59
60 if (!i && (sig[0] & 0x80)) 60 if (!i && (sig[0] & 0x80))
61 return NULL; 61 return NULL;
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index f199da7e49cf..f6d9bf4b26e7 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -344,6 +344,6 @@ void __init arch_init_irq(void)
344 344
345#ifdef CONFIG_EISA 345#ifdef CONFIG_EISA
346 if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */ 346 if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */
347 ip22_eisa_init (); 347 ip22_eisa_init();
348#endif 348#endif
349} 349}
diff --git a/arch/mips/sgi-ip32/crime.c b/arch/mips/sgi-ip32/crime.c
index bff508704d03..563c614ad021 100644
--- a/arch/mips/sgi-ip32/crime.c
+++ b/arch/mips/sgi-ip32/crime.c
@@ -35,8 +35,8 @@ void __init crime_init(void)
35 id = crime->id; 35 id = crime->id;
36 rev = id & CRIME_ID_REV; 36 rev = id & CRIME_ID_REV;
37 id = (id & CRIME_ID_IDBITS) >> 4; 37 id = (id & CRIME_ID_IDBITS) >> 4;
38 printk (KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n", 38 printk(KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n",
39 id, rev, field, (unsigned long) CRIME_BASE); 39 id, rev, field, (unsigned long) CRIME_BASE);
40} 40}
41 41
42irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id) 42irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id)
@@ -96,7 +96,7 @@ irqreturn_t crime_cpuerr_intr(unsigned int irq, void *dev_id)
96 unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK; 96 unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK;
97 97
98 addr <<= 2; 98 addr <<= 2;
99 printk ("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat); 99 printk("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat);
100 crime->cpu_error_stat = 0; 100 crime->cpu_error_stat = 0;
101 101
102 return IRQ_HANDLED; 102 return IRQ_HANDLED;
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index 002095b364a3..7f4b793c3df3 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -148,7 +148,7 @@ static void disable_cpu_irq(unsigned int irq)
148static void end_cpu_irq(unsigned int irq) 148static void end_cpu_irq(unsigned int irq)
149{ 149{
150 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 150 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
151 enable_cpu_irq (irq); 151 enable_cpu_irq(irq);
152} 152}
153 153
154static struct irq_chip ip32_cpu_interrupt = { 154static struct irq_chip ip32_cpu_interrupt = {
@@ -289,11 +289,11 @@ static struct irq_chip ip32_macepci_interrupt = {
289 289
290static unsigned long maceisa_mask; 290static unsigned long maceisa_mask;
291 291
292static void enable_maceisa_irq (unsigned int irq) 292static void enable_maceisa_irq(unsigned int irq)
293{ 293{
294 unsigned int crime_int = 0; 294 unsigned int crime_int = 0;
295 295
296 DBG ("maceisa enable: %u\n", irq); 296 DBG("maceisa enable: %u\n", irq);
297 297
298 switch (irq) { 298 switch (irq) {
299 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ: 299 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ:
@@ -306,7 +306,7 @@ static void enable_maceisa_irq (unsigned int irq)
306 crime_int = MACE_SUPERIO_INT; 306 crime_int = MACE_SUPERIO_INT;
307 break; 307 break;
308 } 308 }
309 DBG ("crime_int %08x enabled\n", crime_int); 309 DBG("crime_int %08x enabled\n", crime_int);
310 crime_mask |= crime_int; 310 crime_mask |= crime_int;
311 crime->imask = crime_mask; 311 crime->imask = crime_mask;
312 maceisa_mask |= 1 << (irq - 33); 312 maceisa_mask |= 1 << (irq - 33);
@@ -397,15 +397,15 @@ static struct irq_chip ip32_mace_interrupt = {
397 397
398static void ip32_unknown_interrupt(void) 398static void ip32_unknown_interrupt(void)
399{ 399{
400 printk ("Unknown interrupt occurred!\n"); 400 printk("Unknown interrupt occurred!\n");
401 printk ("cp0_status: %08x\n", read_c0_status()); 401 printk("cp0_status: %08x\n", read_c0_status());
402 printk ("cp0_cause: %08x\n", read_c0_cause()); 402 printk("cp0_cause: %08x\n", read_c0_cause());
403 printk ("CRIME intr mask: %016lx\n", crime->imask); 403 printk("CRIME intr mask: %016lx\n", crime->imask);
404 printk ("CRIME intr status: %016lx\n", crime->istat); 404 printk("CRIME intr status: %016lx\n", crime->istat);
405 printk ("CRIME hardware intr register: %016lx\n", crime->hard_int); 405 printk("CRIME hardware intr register: %016lx\n", crime->hard_int);
406 printk ("MACE ISA intr mask: %08lx\n", mace->perif.ctrl.imask); 406 printk("MACE ISA intr mask: %08lx\n", mace->perif.ctrl.imask);
407 printk ("MACE ISA intr status: %08lx\n", mace->perif.ctrl.istat); 407 printk("MACE ISA intr status: %08lx\n", mace->perif.ctrl.istat);
408 printk ("MACE PCI control register: %08x\n", mace->pci.control); 408 printk("MACE PCI control register: %08x\n", mace->pci.control);
409 409
410 printk("Register dump:\n"); 410 printk("Register dump:\n");
411 show_regs(get_irq_regs()); 411 show_regs(get_irq_regs());
diff --git a/arch/mips/sgi-ip32/ip32-memory.c b/arch/mips/sgi-ip32/ip32-memory.c
index 849d392a0013..ca93ecf825ae 100644
--- a/arch/mips/sgi-ip32/ip32-memory.c
+++ b/arch/mips/sgi-ip32/ip32-memory.c
@@ -19,7 +19,7 @@
19 19
20extern void crime_init(void); 20extern void crime_init(void);
21 21
22void __init prom_meminit (void) 22void __init prom_meminit(void)
23{ 23{
24 u64 base, size; 24 u64 base, size;
25 int bank; 25 int bank;
@@ -38,7 +38,7 @@ void __init prom_meminit (void)
38 38
39 printk("CRIME MC: bank %u base 0x%016lx size %luMiB\n", 39 printk("CRIME MC: bank %u base 0x%016lx size %luMiB\n",
40 bank, base, size >> 20); 40 bank, base, size >> 20);
41 add_memory_region (base, size, BOOT_MEM_RAM); 41 add_memory_region(base, size, BOOT_MEM_RAM);
42 } 42 }
43} 43}
44 44
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index 4fcdaa8ba514..63b444eaf01e 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -276,8 +276,8 @@ static int sbprof_zbprof_start(struct file *filp)
276 sbp.next_tb_sample = 0; 276 sbp.next_tb_sample = 0;
277 filp->f_pos = 0; 277 filp->f_pos = 0;
278 278
279 err = request_irq (K_INT_TRACE_FREEZE, sbprof_tb_intr, 0, 279 err = request_irq(K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
280 DEVNAME " trace freeze", &sbp); 280 DEVNAME " trace freeze", &sbp);
281 if (err) 281 if (err)
282 return -EBUSY; 282 return -EBUSY;
283 283
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index acc9ba76c1a9..b74607599971 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -127,7 +127,7 @@ static u32 a20r_ack_hwint(void)
127{ 127{
128 u32 status = read_c0_status(); 128 u32 status = read_c0_status();
129 129
130 write_c0_status (status | 0x00010000); 130 write_c0_status(status | 0x00010000);
131 asm volatile( 131 asm volatile(
132 " .set push \n" 132 " .set push \n"
133 " .set noat \n" 133 " .set noat \n"
@@ -195,7 +195,7 @@ static void a20r_hwint(void)
195 u32 cause, status; 195 u32 cause, status;
196 int irq; 196 int irq;
197 197
198 clear_c0_status (IE_IRQ0); 198 clear_c0_status(IE_IRQ0);
199 status = a20r_ack_hwint(); 199 status = a20r_ack_hwint();
200 cause = read_c0_cause(); 200 cause = read_c0_cause();
201 201
@@ -213,7 +213,7 @@ void __init sni_a20r_irq_init(void)
213 set_irq_chip(i, &a20r_irq_type); 213 set_irq_chip(i, &a20r_irq_type);
214 sni_hwint = a20r_hwint; 214 sni_hwint = a20r_hwint;
215 change_c0_status(ST0_IM, IE_IRQ0); 215 change_c0_status(ST0_IM, IE_IRQ0);
216 setup_irq (SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); 216 setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
217} 217}
218 218
219void sni_a20r_init(void) 219void sni_a20r_init(void)
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 25cf646329ae..39bb15f1f2a6 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -284,9 +284,9 @@ static void sni_pcimt_hwint(void)
284 u32 pending = read_c0_cause() & read_c0_status(); 284 u32 pending = read_c0_cause() & read_c0_status();
285 285
286 if (pending & C_IRQ5) 286 if (pending & C_IRQ5)
287 do_IRQ (MIPS_CPU_IRQ_BASE + 7); 287 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
288 else if (pending & C_IRQ4) 288 else if (pending & C_IRQ4)
289 do_IRQ (MIPS_CPU_IRQ_BASE + 6); 289 do_IRQ(MIPS_CPU_IRQ_BASE + 6);
290 else if (pending & C_IRQ3) 290 else if (pending & C_IRQ3)
291 pcimt_hwint3(); 291 pcimt_hwint3();
292 else if (pending & C_IRQ1) 292 else if (pending & C_IRQ1)
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index 3361bdd240e6..416f397c768b 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -188,8 +188,8 @@ static void pcit_hwint1(void)
188 irq = ffs((pending >> 16) & 0x7f); 188 irq = ffs((pending >> 16) & 0x7f);
189 189
190 if (likely(irq > 0)) 190 if (likely(irq > 0))
191 do_IRQ (irq + SNI_PCIT_INT_START - 1); 191 do_IRQ(irq + SNI_PCIT_INT_START - 1);
192 set_c0_status (IE_IRQ1); 192 set_c0_status(IE_IRQ1);
193} 193}
194 194
195static void pcit_hwint0(void) 195static void pcit_hwint0(void)
@@ -201,8 +201,8 @@ static void pcit_hwint0(void)
201 irq = ffs((pending >> 16) & 0x3f); 201 irq = ffs((pending >> 16) & 0x3f);
202 202
203 if (likely(irq > 0)) 203 if (likely(irq > 0))
204 do_IRQ (irq + SNI_PCIT_INT_START - 1); 204 do_IRQ(irq + SNI_PCIT_INT_START - 1);
205 set_c0_status (IE_IRQ0); 205 set_c0_status(IE_IRQ0);
206} 206}
207 207
208static void sni_pcit_hwint(void) 208static void sni_pcit_hwint(void)
@@ -212,11 +212,11 @@ static void sni_pcit_hwint(void)
212 if (pending & C_IRQ1) 212 if (pending & C_IRQ1)
213 pcit_hwint1(); 213 pcit_hwint1();
214 else if (pending & C_IRQ2) 214 else if (pending & C_IRQ2)
215 do_IRQ (MIPS_CPU_IRQ_BASE + 4); 215 do_IRQ(MIPS_CPU_IRQ_BASE + 4);
216 else if (pending & C_IRQ3) 216 else if (pending & C_IRQ3)
217 do_IRQ (MIPS_CPU_IRQ_BASE + 5); 217 do_IRQ(MIPS_CPU_IRQ_BASE + 5);
218 else if (pending & C_IRQ5) 218 else if (pending & C_IRQ5)
219 do_IRQ (MIPS_CPU_IRQ_BASE + 7); 219 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
220} 220}
221 221
222static void sni_pcit_hwint_cplus(void) 222static void sni_pcit_hwint_cplus(void)
@@ -226,13 +226,13 @@ static void sni_pcit_hwint_cplus(void)
226 if (pending & C_IRQ0) 226 if (pending & C_IRQ0)
227 pcit_hwint0(); 227 pcit_hwint0();
228 else if (pending & C_IRQ1) 228 else if (pending & C_IRQ1)
229 do_IRQ (MIPS_CPU_IRQ_BASE + 3); 229 do_IRQ(MIPS_CPU_IRQ_BASE + 3);
230 else if (pending & C_IRQ2) 230 else if (pending & C_IRQ2)
231 do_IRQ (MIPS_CPU_IRQ_BASE + 4); 231 do_IRQ(MIPS_CPU_IRQ_BASE + 4);
232 else if (pending & C_IRQ3) 232 else if (pending & C_IRQ3)
233 do_IRQ (MIPS_CPU_IRQ_BASE + 5); 233 do_IRQ(MIPS_CPU_IRQ_BASE + 5);
234 else if (pending & C_IRQ5) 234 else if (pending & C_IRQ5)
235 do_IRQ (MIPS_CPU_IRQ_BASE + 7); 235 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
236} 236}
237 237
238void __init sni_pcit_irq_init(void) 238void __init sni_pcit_irq_init(void)
@@ -245,7 +245,7 @@ void __init sni_pcit_irq_init(void)
245 *(volatile u32 *)SNI_PCIT_INT_REG = 0; 245 *(volatile u32 *)SNI_PCIT_INT_REG = 0;
246 sni_hwint = sni_pcit_hwint; 246 sni_hwint = sni_pcit_hwint;
247 change_c0_status(ST0_IM, IE_IRQ1); 247 change_c0_status(ST0_IM, IE_IRQ1);
248 setup_irq (SNI_PCIT_INT_START + 6, &sni_isa_irq); 248 setup_irq(SNI_PCIT_INT_START + 6, &sni_isa_irq);
249} 249}
250 250
251void __init sni_pcit_cplus_irq_init(void) 251void __init sni_pcit_cplus_irq_init(void)
@@ -258,7 +258,7 @@ void __init sni_pcit_cplus_irq_init(void)
258 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; 258 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
259 sni_hwint = sni_pcit_hwint_cplus; 259 sni_hwint = sni_pcit_hwint_cplus;
260 change_c0_status(ST0_IM, IE_IRQ0); 260 change_c0_status(ST0_IM, IE_IRQ0);
261 setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq); 261 setup_irq(MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
262} 262}
263 263
264void __init sni_pcit_init(void) 264void __init sni_pcit_init(void)
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 94f115c6b2e0..67b061eef6cd 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -162,16 +162,16 @@ static void sni_rm200_hwint(void)
162 int irq; 162 int irq;
163 163
164 if (pending & C_IRQ5) 164 if (pending & C_IRQ5)
165 do_IRQ (MIPS_CPU_IRQ_BASE + 7); 165 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
166 else if (pending & C_IRQ0) { 166 else if (pending & C_IRQ0) {
167 clear_c0_status (IE_IRQ0); 167 clear_c0_status(IE_IRQ0);
168 mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f; 168 mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f;
169 stat = *(volatile u8 *)SNI_RM200_INT_STAT_REG ^ 0x14; 169 stat = *(volatile u8 *)SNI_RM200_INT_STAT_REG ^ 0x14;
170 irq = ffs(stat & mask & 0x1f); 170 irq = ffs(stat & mask & 0x1f);
171 171
172 if (likely(irq > 0)) 172 if (likely(irq > 0))
173 do_IRQ (irq + SNI_RM200_INT_START - 1); 173 do_IRQ(irq + SNI_RM200_INT_START - 1);
174 set_c0_status (IE_IRQ0); 174 set_c0_status(IE_IRQ0);
175 } 175 }
176} 176}
177 177
@@ -187,7 +187,7 @@ void __init sni_rm200_irq_init(void)
187 set_irq_chip(i, &rm200_irq_type); 187 set_irq_chip(i, &rm200_irq_type);
188 sni_hwint = sni_rm200_hwint; 188 sni_hwint = sni_rm200_hwint;
189 change_c0_status(ST0_IM, IE_IRQ0); 189 change_c0_status(ST0_IM, IE_IRQ0);
190 setup_irq (SNI_RM200_INT_START + 0, &sni_isa_irq); 190 setup_irq(SNI_RM200_INT_START + 0, &sni_isa_irq);
191} 191}
192 192
193void __init sni_rm200_init(void) 193void __init sni_rm200_init(void)
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 883e35ea4e82..e8b26bdee24c 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -106,11 +106,11 @@ static void __devinit quirk_cirrus_ram_size(struct pci_dev *dev)
106 * need to do it here, otherwise we get screen corruption 106 * need to do it here, otherwise we get screen corruption
107 * on older Cirrus chips 107 * on older Cirrus chips
108 */ 108 */
109 pci_read_config_word (dev, PCI_COMMAND, &cmd); 109 pci_read_config_word(dev, PCI_COMMAND, &cmd);
110 if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) 110 if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY))
111 == (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) { 111 == (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) {
112 vga_wseq (NULL, CL_SEQR6, 0x12); /* unlock all extension registers */ 112 vga_wseq(NULL, CL_SEQR6, 0x12); /* unlock all extension registers */
113 vga_wseq (NULL, CL_SEQRF, 0x18); 113 vga_wseq(NULL, CL_SEQRF, 0x18);
114 } 114 }
115} 115}
116 116
diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c
index db544a6e23f3..11eddd43458d 100644
--- a/arch/mips/sni/sniprom.c
+++ b/arch/mips/sni/sniprom.c
@@ -45,7 +45,7 @@ void prom_putchar(char c)
45static char *(*__prom_getenv)(char *) = (char *(*)(char *))PROM_ENTRY(PROM_GETENV); 45static char *(*__prom_getenv)(char *) = (char *(*)(char *))PROM_ENTRY(PROM_GETENV);
46static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF); 46static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF);
47 47
48char *prom_getenv (char *s) 48char *prom_getenv(char *s)
49{ 49{
50 return __prom_getenv(s); 50 return __prom_getenv(s);
51} 51}
@@ -131,9 +131,9 @@ static void __init sni_console_setup(void)
131 int port; 131 int port;
132 static char options[8]; 132 static char options[8];
133 133
134 cdev = prom_getenv ("console_dev"); 134 cdev = prom_getenv("console_dev");
135 if (strncmp (cdev, "tty", 3) == 0) { 135 if (strncmp (cdev, "tty", 3) == 0) {
136 ctype = prom_getenv ("console"); 136 ctype = prom_getenv("console");
137 switch (*ctype) { 137 switch (*ctype) {
138 default: 138 default:
139 case 'l': 139 case 'l':
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 153f065434ea..b80877349d38 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -44,23 +44,23 @@ static __init unsigned long dosample(void)
44 volatile u8 msb, lsb; 44 volatile u8 msb, lsb;
45 45
46 /* Start the counter. */ 46 /* Start the counter. */
47 outb_p (0x34, 0x43); 47 outb_p(0x34, 0x43);
48 outb_p(SNI_8254_TCSAMP_COUNTER & 0xff, 0x40); 48 outb_p(SNI_8254_TCSAMP_COUNTER & 0xff, 0x40);
49 outb (SNI_8254_TCSAMP_COUNTER >> 8, 0x40); 49 outb(SNI_8254_TCSAMP_COUNTER >> 8, 0x40);
50 50
51 /* Get initial counter invariant */ 51 /* Get initial counter invariant */
52 ct0 = read_c0_count(); 52 ct0 = read_c0_count();
53 53
54 /* Latch and spin until top byte of counter0 is zero */ 54 /* Latch and spin until top byte of counter0 is zero */
55 do { 55 do {
56 outb (0x00, 0x43); 56 outb(0x00, 0x43);
57 lsb = inb (0x40); 57 lsb = inb(0x40);
58 msb = inb (0x40); 58 msb = inb(0x40);
59 ct1 = read_c0_count(); 59 ct1 = read_c0_count();
60 } while (msb); 60 } while (msb);
61 61
62 /* Stop the counter. */ 62 /* Stop the counter. */
63 outb (0x38, 0x43); 63 outb(0x38, 0x43);
64 /* 64 /*
65 * Return the difference, this is how far the r4k counter increments 65 * Return the difference, this is how far the r4k counter increments
66 * for every 1/HZ seconds. We round off the nearest 1 MHz of master 66 * for every 1/HZ seconds. We round off the nearest 1 MHz of master
@@ -137,7 +137,7 @@ void __init plat_timer_setup(struct irqaction *irq)
137 case SNI_BRD_10NEW: 137 case SNI_BRD_10NEW:
138 case SNI_BRD_TOWER_OASIC: 138 case SNI_BRD_TOWER_OASIC:
139 case SNI_BRD_MINITOWER: 139 case SNI_BRD_MINITOWER:
140 sni_a20r_timer_setup (irq); 140 sni_a20r_timer_setup(irq);
141 break; 141 break;
142 142
143 case SNI_BRD_PCI_TOWER: 143 case SNI_BRD_PCI_TOWER:
@@ -146,7 +146,7 @@ void __init plat_timer_setup(struct irqaction *irq)
146 case SNI_BRD_PCI_DESKTOP: 146 case SNI_BRD_PCI_DESKTOP:
147 case SNI_BRD_PCI_TOWER_CPLUS: 147 case SNI_BRD_PCI_TOWER_CPLUS:
148 case SNI_BRD_PCI_MTOWER_CPLUS: 148 case SNI_BRD_PCI_MTOWER_CPLUS:
149 sni_cpu_timer_setup (irq); 149 sni_cpu_timer_setup(irq);
150 break; 150 break;
151 } 151 }
152} 152}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 13:50:19 -0500