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authorRalf Baechle <ralf@linux-mips.org>2010-02-27 06:53:37 -0500
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 06:53:37 -0500
commit34ee4148472996c5fd25fbb5697982914cfe955a (patch)
treebce0291fbacd152cb5b04db85da59d5a5027a408 /arch/mips
parentda4afffc1d03c4f0334dabd28ce4c2325ee8f092 (diff)
MIPS: GT641xx: Convert timer lock to raw spinlock.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/cevt-gt641xx.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c
index f5d265eb6eae..392ef3756c56 100644
--- a/arch/mips/kernel/cevt-gt641xx.c
+++ b/arch/mips/kernel/cevt-gt641xx.c
@@ -25,7 +25,7 @@
25#include <asm/gt64120.h> 25#include <asm/gt64120.h>
26#include <asm/time.h> 26#include <asm/time.h>
27 27
28static DEFINE_SPINLOCK(gt641xx_timer_lock); 28static DEFINE_RAW_SPINLOCK(gt641xx_timer_lock);
29static unsigned int gt641xx_base_clock; 29static unsigned int gt641xx_base_clock;
30 30
31void gt641xx_set_base_clock(unsigned int clock) 31void gt641xx_set_base_clock(unsigned int clock)
@@ -49,7 +49,7 @@ static int gt641xx_timer0_set_next_event(unsigned long delta,
49{ 49{
50 u32 ctrl; 50 u32 ctrl;
51 51
52 spin_lock(&gt641xx_timer_lock); 52 raw_spin_lock(&gt641xx_timer_lock);
53 53
54 ctrl = GT_READ(GT_TC_CONTROL_OFS); 54 ctrl = GT_READ(GT_TC_CONTROL_OFS);
55 ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); 55 ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
@@ -58,7 +58,7 @@ static int gt641xx_timer0_set_next_event(unsigned long delta,
58 GT_WRITE(GT_TC0_OFS, delta); 58 GT_WRITE(GT_TC0_OFS, delta);
59 GT_WRITE(GT_TC_CONTROL_OFS, ctrl); 59 GT_WRITE(GT_TC_CONTROL_OFS, ctrl);
60 60
61 spin_unlock(&gt641xx_timer_lock); 61 raw_spin_unlock(&gt641xx_timer_lock);
62 62
63 return 0; 63 return 0;
64} 64}
@@ -68,7 +68,7 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode,
68{ 68{
69 u32 ctrl; 69 u32 ctrl;
70 70
71 spin_lock(&gt641xx_timer_lock); 71 raw_spin_lock(&gt641xx_timer_lock);
72 72
73 ctrl = GT_READ(GT_TC_CONTROL_OFS); 73 ctrl = GT_READ(GT_TC_CONTROL_OFS);
74 ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); 74 ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
@@ -86,7 +86,7 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode,
86 86
87 GT_WRITE(GT_TC_CONTROL_OFS, ctrl); 87 GT_WRITE(GT_TC_CONTROL_OFS, ctrl);
88 88
89 spin_unlock(&gt641xx_timer_lock); 89 raw_spin_unlock(&gt641xx_timer_lock);
90} 90}
91 91
92static void gt641xx_timer0_event_handler(struct clock_event_device *dev) 92static void gt641xx_timer0_event_handler(struct clock_event_device *dev)