diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2012-03-14 05:29:21 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-05-15 11:49:00 -0400 |
commit | e2dbdc436b46250c8682ea57151a7afb45f271e1 (patch) | |
tree | 209d66461e92a9af7f46817ac63cdd6ca26ab1da /arch/mips | |
parent | 97bf7a190082457f84467b28baed14c8147476f2 (diff) |
MIPS: ath79: separate common PCI code
The 'pcibios_map_irq' and 'pcibios_plat_dev_init'
are common functions and only instance one of them
can be present in a single kernel.
Currently these functions can be built only if the
CONFIG_SOC_AR724X option is selected. However the
ath79 platform contain support for the AR71XX SoCs,.
The AR71XX SoCs have a differnet PCI controller,
and those will require a different code.
Move the common PCI code into a separeate file in
order to be able to use that with other SoCs as
well.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3485/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/ath79/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/ath79/pci.c | 46 | ||||
-rw-r--r-- | arch/mips/pci/pci-ath724x.c | 34 |
3 files changed, 47 insertions, 34 deletions
diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile index 3b911e09dbec..221a76a9fb45 100644 --- a/arch/mips/ath79/Makefile +++ b/arch/mips/ath79/Makefile | |||
@@ -11,6 +11,7 @@ | |||
11 | obj-y := prom.o setup.o irq.o common.o clock.o gpio.o | 11 | obj-y := prom.o setup.o irq.o common.o clock.o gpio.o |
12 | 12 | ||
13 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 13 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
14 | obj-$(CONFIG_PCI) += pci.o | ||
14 | 15 | ||
15 | # | 16 | # |
16 | # Devices | 17 | # Devices |
diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c new file mode 100644 index 000000000000..8db076e4542c --- /dev/null +++ b/arch/mips/ath79/pci.c | |||
@@ -0,0 +1,46 @@ | |||
1 | /* | ||
2 | * Atheros AR71XX/AR724X specific PCI setup code | ||
3 | * | ||
4 | * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License version 2 as published | ||
8 | * by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/pci.h> | ||
12 | #include <asm/mach-ath79/pci-ath724x.h> | ||
13 | |||
14 | static struct ath724x_pci_data *pci_data; | ||
15 | static int pci_data_size; | ||
16 | |||
17 | void ath724x_pci_add_data(struct ath724x_pci_data *data, int size) | ||
18 | { | ||
19 | pci_data = data; | ||
20 | pci_data_size = size; | ||
21 | } | ||
22 | |||
23 | int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) | ||
24 | { | ||
25 | unsigned int devfn = dev->devfn; | ||
26 | int irq = -1; | ||
27 | |||
28 | if (devfn > pci_data_size - 1) | ||
29 | return irq; | ||
30 | |||
31 | irq = pci_data[devfn].irq; | ||
32 | |||
33 | return irq; | ||
34 | } | ||
35 | |||
36 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
37 | { | ||
38 | unsigned int devfn = dev->devfn; | ||
39 | |||
40 | if (devfn > pci_data_size - 1) | ||
41 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
42 | |||
43 | dev->dev.platform_data = pci_data[devfn].pdata; | ||
44 | |||
45 | return PCIBIOS_SUCCESSFUL; | ||
46 | } | ||
diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ath724x.c index a4dd24a4130b..1e810be22d26 100644 --- a/arch/mips/pci/pci-ath724x.c +++ b/arch/mips/pci/pci-ath724x.c | |||
@@ -9,7 +9,6 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/pci.h> | 11 | #include <linux/pci.h> |
12 | #include <asm/mach-ath79/pci-ath724x.h> | ||
13 | 12 | ||
14 | #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) | 13 | #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) |
15 | #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) | 14 | #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) |
@@ -19,8 +18,6 @@ | |||
19 | #define ATH724X_PCI_MEM_SIZE 0x08000000 | 18 | #define ATH724X_PCI_MEM_SIZE 0x08000000 |
20 | 19 | ||
21 | static DEFINE_SPINLOCK(ath724x_pci_lock); | 20 | static DEFINE_SPINLOCK(ath724x_pci_lock); |
22 | static struct ath724x_pci_data *pci_data; | ||
23 | static int pci_data_size; | ||
24 | 21 | ||
25 | static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, | 22 | static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, |
26 | int size, uint32_t *value) | 23 | int size, uint32_t *value) |
@@ -133,37 +130,6 @@ static struct pci_controller ath724x_pci_controller = { | |||
133 | .mem_resource = &ath724x_mem_resource, | 130 | .mem_resource = &ath724x_mem_resource, |
134 | }; | 131 | }; |
135 | 132 | ||
136 | void ath724x_pci_add_data(struct ath724x_pci_data *data, int size) | ||
137 | { | ||
138 | pci_data = data; | ||
139 | pci_data_size = size; | ||
140 | } | ||
141 | |||
142 | int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) | ||
143 | { | ||
144 | unsigned int devfn = dev->devfn; | ||
145 | int irq = -1; | ||
146 | |||
147 | if (devfn > pci_data_size - 1) | ||
148 | return irq; | ||
149 | |||
150 | irq = pci_data[devfn].irq; | ||
151 | |||
152 | return irq; | ||
153 | } | ||
154 | |||
155 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
156 | { | ||
157 | unsigned int devfn = dev->devfn; | ||
158 | |||
159 | if (devfn > pci_data_size - 1) | ||
160 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
161 | |||
162 | dev->dev.platform_data = pci_data[devfn].pdata; | ||
163 | |||
164 | return PCIBIOS_SUCCESSFUL; | ||
165 | } | ||
166 | |||
167 | static int __init ath724x_pcibios_init(void) | 133 | static int __init ath724x_pcibios_init(void) |
168 | { | 134 | { |
169 | register_pci_controller(&ath724x_pci_controller); | 135 | register_pci_controller(&ath724x_pci_controller); |