diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2011-06-20 15:26:10 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2011-12-07 17:02:46 -0500 |
commit | c279b7759602d4ef97d45f3eb2cdf36a713eb99a (patch) | |
tree | 1c399f392565472b4726cc29b71e4d770266d00c /arch/mips | |
parent | 9d6b204f93cfeb7ec5e6ec499aca43d2c1d6da3f (diff) |
MIPS: ath79: add AR933X specific USB platform device registration
Also select the USB_ARCH_HAS_EHCI symbol in order to make the
EHCI driver available.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/ath79/Kconfig | 1 | ||||
-rw-r--r-- | arch/mips/ath79/dev-usb.c | 19 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 7 |
3 files changed, 27 insertions, 0 deletions
diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index 90edf27609e8..c3680c83a102 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig | |||
@@ -42,6 +42,7 @@ config SOC_AR913X | |||
42 | def_bool n | 42 | def_bool n |
43 | 43 | ||
44 | config SOC_AR933X | 44 | config SOC_AR933X |
45 | select USB_ARCH_HAS_EHCI | ||
45 | def_bool n | 46 | def_bool n |
46 | 47 | ||
47 | config ATH79_DEV_AR913X_WMAC | 48 | config ATH79_DEV_AR913X_WMAC |
diff --git a/arch/mips/ath79/dev-usb.c b/arch/mips/ath79/dev-usb.c index c3f1999c761b..002d6d2afe04 100644 --- a/arch/mips/ath79/dev-usb.c +++ b/arch/mips/ath79/dev-usb.c | |||
@@ -163,6 +163,23 @@ static void __init ar913x_usb_setup(void) | |||
163 | platform_device_register(&ath79_ehci_device); | 163 | platform_device_register(&ath79_ehci_device); |
164 | } | 164 | } |
165 | 165 | ||
166 | static void __init ar933x_usb_setup(void) | ||
167 | { | ||
168 | ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); | ||
169 | mdelay(10); | ||
170 | |||
171 | ath79_device_reset_clear(AR933X_RESET_USB_HOST); | ||
172 | mdelay(10); | ||
173 | |||
174 | ath79_device_reset_clear(AR933X_RESET_USB_PHY); | ||
175 | mdelay(10); | ||
176 | |||
177 | ath79_ehci_resources[0].start = AR933X_EHCI_BASE; | ||
178 | ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1; | ||
179 | ath79_ehci_device.name = "ar933x-ehci"; | ||
180 | platform_device_register(&ath79_ehci_device); | ||
181 | } | ||
182 | |||
166 | void __init ath79_register_usb(void) | 183 | void __init ath79_register_usb(void) |
167 | { | 184 | { |
168 | if (soc_is_ar71xx()) | 185 | if (soc_is_ar71xx()) |
@@ -173,6 +190,8 @@ void __init ath79_register_usb(void) | |||
173 | ar724x_usb_setup(); | 190 | ar724x_usb_setup(); |
174 | else if (soc_is_ar913x()) | 191 | else if (soc_is_ar913x()) |
175 | ar913x_usb_setup(); | 192 | ar913x_usb_setup(); |
193 | else if (soc_is_ar933x()) | ||
194 | ar933x_usb_setup(); | ||
176 | else | 195 | else |
177 | BUG(); | 196 | BUG(); |
178 | } | 197 | } |
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index e65c10dd159b..733bacace778 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h | |||
@@ -56,6 +56,9 @@ | |||
56 | #define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) | 56 | #define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) |
57 | #define AR933X_UART_SIZE 0x14 | 57 | #define AR933X_UART_SIZE 0x14 |
58 | 58 | ||
59 | #define AR933X_EHCI_BASE 0x1b000000 | ||
60 | #define AR933X_EHCI_SIZE 0x1000 | ||
61 | |||
59 | /* | 62 | /* |
60 | * DDR_CTRL block | 63 | * DDR_CTRL block |
61 | */ | 64 | */ |
@@ -230,6 +233,10 @@ | |||
230 | #define AR913X_RESET_USB_HOST BIT(5) | 233 | #define AR913X_RESET_USB_HOST BIT(5) |
231 | #define AR913X_RESET_USB_PHY BIT(4) | 234 | #define AR913X_RESET_USB_PHY BIT(4) |
232 | 235 | ||
236 | #define AR933X_RESET_USB_HOST BIT(5) | ||
237 | #define AR933X_RESET_USB_PHY BIT(4) | ||
238 | #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) | ||
239 | |||
233 | #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) | 240 | #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) |
234 | 241 | ||
235 | #define REV_ID_MAJOR_MASK 0xfff0 | 242 | #define REV_ID_MAJOR_MASK 0xfff0 |