diff options
author | Markos Chandras <markos.chandras@imgtec.com> | 2015-03-03 13:48:49 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2015-04-10 09:41:46 -0400 |
commit | aebac99384f7a6d83a3dcd42bf2481eed2670083 (patch) | |
tree | 48bddc71c508aadf31138acdd6c3fe81a76c7370 /arch/mips | |
parent | 518222161d4a2d3f3b2700098563b62383f83878 (diff) |
MIPS: kernel: entry.S: Set correct ISA level for mips_ihb
Commit 6ebb496ffc7e("MIPS: kernel: entry.S: Add MIPS R6 related
definitions") added the MIPSR6 definition but it did not update the
ISA level of the actual assembly code so a pre-MIPSR6 jr.hb instruction
was generated instead. Fix this by using the MISP_ISA_LEVEL_RAW macro.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Fixes: 6ebb496ffc7e("MIPS: kernel: entry.S: Add MIPS R6 related definitions")
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9386/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/kernel/entry.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index af41ba6db960..7791840cf22c 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S | |||
@@ -10,6 +10,7 @@ | |||
10 | 10 | ||
11 | #include <asm/asm.h> | 11 | #include <asm/asm.h> |
12 | #include <asm/asmmacro.h> | 12 | #include <asm/asmmacro.h> |
13 | #include <asm/compiler.h> | ||
13 | #include <asm/regdef.h> | 14 | #include <asm/regdef.h> |
14 | #include <asm/mipsregs.h> | 15 | #include <asm/mipsregs.h> |
15 | #include <asm/stackframe.h> | 16 | #include <asm/stackframe.h> |
@@ -185,7 +186,7 @@ syscall_exit_work: | |||
185 | * For C code use the inline version named instruction_hazard(). | 186 | * For C code use the inline version named instruction_hazard(). |
186 | */ | 187 | */ |
187 | LEAF(mips_ihb) | 188 | LEAF(mips_ihb) |
188 | .set mips32r2 | 189 | .set MIPS_ISA_LEVEL_RAW |
189 | jr.hb ra | 190 | jr.hb ra |
190 | nop | 191 | nop |
191 | END(mips_ihb) | 192 | END(mips_ihb) |