MIPS: uasm: Add lb uasm instruction

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

4 files changed, 12 insertions, 8 deletions

diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index 719a88401afa..f8d63b3b40b4 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -123,6 +123,7 @@ Ip_u1(_j);
 Ip_u1(_jal);
 Ip_u2u1(_jalr);
 Ip_u1(_jr);
+Ip_u2s3u1(_lb);
 Ip_u2s3u1(_ld);
 Ip_u3u1u2(_ldx);
 Ip_u2s3u1(_lh);
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index 1c390a1f3862..775c2800cba2 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -81,6 +81,7 @@ static struct insn insn_table_MM[] = {
         { insn_jal, M(mm_jal32_op, 0, 0, 0, 0, 0), JIMM },
         { insn_jalr, M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RT | RS },
         { insn_jr, M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS },
+        { insn_lb, M(mm_lb32_op, 0, 0, 0, 0, 0), RT | RS | SIMM },
         { insn_ld, 0, 0 },
         { insn_lh, M(mm_lh32_op, 0, 0, 0, 0, 0), RS | RS | SIMM },
         { insn_ll, M(mm_pool32c_op, 0, 0, (mm_ll_func << 1), 0, 0), RS | RT | SIMM },
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 4f9114b2ff34..38792c2364f5 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -86,6 +86,7 @@ static struct insn insn_table[] = {
         { insn_jalr,  M(spec_op, 0, 0, 0, 0, jalr_op), RS | RD },
         { insn_j,  M(j_op, 0, 0, 0, 0, 0),  JIMM },
         { insn_jr,  M(spec_op, 0, 0, 0, 0, jr_op),  RS },
+        { insn_lb, M(lb_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
         { insn_ld,  M(ld_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
         { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },
         { insn_lh,  M(lw_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 8cf1fb21cedf..00515805fe41 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -49,14 +49,14 @@ enum opcode {
         insn_bne, insn_cache, insn_daddiu, insn_daddu, insn_dins, insn_dinsm,
         insn_divu, insn_dmfc0, insn_dmtc0, insn_drotr, insn_drotr32, insn_dsll,
         insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret,
-        insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld,
-        insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx,
-        insn_mfc0, insn_mfhi, insn_mflo, insn_mtc0, insn_mul, insn_or,
-        insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd, insn_sd,
-        insn_sll, insn_sllv, insn_sltiu, insn_sltu, insn_sra, insn_srl,
-        insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall, insn_tlbp,
-        insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh, insn_xor,
-        insn_xori, insn_yield,
+        insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_lb,
+        insn_ld, insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw,
+        insn_lwx, insn_mfc0, insn_mfhi, insn_mflo, insn_mtc0, insn_mul,
+        insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd,
+        insn_sd, insn_sll, insn_sllv, insn_sltiu, insn_sltu, insn_sra,
+        insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall,
+        insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh,
+        insn_xor, insn_xori, insn_yield,
 };
 
 struct insn {
@@ -269,6 +269,7 @@ I_u1(_j)
 I_u1(_jal)
 I_u2u1(_jalr)
 I_u1(_jr)
+I_u2s3u1(_lb)
 I_u2s3u1(_ld)
 I_u2s3u1(_lh)
 I_u2s3u1(_ll)