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authorManuel Lauss <manuel.lauss@googlemail.com>2011-11-10 07:06:21 -0500
committerRalf Baechle <ralf@linux-mips.org>2011-12-07 17:02:06 -0500
commit7c4b24da07d99b5473de7cc7ba3f67d85b889bc0 (patch)
treeec1369de73ee0e682c07377b933706600a6725ff /arch/mips
parent8e026910fcd46c3cfcdf5cff7ebba013bb8ec85c (diff)
MIPS: Alchemy: merge devboard code into single per-board files.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2884/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/alchemy/devboards/Makefile16
-rw-r--r--arch/mips/alchemy/devboards/db1200.c (renamed from arch/mips/alchemy/devboards/db1200/platform.c)95
-rw-r--r--arch/mips/alchemy/devboards/db1200/Makefile1
-rw-r--r--arch/mips/alchemy/devboards/db1200/setup.c81
-rw-r--r--arch/mips/alchemy/devboards/db1x00.c (renamed from arch/mips/alchemy/devboards/db1x00/platform.c)63
-rw-r--r--arch/mips/alchemy/devboards/db1x00/Makefile8
-rw-r--r--arch/mips/alchemy/devboards/db1x00/board_setup.c108
-rw-r--r--arch/mips/alchemy/devboards/pb1100.c (renamed from arch/mips/alchemy/devboards/pb1100/board_setup.c)92
-rw-r--r--arch/mips/alchemy/devboards/pb1100/Makefile8
-rw-r--r--arch/mips/alchemy/devboards/pb1100/platform.c77
-rw-r--r--arch/mips/alchemy/devboards/pb1200.c (renamed from arch/mips/alchemy/devboards/pb1200/platform.c)135
-rw-r--r--arch/mips/alchemy/devboards/pb1200/Makefile5
-rw-r--r--arch/mips/alchemy/devboards/pb1200/board_setup.c174
-rw-r--r--arch/mips/alchemy/devboards/pb1500.c (renamed from arch/mips/alchemy/devboards/pb1500/board_setup.c)113
-rw-r--r--arch/mips/alchemy/devboards/pb1500/Makefile8
-rw-r--r--arch/mips/alchemy/devboards/pb1500/platform.c94
-rw-r--r--arch/mips/alchemy/devboards/pb1550.c (renamed from arch/mips/alchemy/devboards/pb1550/platform.c)46
-rw-r--r--arch/mips/alchemy/devboards/pb1550/Makefile8
-rw-r--r--arch/mips/alchemy/devboards/pb1550/board_setup.c80
19 files changed, 464 insertions, 748 deletions
diff --git a/arch/mips/alchemy/devboards/Makefile b/arch/mips/alchemy/devboards/Makefile
index 3467ec94d8b1..f5628523c694 100644
--- a/arch/mips/alchemy/devboards/Makefile
+++ b/arch/mips/alchemy/devboards/Makefile
@@ -4,13 +4,13 @@
4 4
5obj-y += prom.o bcsr.o platform.o 5obj-y += prom.o bcsr.o platform.o
6obj-$(CONFIG_PM) += pm.o 6obj-$(CONFIG_PM) += pm.o
7obj-$(CONFIG_MIPS_PB1100) += pb1100/ 7obj-$(CONFIG_MIPS_PB1100) += pb1100.o
8obj-$(CONFIG_MIPS_PB1200) += pb1200/ 8obj-$(CONFIG_MIPS_PB1200) += pb1200.o
9obj-$(CONFIG_MIPS_PB1500) += pb1500/ 9obj-$(CONFIG_MIPS_PB1500) += pb1500.o
10obj-$(CONFIG_MIPS_PB1550) += pb1550/ 10obj-$(CONFIG_MIPS_PB1550) += pb1550.o
11obj-$(CONFIG_MIPS_DB1000) += db1x00/ 11obj-$(CONFIG_MIPS_DB1000) += db1x00.o
12obj-$(CONFIG_MIPS_DB1100) += db1x00/ 12obj-$(CONFIG_MIPS_DB1100) += db1x00.o
13obj-$(CONFIG_MIPS_DB1200) += db1200/ 13obj-$(CONFIG_MIPS_DB1200) += db1200.o
14obj-$(CONFIG_MIPS_DB1300) += db1300.o 14obj-$(CONFIG_MIPS_DB1300) += db1300.o
15obj-$(CONFIG_MIPS_DB1500) += db1x00/ 15obj-$(CONFIG_MIPS_DB1500) += db1x00.o
16obj-$(CONFIG_MIPS_DB1550) += db1550.o 16obj-$(CONFIG_MIPS_DB1550) += db1550.o
diff --git a/arch/mips/alchemy/devboards/db1200/platform.c b/arch/mips/alchemy/devboards/db1200.c
index c61867c93c4a..43f5f1be9d68 100644
--- a/arch/mips/alchemy/devboards/db1200/platform.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * DBAu1200 board platform device registration 2 * DBAu1200 board platform device registration
3 * 3 *
4 * Copyright (C) 2008-2009 Manuel Lauss 4 * Copyright (C) 2008-2011 Manuel Lauss
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -22,6 +22,7 @@
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/i2c.h> 23#include <linux/i2c.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/interrupt.h>
25#include <linux/io.h> 26#include <linux/io.h>
26#include <linux/leds.h> 27#include <linux/leds.h>
27#include <linux/mmc/host.h> 28#include <linux/mmc/host.h>
@@ -33,14 +34,64 @@
33#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
34#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
35#include <linux/smc91x.h> 36#include <linux/smc91x.h>
36 37#include <asm/mach-au1x00/au1000.h>
37#include <asm/mach-au1x00/au1100_mmc.h> 38#include <asm/mach-au1x00/au1100_mmc.h>
38#include <asm/mach-au1x00/au1xxx_dbdma.h> 39#include <asm/mach-au1x00/au1xxx_dbdma.h>
39#include <asm/mach-au1x00/au1550_spi.h> 40#include <asm/mach-au1x00/au1550_spi.h>
40#include <asm/mach-db1x00/bcsr.h> 41#include <asm/mach-db1x00/bcsr.h>
41#include <asm/mach-db1x00/db1200.h> 42#include <asm/mach-db1x00/db1200.h>
42 43
43#include "../platform.h" 44#include "platform.h"
45
46
47const char *get_system_type(void)
48{
49 return "DB1200";
50}
51
52void __init board_setup(void)
53{
54 unsigned long freq0, clksrc, div, pfc;
55 unsigned short whoami;
56
57 bcsr_init(DB1200_BCSR_PHYS_ADDR,
58 DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
59
60 whoami = bcsr_read(BCSR_WHOAMI);
61 printk(KERN_INFO "Alchemy/AMD/RMI DB1200 Board, CPLD Rev %d"
62 " Board-ID %d Daughtercard ID %d\n",
63 (whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);
64
65 /* SMBus/SPI on PSC0, Audio on PSC1 */
66 pfc = __raw_readl((void __iomem *)SYS_PINFUNC);
67 pfc &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
68 pfc &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B | SYS_PINFUNC_FS3);
69 pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */
70 __raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
71 wmb();
72
73 /* Clock configurations: PSC0: ~50MHz via Clkgen0, derived from
74 * CPU clock; all other clock generators off/unused.
75 */
76 div = (get_au1x00_speed() + 25000000) / 50000000;
77 if (div & 1)
78 div++;
79 div = ((div >> 1) - 1) & 0xff;
80
81 freq0 = div << SYS_FC_FRDIV0_BIT;
82 __raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
83 wmb();
84 freq0 |= SYS_FC_FE0; /* enable F0 */
85 __raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
86 wmb();
87
88 /* psc0_intclk comes 1:1 from F0 */
89 clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;
90 __raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);
91 wmb();
92}
93
94/******************************************************************************/
44 95
45static struct mtd_partition db1200_spiflash_parts[] = { 96static struct mtd_partition db1200_spiflash_parts[] = {
46 { 97 {
@@ -78,18 +129,9 @@ static struct spi_board_info db1200_spi_devs[] __initdata = {
78}; 129};
79 130
80static struct i2c_board_info db1200_i2c_devs[] __initdata = { 131static struct i2c_board_info db1200_i2c_devs[] __initdata = {
81 { 132 { I2C_BOARD_INFO("24c04", 0x52), }, /* AT24C04-10 I2C eeprom */
82 /* AT24C04-10 I2C eeprom */ 133 { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
83 I2C_BOARD_INFO("24c04", 0x52), 134 { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec WM8731 */
84 },
85 {
86 /* Philips NE1619 temp/voltage sensor (adm1025 drv) */
87 I2C_BOARD_INFO("ne1619", 0x2d),
88 },
89 {
90 /* I2S audio codec WM8731 */
91 I2C_BOARD_INFO("wm8731", 0x1b),
92 },
93}; 135};
94 136
95/**********************************************************************/ 137/**********************************************************************/
@@ -206,7 +248,7 @@ static struct platform_device db1200_eth_dev = {
206static struct resource db1200_ide_res[] = { 248static struct resource db1200_ide_res[] = {
207 [0] = { 249 [0] = {
208 .start = DB1200_IDE_PHYS_ADDR, 250 .start = DB1200_IDE_PHYS_ADDR,
209 .end = DB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1, 251 .end = DB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1,
210 .flags = IORESOURCE_MEM, 252 .flags = IORESOURCE_MEM,
211 }, 253 },
212 [1] = { 254 [1] = {
@@ -221,13 +263,13 @@ static struct resource db1200_ide_res[] = {
221 }, 263 },
222}; 264};
223 265
224static u64 ide_dmamask = DMA_BIT_MASK(32); 266static u64 au1200_ide_dmamask = DMA_BIT_MASK(32);
225 267
226static struct platform_device db1200_ide_dev = { 268static struct platform_device db1200_ide_dev = {
227 .name = "au1200-ide", 269 .name = "au1200-ide",
228 .id = 0, 270 .id = 0,
229 .dev = { 271 .dev = {
230 .dma_mask = &ide_dmamask, 272 .dma_mask = &au1200_ide_dmamask,
231 .coherent_dma_mask = DMA_BIT_MASK(32), 273 .coherent_dma_mask = DMA_BIT_MASK(32),
232 }, 274 },
233 .num_resources = ARRAY_SIZE(db1200_ide_res), 275 .num_resources = ARRAY_SIZE(db1200_ide_res),
@@ -533,6 +575,21 @@ static int __init db1200_dev_init(void)
533 unsigned short sw; 575 unsigned short sw;
534 int swapped; 576 int swapped;
535 577
578 /* GPIO7 is low-level triggered CPLD cascade */
579 irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
580 bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
581
582 /* insert/eject pairs: one of both is always screaming. To avoid
583 * issues they must not be automatically enabled when initially
584 * requested.
585 */
586 irq_set_status_flags(DB1200_SD0_INSERT_INT, IRQ_NOAUTOEN);
587 irq_set_status_flags(DB1200_SD0_EJECT_INT, IRQ_NOAUTOEN);
588 irq_set_status_flags(DB1200_PC0_INSERT_INT, IRQ_NOAUTOEN);
589 irq_set_status_flags(DB1200_PC0_EJECT_INT, IRQ_NOAUTOEN);
590 irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
591 irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);
592
536 i2c_register_board_info(0, db1200_i2c_devs, 593 i2c_register_board_info(0, db1200_i2c_devs,
537 ARRAY_SIZE(db1200_i2c_devs)); 594 ARRAY_SIZE(db1200_i2c_devs));
538 spi_register_board_info(db1200_spi_devs, 595 spi_register_board_info(db1200_spi_devs,
@@ -595,7 +652,7 @@ static int __init db1200_dev_init(void)
595 652
596 /* Audio PSC clock is supplied externally. (FIXME: platdata!!) */ 653 /* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
597 __raw_writel(PSC_SEL_CLK_SERCLK, 654 __raw_writel(PSC_SEL_CLK_SERCLK,
598 (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET); 655 (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
599 wmb(); 656 wmb();
600 657
601 db1x_register_pcmcia_socket( 658 db1x_register_pcmcia_socket(
diff --git a/arch/mips/alchemy/devboards/db1200/Makefile b/arch/mips/alchemy/devboards/db1200/Makefile
deleted file mode 100644
index 17840a5e2738..000000000000
--- a/arch/mips/alchemy/devboards/db1200/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-y += setup.o platform.o
diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c
deleted file mode 100644
index 4a8980027ecf..000000000000
--- a/arch/mips/alchemy/devboards/db1200/setup.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * Alchemy/AMD/RMI DB1200 board setup.
3 *
4 * Licensed under the terms outlined in the file COPYING in the root of
5 * this source archive.
6 */
7
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/io.h>
11#include <linux/kernel.h>
12#include <asm/mach-au1x00/au1000.h>
13#include <asm/mach-db1x00/bcsr.h>
14#include <asm/mach-db1x00/db1200.h>
15
16const char *get_system_type(void)
17{
18 return "Alchemy Db1200";
19}
20
21void __init board_setup(void)
22{
23 unsigned long freq0, clksrc, div, pfc;
24 unsigned short whoami;
25
26 bcsr_init(DB1200_BCSR_PHYS_ADDR,
27 DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
28
29 whoami = bcsr_read(BCSR_WHOAMI);
30 printk(KERN_INFO "Alchemy/AMD/RMI DB1200 Board, CPLD Rev %d"
31 " Board-ID %d Daughtercard ID %d\n",
32 (whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);
33
34 /* SMBus/SPI on PSC0, Audio on PSC1 */
35 pfc = __raw_readl((void __iomem *)SYS_PINFUNC);
36 pfc &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
37 pfc &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B | SYS_PINFUNC_FS3);
38 pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */
39 __raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
40 wmb();
41
42 /* Clock configurations: PSC0: ~50MHz via Clkgen0, derived from
43 * CPU clock; all other clock generators off/unused.
44 */
45 div = (get_au1x00_speed() + 25000000) / 50000000;
46 if (div & 1)
47 div++;
48 div = ((div >> 1) - 1) & 0xff;
49
50 freq0 = div << SYS_FC_FRDIV0_BIT;
51 __raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
52 wmb();
53 freq0 |= SYS_FC_FE0; /* enable F0 */
54 __raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
55 wmb();
56
57 /* psc0_intclk comes 1:1 from F0 */
58 clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;
59 __raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);
60 wmb();
61}
62
63static int __init db1200_arch_init(void)
64{
65 /* GPIO7 is low-level triggered CPLD cascade */
66 irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
67 bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
68
69 /* insert/eject pairs: one of both is always screaming. To avoid
70 * issues they must not be automatically enabled when initially
71 * requested.
72 */
73 irq_set_status_flags(DB1200_SD0_INSERT_INT, IRQ_NOAUTOEN);
74 irq_set_status_flags(DB1200_SD0_EJECT_INT, IRQ_NOAUTOEN);
75 irq_set_status_flags(DB1200_PC0_INSERT_INT, IRQ_NOAUTOEN);
76 irq_set_status_flags(DB1200_PC0_EJECT_INT, IRQ_NOAUTOEN);
77 irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
78 irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);
79 return 0;
80}
81arch_initcall(db1200_arch_init);
diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00.c
index 67b36e8a4c98..589ae2435cbe 100644
--- a/arch/mips/alchemy/devboards/db1x00/platform.c
+++ b/arch/mips/alchemy/devboards/db1x00.c
@@ -1,7 +1,8 @@
1/* 1/*
2 * DBAu1xxx board platform device registration 2 * DBAu1000/1500/1100 board support
3 * 3 *
4 * Copyright (C) 2009 Manuel Lauss 4 * Copyright 2000, 2008 MontaVista Software Inc.
5 * Author: MontaVista Software, Inc. <source@mvista.com>
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
@@ -18,20 +19,61 @@
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */ 20 */
20 21
22#include <linux/dma-mapping.h>
23#include <linux/gpio.h>
21#include <linux/init.h> 24#include <linux/init.h>
22#include <linux/interrupt.h> 25#include <linux/interrupt.h>
23#include <linux/dma-mapping.h>
24#include <linux/platform_device.h> 26#include <linux/platform_device.h>
25 27#include <linux/pm.h>
26#include <asm/mach-au1x00/au1000.h> 28#include <asm/mach-au1x00/au1000.h>
27#include <asm/mach-au1x00/au1000_dma.h> 29#include <asm/mach-au1x00/au1000_dma.h>
28#include <asm/mach-db1x00/bcsr.h> 30#include <asm/mach-db1x00/bcsr.h>
29#include "../platform.h" 31#include <asm/reboot.h>
32#include <prom.h>
33#include "platform.h"
30 34
31struct pci_dev; 35struct pci_dev;
32 36
37const char *get_system_type(void)
38{
39 return "Alchemy Db1x00";
40}
41
42void __init board_setup(void)
43{
44#ifdef CONFIG_MIPS_DB1000
45 printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
46#endif
47#ifdef CONFIG_MIPS_DB1500
48 printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
49#endif
50#ifdef CONFIG_MIPS_DB1100
51 printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
52#endif
53 /* initialize board register space */
54 bcsr_init(DB1000_BCSR_PHYS_ADDR,
55 DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
56
57#if defined(CONFIG_IRDA) && defined(CONFIG_AU1000_FIR)
58 {
59 u32 pin_func;
60
61 /* Set IRFIRSEL instead of GPIO15 */
62 pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
63 au_writel(pin_func, SYS_PINFUNC);
64 /* Power off until the driver is in use */
65 bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
66 BCSR_RESETS_IRDA_MODE_OFF);
67 }
68#endif
69 bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
70
71 /* Enable GPIO[31:0] inputs */
72 alchemy_gpio1_input_enable();
73}
74
33/* DB1xxx PCMCIA interrupt sources: 75/* DB1xxx PCMCIA interrupt sources:
34 * CD0/1 GPIO0/3 76 * CD0/1 GPIO0/3
35 * STSCHG0/1 GPIO1/4 77 * STSCHG0/1 GPIO1/4
36 * CARD0/1 GPIO2/5 78 * CARD0/1 GPIO2/5
37 */ 79 */
@@ -174,6 +216,13 @@ static struct platform_device db1x00_audio_dev = {
174 216
175static int __init db1xxx_dev_init(void) 217static int __init db1xxx_dev_init(void)
176{ 218{
219 irq_set_irq_type(DB1XXX_PCMCIA_CD0, IRQ_TYPE_EDGE_BOTH);
220 irq_set_irq_type(DB1XXX_PCMCIA_CD1, IRQ_TYPE_EDGE_BOTH);
221 irq_set_irq_type(DB1XXX_PCMCIA_CARD0, IRQ_TYPE_LEVEL_LOW);
222 irq_set_irq_type(DB1XXX_PCMCIA_CARD1, IRQ_TYPE_LEVEL_LOW);
223 irq_set_irq_type(DB1XXX_PCMCIA_STSCHG0, IRQ_TYPE_LEVEL_LOW);
224 irq_set_irq_type(DB1XXX_PCMCIA_STSCHG1, IRQ_TYPE_LEVEL_LOW);
225
177 db1x_register_pcmcia_socket( 226 db1x_register_pcmcia_socket(
178 AU1000_PCMCIA_ATTR_PHYS_ADDR, 227 AU1000_PCMCIA_ATTR_PHYS_ADDR,
179 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, 228 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
@@ -201,7 +250,7 @@ static int __init db1xxx_dev_init(void)
201 platform_device_register(&alchemy_ac97c_dev); 250 platform_device_register(&alchemy_ac97c_dev);
202 platform_device_register(&db1x00_audio_dev); 251 platform_device_register(&db1x00_audio_dev);
203 252
204 db1x_register_norflash(0x02000000, 4 /* 32bit */, F_SWAPPED); 253 db1x_register_norflash(32 << 20, 4 /* 32bit */, F_SWAPPED);
205 return 0; 254 return 0;
206} 255}
207device_initcall(db1xxx_dev_init); 256device_initcall(db1xxx_dev_init);
diff --git a/arch/mips/alchemy/devboards/db1x00/Makefile b/arch/mips/alchemy/devboards/db1x00/Makefile
deleted file mode 100644
index 613c0c0c8be9..000000000000
--- a/arch/mips/alchemy/devboards/db1x00/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for the Alchemy Semiconductor DBAu1xx0 boards.
6#
7
8obj-y := board_setup.o platform.o
diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c
deleted file mode 100644
index 2dbebcba0206..000000000000
--- a/arch/mips/alchemy/devboards/db1x00/board_setup.c
+++ /dev/null
@@ -1,108 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Db1x00 board setup.
5 *
6 * Copyright 2000, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#include <linux/gpio.h>
31#include <linux/init.h>
32#include <linux/interrupt.h>
33#include <linux/pm.h>
34
35#include <asm/mach-au1x00/au1000.h>
36#include <asm/mach-au1x00/au1xxx_eth.h>
37#include <asm/mach-db1x00/db1x00.h>
38#include <asm/mach-db1x00/bcsr.h>
39#include <asm/reboot.h>
40
41#include <prom.h>
42
43const char *get_system_type(void)
44{
45 return "Alchemy Db1x00";
46}
47
48
49void __init board_setup(void)
50{
51#ifdef CONFIG_MIPS_DB1000
52 printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
53#endif
54#ifdef CONFIG_MIPS_DB1500
55 printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
56#endif
57#ifdef CONFIG_MIPS_DB1100
58 printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
59#endif
60 /* initialize board register space */
61 bcsr_init(DB1000_BCSR_PHYS_ADDR,
62 DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
63
64#if defined(CONFIG_IRDA) && defined(CONFIG_AU1000_FIR)
65 {
66 u32 pin_func;
67
68 /* Set IRFIRSEL instead of GPIO15 */
69 pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
70 au_writel(pin_func, SYS_PINFUNC);
71 /* Power off until the driver is in use */
72 bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
73 BCSR_RESETS_IRDA_MODE_OFF);
74 }
75#endif
76 bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
77
78 /* Enable GPIO[31:0] inputs */
79 alchemy_gpio1_input_enable();
80}
81
82static int __init db1x00_init_irq(void)
83{
84#if defined(CONFIG_MIPS_DB1500)
85 irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
86 irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */
87 irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */
88 irq_set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */
89 irq_set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
90 irq_set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */
91#elif defined(CONFIG_MIPS_DB1100)
92 irq_set_irq_type(AU1100_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
93 irq_set_irq_type(AU1100_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */
94 irq_set_irq_type(AU1100_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */
95 irq_set_irq_type(AU1100_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */
96 irq_set_irq_type(AU1100_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
97 irq_set_irq_type(AU1100_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */
98#elif defined(CONFIG_MIPS_DB1000)
99 irq_set_irq_type(AU1000_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
100 irq_set_irq_type(AU1000_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */
101 irq_set_irq_type(AU1000_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */
102 irq_set_irq_type(AU1000_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */
103 irq_set_irq_type(AU1000_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
104 irq_set_irq_type(AU1000_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */
105#endif
106 return 0;
107}
108arch_initcall(db1x00_init_irq);
diff --git a/arch/mips/alchemy/devboards/pb1100/board_setup.c b/arch/mips/alchemy/devboards/pb1100.c
index d108fd573aaf..cff50d05ddd4 100644
--- a/arch/mips/alchemy/devboards/pb1100/board_setup.c
+++ b/arch/mips/alchemy/devboards/pb1100.c
@@ -1,42 +1,37 @@
1/* 1/*
2 * Copyright 2002, 2008 MontaVista Software Inc. 2 * Pb1100 board platform device registration
3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 * 3 *
5 * This program is free software; you can redistribute it and/or modify it 4 * Copyright (C) 2009 Manuel Lauss
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 * 5 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 6 * This program is free software; you can redistribute it and/or modify
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 7 * it under the terms of the GNU General Public License as published by
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 8 * the Free Software Foundation; either version 2 of the License, or
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 9 * (at your option) any later version.
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 * 10 *
21 * You should have received a copy of the GNU General Public License along 11 * This program is distributed in the hope that it will be useful,
22 * with this program; if not, write to the Free Software Foundation, Inc., 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * 675 Mass Ave, Cambridge, MA 02139, USA. 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 */ 19 */
25 20
21#include <linux/delay.h>
26#include <linux/gpio.h> 22#include <linux/gpio.h>
27#include <linux/init.h> 23#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/interrupt.h> 24#include <linux/interrupt.h>
30 25#include <linux/dma-mapping.h>
26#include <linux/platform_device.h>
31#include <asm/mach-au1x00/au1000.h> 27#include <asm/mach-au1x00/au1000.h>
32#include <asm/mach-db1x00/bcsr.h> 28#include <asm/mach-db1x00/bcsr.h>
33
34#include <prom.h> 29#include <prom.h>
35 30#include "platform.h"
36 31
37const char *get_system_type(void) 32const char *get_system_type(void)
38{ 33{
39 return "Alchemy Pb1100"; 34 return "PB1100";
40} 35}
41 36
42void __init board_setup(void) 37void __init board_setup(void)
@@ -115,13 +110,58 @@ void __init board_setup(void)
115 } 110 }
116} 111}
117 112
118static int __init pb1100_init_irq(void) 113/******************************************************************************/
114
115static struct resource au1100_lcd_resources[] = {
116 [0] = {
117 .start = AU1100_LCD_PHYS_ADDR,
118 .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
119 .flags = IORESOURCE_MEM,
120 },
121 [1] = {
122 .start = AU1100_LCD_INT,
123 .end = AU1100_LCD_INT,
124 .flags = IORESOURCE_IRQ,
125 }
126};
127
128static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
129
130static struct platform_device au1100_lcd_device = {
131 .name = "au1100-lcd",
132 .id = 0,
133 .dev = {
134 .dma_mask = &au1100_lcd_dmamask,
135 .coherent_dma_mask = DMA_BIT_MASK(32),
136 },
137 .num_resources = ARRAY_SIZE(au1100_lcd_resources),
138 .resource = au1100_lcd_resources,
139};
140
141static int __init pb1100_dev_init(void)
119{ 142{
143 int swapped;
144
120 irq_set_irq_type(AU1100_GPIO9_INT, IRQF_TRIGGER_LOW); /* PCCD# */ 145 irq_set_irq_type(AU1100_GPIO9_INT, IRQF_TRIGGER_LOW); /* PCCD# */
121 irq_set_irq_type(AU1100_GPIO10_INT, IRQF_TRIGGER_LOW); /* PCSTSCHG# */ 146 irq_set_irq_type(AU1100_GPIO10_INT, IRQF_TRIGGER_LOW); /* PCSTSCHG# */
122 irq_set_irq_type(AU1100_GPIO11_INT, IRQF_TRIGGER_LOW); /* PCCard# */ 147 irq_set_irq_type(AU1100_GPIO11_INT, IRQF_TRIGGER_LOW); /* PCCard# */
123 irq_set_irq_type(AU1100_GPIO13_INT, IRQF_TRIGGER_LOW); /* DC_IRQ# */ 148 irq_set_irq_type(AU1100_GPIO13_INT, IRQF_TRIGGER_LOW); /* DC_IRQ# */
124 149
150 /* PCMCIA. single socket, identical to Pb1500 */
151 db1x_register_pcmcia_socket(
152 AU1000_PCMCIA_ATTR_PHYS_ADDR,
153 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
154 AU1000_PCMCIA_MEM_PHYS_ADDR,
155 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
156 AU1000_PCMCIA_IO_PHYS_ADDR,
157 AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
158 AU1100_GPIO11_INT, AU1100_GPIO9_INT, /* card / insert */
159 /*AU1100_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
160
161 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
162 db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
163 platform_device_register(&au1100_lcd_device);
164
125 return 0; 165 return 0;
126} 166}
127arch_initcall(pb1100_init_irq); 167device_initcall(pb1100_dev_init);
diff --git a/arch/mips/alchemy/devboards/pb1100/Makefile b/arch/mips/alchemy/devboards/pb1100/Makefile
deleted file mode 100644
index 7e3756c83fe5..000000000000
--- a/arch/mips/alchemy/devboards/pb1100/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Copyright 2000, 2001, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for the Alchemy Semiconductor Pb1100 board.
6#
7
8obj-y := board_setup.o platform.o
diff --git a/arch/mips/alchemy/devboards/pb1100/platform.c b/arch/mips/alchemy/devboards/pb1100/platform.c
deleted file mode 100644
index 9c57c01a68c4..000000000000
--- a/arch/mips/alchemy/devboards/pb1100/platform.c
+++ /dev/null
@@ -1,77 +0,0 @@
1/*
2 * Pb1100 board platform device registration
3 *
4 * Copyright (C) 2009 Manuel Lauss
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/init.h>
22#include <linux/dma-mapping.h>
23#include <linux/platform_device.h>
24
25#include <asm/mach-au1x00/au1000.h>
26#include <asm/mach-db1x00/bcsr.h>
27
28#include "../platform.h"
29
30static struct resource au1100_lcd_resources[] = {
31 [0] = {
32 .start = AU1100_LCD_PHYS_ADDR,
33 .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
34 .flags = IORESOURCE_MEM,
35 },
36 [1] = {
37 .start = AU1100_LCD_INT,
38 .end = AU1100_LCD_INT,
39 .flags = IORESOURCE_IRQ,
40 }
41};
42
43static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
44
45static struct platform_device au1100_lcd_device = {
46 .name = "au1100-lcd",
47 .id = 0,
48 .dev = {
49 .dma_mask = &au1100_lcd_dmamask,
50 .coherent_dma_mask = DMA_BIT_MASK(32),
51 },
52 .num_resources = ARRAY_SIZE(au1100_lcd_resources),
53 .resource = au1100_lcd_resources,
54};
55
56static int __init pb1100_dev_init(void)
57{
58 int swapped;
59
60 /* PCMCIA. single socket, identical to Pb1500 */
61 db1x_register_pcmcia_socket(
62 AU1000_PCMCIA_ATTR_PHYS_ADDR,
63 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
64 AU1000_PCMCIA_MEM_PHYS_ADDR,
65 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
66 AU1000_PCMCIA_IO_PHYS_ADDR,
67 AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
68 AU1100_GPIO11_INT, AU1100_GPIO9_INT, /* card / insert */
69 /*AU1100_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
70
71 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
72 db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
73 platform_device_register(&au1100_lcd_device);
74
75 return 0;
76}
77device_initcall(pb1100_dev_init);
diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200.c
index 54f7f7b0676e..a1b64977b471 100644
--- a/arch/mips/alchemy/devboards/pb1200/platform.c
+++ b/arch/mips/alchemy/devboards/pb1200.c
@@ -20,17 +20,97 @@
20 20
21#include <linux/dma-mapping.h> 21#include <linux/dma-mapping.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/interrupt.h>
23#include <linux/leds.h> 24#include <linux/leds.h>
24#include <linux/platform_device.h> 25#include <linux/platform_device.h>
25#include <linux/smc91x.h> 26#include <linux/smc91x.h>
26
27#include <asm/mach-au1x00/au1000.h> 27#include <asm/mach-au1x00/au1000.h>
28#include <asm/mach-au1x00/au1100_mmc.h> 28#include <asm/mach-au1x00/au1100_mmc.h>
29#include <asm/mach-au1x00/au1xxx_dbdma.h> 29#include <asm/mach-au1x00/au1xxx_dbdma.h>
30#include <asm/mach-db1x00/bcsr.h> 30#include <asm/mach-db1x00/bcsr.h>
31#include <asm/mach-pb1x00/pb1200.h> 31#include <asm/mach-pb1x00/pb1200.h>
32#include <prom.h>
33#include "platform.h"
34
35
36const char *get_system_type(void)
37{
38 return "PB1200";
39}
40
41void __init board_setup(void)
42{
43 printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
44 bcsr_init(PB1200_BCSR_PHYS_ADDR,
45 PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
46
47#if 0
48 {
49 u32 pin_func;
50
51 /*
52 * Enable PSC1 SYNC for AC97. Normaly done in audio driver,
53 * but it is board specific code, so put it here.
54 */
55 pin_func = au_readl(SYS_PINFUNC);
56 au_sync();
57 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
58 au_writel(pin_func, SYS_PINFUNC);
59
60 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
61 au_sync();
62 }
63#endif
64
65#if defined(CONFIG_I2C_AU1550)
66 {
67 u32 freq0, clksrc;
68 u32 pin_func;
69
70 /* Select SMBus in CPLD */
71 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
72
73 pin_func = au_readl(SYS_PINFUNC);
74 au_sync();
75 pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
76 /* Set GPIOs correctly */
77 pin_func |= 2 << 17;
78 au_writel(pin_func, SYS_PINFUNC);
79 au_sync();
80
81 /* The I2C driver depends on 50 MHz clock */
82 freq0 = au_readl(SYS_FREQCTRL0);
83 au_sync();
84 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
85 freq0 |= 3 << SYS_FC_FRDIV1_BIT;
86 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
87 au_writel(freq0, SYS_FREQCTRL0);
88 au_sync();
89 freq0 |= SYS_FC_FE1;
90 au_writel(freq0, SYS_FREQCTRL0);
91 au_sync();
92
93 clksrc = au_readl(SYS_CLKSRC);
94 au_sync();
95 clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
96 /* Bit 22 is EXTCLK0 for PSC0 */
97 clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
98 au_writel(clksrc, SYS_CLKSRC);
99 au_sync();
100 }
101#endif
102
103 /*
104 * The Pb1200 development board uses external MUX for PSC0 to
105 * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
106 */
107#ifdef CONFIG_I2C_AU1550
108 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
109#endif
110 au_sync();
111}
32 112
33#include "../platform.h" 113/******************************************************************************/
34 114
35static int mmc_activity; 115static int mmc_activity;
36 116
@@ -183,7 +263,7 @@ static struct platform_device pb1200_mmc1_dev = {
183static struct resource ide_resources[] = { 263static struct resource ide_resources[] = {
184 [0] = { 264 [0] = {
185 .start = IDE_PHYS_ADDR, 265 .start = IDE_PHYS_ADDR,
186 .end = IDE_PHYS_ADDR + IDE_PHYS_LEN - 1, 266 .end = IDE_PHYS_ADDR + IDE_PHYS_LEN - 1,
187 .flags = IORESOURCE_MEM 267 .flags = IORESOURCE_MEM
188 }, 268 },
189 [1] = { 269 [1] = {
@@ -198,13 +278,13 @@ static struct resource ide_resources[] = {
198 }, 278 },
199}; 279};
200 280
201static u64 ide_dmamask = DMA_BIT_MASK(32); 281static u64 au1200_ide_dmamask = DMA_BIT_MASK(32);
202 282
203static struct platform_device ide_device = { 283static struct platform_device ide_device = {
204 .name = "au1200-ide", 284 .name = "au1200-ide",
205 .id = 0, 285 .id = 0,
206 .dev = { 286 .dev = {
207 .dma_mask = &ide_dmamask, 287 .dma_mask = &au1200_ide_dmamask,
208 .coherent_dma_mask = DMA_BIT_MASK(32), 288 .coherent_dma_mask = DMA_BIT_MASK(32),
209 }, 289 },
210 .num_resources = ARRAY_SIZE(ide_resources), 290 .num_resources = ARRAY_SIZE(ide_resources),
@@ -310,6 +390,29 @@ static int __init board_register_devices(void)
310{ 390{
311 int swapped; 391 int swapped;
312 392
393 /* We have a problem with CPLD rev 3. */
394 if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
395 printk(KERN_ERR "WARNING!!!\n");
396 printk(KERN_ERR "WARNING!!!\n");
397 printk(KERN_ERR "WARNING!!!\n");
398 printk(KERN_ERR "WARNING!!!\n");
399 printk(KERN_ERR "WARNING!!!\n");
400 printk(KERN_ERR "WARNING!!!\n");
401 printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
402 printk(KERN_ERR "updated to latest revision. This software will\n");
403 printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
404 printk(KERN_ERR "WARNING!!!\n");
405 printk(KERN_ERR "WARNING!!!\n");
406 printk(KERN_ERR "WARNING!!!\n");
407 printk(KERN_ERR "WARNING!!!\n");
408 printk(KERN_ERR "WARNING!!!\n");
409 printk(KERN_ERR "WARNING!!!\n");
410 panic("Game over. Your score is 0.");
411 }
412
413 irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
414 bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT);
415
313 db1x_register_pcmcia_socket( 416 db1x_register_pcmcia_socket(
314 AU1000_PCMCIA_ATTR_PHYS_ADDR, 417 AU1000_PCMCIA_ATTR_PHYS_ADDR,
315 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, 418 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
@@ -337,3 +440,25 @@ static int __init board_register_devices(void)
337 ARRAY_SIZE(board_platform_devices)); 440 ARRAY_SIZE(board_platform_devices));
338} 441}
339device_initcall(board_register_devices); 442device_initcall(board_register_devices);
443
444
445int board_au1200fb_panel(void)
446{
447 return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
448}
449
450int board_au1200fb_panel_init(void)
451{
452 /* Apply power */
453 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
454 BCSR_BOARD_LCDBL);
455 return 0;
456}
457
458int board_au1200fb_panel_shutdown(void)
459{
460 /* Remove power */
461 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
462 BCSR_BOARD_LCDBL, 0);
463 return 0;
464}
diff --git a/arch/mips/alchemy/devboards/pb1200/Makefile b/arch/mips/alchemy/devboards/pb1200/Makefile
deleted file mode 100644
index 18c1bd53e4c0..000000000000
--- a/arch/mips/alchemy/devboards/pb1200/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the Alchemy Semiconductor Pb1200/DBAu1200 boards.
3#
4
5obj-y := board_setup.o platform.o
diff --git a/arch/mips/alchemy/devboards/pb1200/board_setup.c b/arch/mips/alchemy/devboards/pb1200/board_setup.c
deleted file mode 100644
index 6d06b07c2381..000000000000
--- a/arch/mips/alchemy/devboards/pb1200/board_setup.c
+++ /dev/null
@@ -1,174 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <linux/init.h>
28#include <linux/interrupt.h>
29#include <linux/sched.h>
30
31#include <asm/mach-au1x00/au1000.h>
32#include <asm/mach-db1x00/bcsr.h>
33
34#ifdef CONFIG_MIPS_PB1200
35#include <asm/mach-pb1x00/pb1200.h>
36#endif
37
38#ifdef CONFIG_MIPS_DB1200
39#include <asm/mach-db1x00/db1200.h>
40#define PB1200_INT_BEGIN DB1200_INT_BEGIN
41#define PB1200_INT_END DB1200_INT_END
42#endif
43
44#include <prom.h>
45
46const char *get_system_type(void)
47{
48 return "Alchemy Pb1200";
49}
50
51void __init board_setup(void)
52{
53 printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
54 bcsr_init(PB1200_BCSR_PHYS_ADDR,
55 PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
56
57#if 0
58 {
59 u32 pin_func;
60
61 /*
62 * Enable PSC1 SYNC for AC97. Normaly done in audio driver,
63 * but it is board specific code, so put it here.
64 */
65 pin_func = au_readl(SYS_PINFUNC);
66 au_sync();
67 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
68 au_writel(pin_func, SYS_PINFUNC);
69
70 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
71 au_sync();
72 }
73#endif
74
75#if defined(CONFIG_I2C_AU1550)
76 {
77 u32 freq0, clksrc;
78 u32 pin_func;
79
80 /* Select SMBus in CPLD */
81 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
82
83 pin_func = au_readl(SYS_PINFUNC);
84 au_sync();
85 pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
86 /* Set GPIOs correctly */
87 pin_func |= 2 << 17;
88 au_writel(pin_func, SYS_PINFUNC);
89 au_sync();
90
91 /* The I2C driver depends on 50 MHz clock */
92 freq0 = au_readl(SYS_FREQCTRL0);
93 au_sync();
94 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
95 freq0 |= 3 << SYS_FC_FRDIV1_BIT;
96 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
97 au_writel(freq0, SYS_FREQCTRL0);
98 au_sync();
99 freq0 |= SYS_FC_FE1;
100 au_writel(freq0, SYS_FREQCTRL0);
101 au_sync();
102
103 clksrc = au_readl(SYS_CLKSRC);
104 au_sync();
105 clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
106 /* Bit 22 is EXTCLK0 for PSC0 */
107 clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
108 au_writel(clksrc, SYS_CLKSRC);
109 au_sync();
110 }
111#endif
112
113 /*
114 * The Pb1200 development board uses external MUX for PSC0 to
115 * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
116 */
117#ifdef CONFIG_I2C_AU1550
118 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
119#endif
120 au_sync();
121}
122
123static int __init pb1200_init_irq(void)
124{
125 /* We have a problem with CPLD rev 3. */
126 if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
127 printk(KERN_ERR "WARNING!!!\n");
128 printk(KERN_ERR "WARNING!!!\n");
129 printk(KERN_ERR "WARNING!!!\n");
130 printk(KERN_ERR "WARNING!!!\n");
131 printk(KERN_ERR "WARNING!!!\n");
132 printk(KERN_ERR "WARNING!!!\n");
133 printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
134 printk(KERN_ERR "updated to latest revision. This software will\n");
135 printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
136 printk(KERN_ERR "WARNING!!!\n");
137 printk(KERN_ERR "WARNING!!!\n");
138 printk(KERN_ERR "WARNING!!!\n");
139 printk(KERN_ERR "WARNING!!!\n");
140 printk(KERN_ERR "WARNING!!!\n");
141 printk(KERN_ERR "WARNING!!!\n");
142 panic("Game over. Your score is 0.");
143 }
144
145 irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
146 bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT);
147
148 return 0;
149}
150arch_initcall(pb1200_init_irq);
151
152
153int board_au1200fb_panel(void)
154{
155 return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
156}
157
158int board_au1200fb_panel_init(void)
159{
160 /* Apply power */
161 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
162 BCSR_BOARD_LCDBL);
163 /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
164 return 0;
165}
166
167int board_au1200fb_panel_shutdown(void)
168{
169 /* Remove power */
170 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
171 BCSR_BOARD_LCDBL, 0);
172 /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
173 return 0;
174}
diff --git a/arch/mips/alchemy/devboards/pb1500/board_setup.c b/arch/mips/alchemy/devboards/pb1500.c
index 37c1883b5ea9..e7b807b3ec51 100644
--- a/arch/mips/alchemy/devboards/pb1500/board_setup.c
+++ b/arch/mips/alchemy/devboards/pb1500.c
@@ -1,41 +1,37 @@
1/* 1/*
2 * Copyright 2000, 2008 MontaVista Software Inc. 2 * Pb1500 board support.
3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 * 3 *
5 * This program is free software; you can redistribute it and/or modify it 4 * Copyright (C) 2009 Manuel Lauss
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 * 5 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 6 * This program is free software; you can redistribute it and/or modify
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 7 * it under the terms of the GNU General Public License as published by
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 8 * the Free Software Foundation; either version 2 of the License, or
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 9 * (at your option) any later version.
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 * 10 *
21 * You should have received a copy of the GNU General Public License along 11 * This program is distributed in the hope that it will be useful,
22 * with this program; if not, write to the Free Software Foundation, Inc., 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * 675 Mass Ave, Cambridge, MA 02139, USA. 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 */ 19 */
25 20
26#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/dma-mapping.h>
27#include <linux/gpio.h> 23#include <linux/gpio.h>
28#include <linux/init.h> 24#include <linux/init.h>
29#include <linux/interrupt.h> 25#include <linux/interrupt.h>
30 26#include <linux/platform_device.h>
31#include <asm/mach-au1x00/au1000.h> 27#include <asm/mach-au1x00/au1000.h>
32#include <asm/mach-db1x00/bcsr.h> 28#include <asm/mach-db1x00/bcsr.h>
33
34#include <prom.h> 29#include <prom.h>
30#include "platform.h"
35 31
36const char *get_system_type(void) 32const char *get_system_type(void)
37{ 33{
38 return "Alchemy Pb1500"; 34 return "PB1500";
39} 35}
40 36
41void __init board_setup(void) 37void __init board_setup(void)
@@ -123,17 +119,80 @@ void __init board_setup(void)
123 } 119 }
124} 120}
125 121
126static int __init pb1500_init_irq(void) 122/******************************************************************************/
123
124static int pb1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
127{ 125{
128 irq_set_irq_type(AU1500_GPIO9_INT, IRQF_TRIGGER_LOW); /* CD0# */ 126 if ((slot < 12) || (slot > 13) || pin == 0)
129 irq_set_irq_type(AU1500_GPIO10_INT, IRQF_TRIGGER_LOW); /* CARD0 */ 127 return -1;
130 irq_set_irq_type(AU1500_GPIO11_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ 128 if (slot == 12)
129 return (pin == 1) ? AU1500_PCI_INTA : 0xff;
130 if (slot == 13) {
131 switch (pin) {
132 case 1: return AU1500_PCI_INTA;
133 case 2: return AU1500_PCI_INTB;
134 case 3: return AU1500_PCI_INTC;
135 case 4: return AU1500_PCI_INTD;
136 }
137 }
138 return -1;
139}
140
141static struct resource alchemy_pci_host_res[] = {
142 [0] = {
143 .start = AU1500_PCI_PHYS_ADDR,
144 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
145 .flags = IORESOURCE_MEM,
146 },
147};
148
149static struct alchemy_pci_platdata pb1500_pci_pd = {
150 .board_map_irq = pb1500_map_pci_irq,
151 .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
152 PCI_CONFIG_CH |
153#if defined(__MIPSEB__)
154 PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
155#else
156 0,
157#endif
158};
159
160static struct platform_device pb1500_pci_host = {
161 .dev.platform_data = &pb1500_pci_pd,
162 .name = "alchemy-pci",
163 .id = 0,
164 .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
165 .resource = alchemy_pci_host_res,
166};
167
168static int __init pb1500_dev_init(void)
169{
170 int swapped;
171
172 irq_set_irq_type(AU1500_GPIO9_INT, IRQF_TRIGGER_LOW); /* CD0# */
173 irq_set_irq_type(AU1500_GPIO10_INT, IRQF_TRIGGER_LOW); /* CARD0 */
174 irq_set_irq_type(AU1500_GPIO11_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
131 irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); 175 irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
132 irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW); 176 irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
133 irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW); 177 irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
134 irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW); 178 irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
135 irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW); 179 irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
136 180
181 /* PCMCIA. single socket, identical to Pb1100 */
182 db1x_register_pcmcia_socket(
183 AU1000_PCMCIA_ATTR_PHYS_ADDR,
184 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
185 AU1000_PCMCIA_MEM_PHYS_ADDR,
186 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
187 AU1000_PCMCIA_IO_PHYS_ADDR,
188 AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
189 AU1500_GPIO11_INT, AU1500_GPIO9_INT, /* card / insert */
190 /*AU1500_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
191
192 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
193 db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
194 platform_device_register(&pb1500_pci_host);
195
137 return 0; 196 return 0;
138} 197}
139arch_initcall(pb1500_init_irq); 198arch_initcall(pb1500_dev_init);
diff --git a/arch/mips/alchemy/devboards/pb1500/Makefile b/arch/mips/alchemy/devboards/pb1500/Makefile
deleted file mode 100644
index e83b151b5b63..000000000000
--- a/arch/mips/alchemy/devboards/pb1500/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Copyright 2000, 2001, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for the Alchemy Semiconductor Pb1500 board.
6#
7
8obj-y := board_setup.o platform.o
diff --git a/arch/mips/alchemy/devboards/pb1500/platform.c b/arch/mips/alchemy/devboards/pb1500/platform.c
deleted file mode 100644
index 1e52a01bac00..000000000000
--- a/arch/mips/alchemy/devboards/pb1500/platform.c
+++ /dev/null
@@ -1,94 +0,0 @@
1/*
2 * Pb1500 board platform device registration
3 *
4 * Copyright (C) 2009 Manuel Lauss
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/dma-mapping.h>
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <asm/mach-au1x00/au1000.h>
25#include <asm/mach-db1x00/bcsr.h>
26
27#include "../platform.h"
28
29static int pb1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
30{
31 if ((slot < 12) || (slot > 13) || pin == 0)
32 return -1;
33 if (slot == 12)
34 return (pin == 1) ? AU1500_PCI_INTA : 0xff;
35 if (slot == 13) {
36 switch (pin) {
37 case 1: return AU1500_PCI_INTA;
38 case 2: return AU1500_PCI_INTB;
39 case 3: return AU1500_PCI_INTC;
40 case 4: return AU1500_PCI_INTD;
41 }
42 }
43 return -1;
44}
45
46static struct resource alchemy_pci_host_res[] = {
47 [0] = {
48 .start = AU1500_PCI_PHYS_ADDR,
49 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
50 .flags = IORESOURCE_MEM,
51 },
52};
53
54static struct alchemy_pci_platdata pb1500_pci_pd = {
55 .board_map_irq = pb1500_map_pci_irq,
56 .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
57 PCI_CONFIG_CH |
58#if defined(__MIPSEB__)
59 PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
60#else
61 0,
62#endif
63};
64
65static struct platform_device pb1500_pci_host = {
66 .dev.platform_data = &pb1500_pci_pd,
67 .name = "alchemy-pci",
68 .id = 0,
69 .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
70 .resource = alchemy_pci_host_res,
71};
72
73static int __init pb1500_dev_init(void)
74{
75 int swapped;
76
77 /* PCMCIA. single socket, identical to Pb1100 */
78 db1x_register_pcmcia_socket(
79 AU1000_PCMCIA_ATTR_PHYS_ADDR,
80 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
81 AU1000_PCMCIA_MEM_PHYS_ADDR,
82 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
83 AU1000_PCMCIA_IO_PHYS_ADDR,
84 AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
85 AU1500_GPIO11_INT, AU1500_GPIO9_INT, /* card / insert */
86 /*AU1500_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
87
88 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
89 db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
90 platform_device_register(&pb1500_pci_host);
91
92 return 0;
93}
94arch_initcall(pb1500_dev_init);
diff --git a/arch/mips/alchemy/devboards/pb1550/platform.c b/arch/mips/alchemy/devboards/pb1550.c
index a4604b8a349e..e4a00a56a20f 100644
--- a/arch/mips/alchemy/devboards/pb1550/platform.c
+++ b/arch/mips/alchemy/devboards/pb1550.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Pb1550 board platform device registration 2 * Pb1550 board support.
3 * 3 *
4 * Copyright (C) 2009 Manuel Lauss 4 * Copyright (C) 2009-2011 Manuel Lauss
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -20,13 +20,43 @@
20 20
21#include <linux/dma-mapping.h> 21#include <linux/dma-mapping.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/interrupt.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24#include <asm/mach-au1x00/au1000.h> 25#include <asm/mach-au1x00/au1000.h>
25#include <asm/mach-au1x00/au1xxx_dbdma.h> 26#include <asm/mach-au1x00/au1xxx_dbdma.h>
26#include <asm/mach-pb1x00/pb1550.h> 27#include <asm/mach-au1x00/gpio.h>
27#include <asm/mach-db1x00/bcsr.h> 28#include <asm/mach-db1x00/bcsr.h>
29#include "platform.h"
28 30
29#include "../platform.h" 31const char *get_system_type(void)
32{
33 return "PB1550";
34}
35
36void __init board_setup(void)
37{
38 u32 pin_func;
39
40 bcsr_init(PB1550_BCSR_PHYS_ADDR,
41 PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS);
42
43 alchemy_gpio2_enable();
44
45 /*
46 * Enable PSC1 SYNC for AC'97. Normaly done in audio driver,
47 * but it is board specific code, so put it here.
48 */
49 pin_func = au_readl(SYS_PINFUNC);
50 au_sync();
51 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
52 au_writel(pin_func, SYS_PINFUNC);
53
54 bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
55
56 printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
57}
58
59/******************************************************************************/
30 60
31static int pb1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) 61static int pb1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
32{ 62{
@@ -105,6 +135,14 @@ static int __init pb1550_dev_init(void)
105{ 135{
106 int swapped; 136 int swapped;
107 137
138 irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW);
139 irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW);
140 irq_set_irq_type(AU1550_GPIO201_205_INT, IRQF_TRIGGER_HIGH);
141
142 /* enable both PCMCIA card irqs in the shared line */
143 alchemy_gpio2_enable_int(201);
144 alchemy_gpio2_enable_int(202);
145
108 /* Pb1550, like all others, also has statuschange irqs; however they're 146 /* Pb1550, like all others, also has statuschange irqs; however they're
109 * wired up on one of the Au1550's shared GPIO201_205 line, which also 147 * wired up on one of the Au1550's shared GPIO201_205 line, which also
110 * services the PCMCIA card interrupts. So we ignore statuschange and 148 * services the PCMCIA card interrupts. So we ignore statuschange and
diff --git a/arch/mips/alchemy/devboards/pb1550/Makefile b/arch/mips/alchemy/devboards/pb1550/Makefile
deleted file mode 100644
index 9661b6ec5dd3..000000000000
--- a/arch/mips/alchemy/devboards/pb1550/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for the Alchemy Semiconductor Pb1550 board.
6#
7
8obj-y := board_setup.o platform.o
diff --git a/arch/mips/alchemy/devboards/pb1550/board_setup.c b/arch/mips/alchemy/devboards/pb1550/board_setup.c
deleted file mode 100644
index 0f62d1e3df24..000000000000
--- a/arch/mips/alchemy/devboards/pb1550/board_setup.c
+++ /dev/null
@@ -1,80 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1550 board setup.
5 *
6 * Copyright 2000, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#include <linux/init.h>
31#include <linux/interrupt.h>
32
33#include <asm/mach-au1x00/au1000.h>
34#include <asm/mach-pb1x00/pb1550.h>
35#include <asm/mach-db1x00/bcsr.h>
36#include <asm/mach-au1x00/gpio.h>
37
38#include <prom.h>
39
40const char *get_system_type(void)
41{
42 return "Alchemy Pb1550";
43}
44
45void __init board_setup(void)
46{
47 u32 pin_func;
48
49 bcsr_init(PB1550_BCSR_PHYS_ADDR,
50 PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS);
51
52 alchemy_gpio2_enable();
53
54 /*
55 * Enable PSC1 SYNC for AC'97. Normaly done in audio driver,
56 * but it is board specific code, so put it here.
57 */
58 pin_func = au_readl(SYS_PINFUNC);
59 au_sync();
60 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
61 au_writel(pin_func, SYS_PINFUNC);
62
63 bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
64
65 printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
66}
67
68static int __init pb1550_init_irq(void)
69{
70 irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW);
71 irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW);
72 irq_set_irq_type(AU1550_GPIO201_205_INT, IRQF_TRIGGER_HIGH);
73
74 /* enable both PCMCIA card irqs in the shared line */
75 alchemy_gpio2_enable_int(201);
76 alchemy_gpio2_enable_int(202);
77
78 return 0;
79}
80arch_initcall(pb1550_init_irq);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 10:02:40 -0500