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authorLinus Torvalds <torvalds@linux-foundation.org>2011-07-26 17:17:28 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-07-26 17:17:28 -0400
commit6fd4ce886440c7a1b08b6642e606ee19097829df (patch)
treecd12dc0ec7e40e9d9a26e942999de93a5e673b4d /arch/mips
parentba5b56cb3e3d2cab73d4fee9a022bb69462a8cd9 (diff)
parentbf28607fbe529e20180080c4a0295b0a47834fde (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (31 commits) MIPS: Close races in TLB modify handlers. MIPS: Add uasm UASM_i_SRL_SAFE macro. MIPS: RB532: Use hex_to_bin() MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms MIPS: PowerTV: Provide cpu-feature-overrides.h MIPS: Remove pointless return statement from empty void functions. MIPS: Limit fixrange_init() to the FIXMAP region MIPS: Install handlers for software IRQs MIPS: Move FIXADDR_TOP into spaces.h MIPS: Add SYNC after cacheflush MIPS: pfn_valid() is broken on low memory HIGHMEM systems MIPS: HIGHMEM DMA on noncoherent MIPS32 processors MIPS: topdown mmap support MIPS: Remove redundant addr_limit assignment on exec. MIPS: AR7: Replace __attribute__((__packed__)) with __packed MIPS: AR7: Remove 'space before tabs' in platform.c MIPS: Lantiq: Add missing clk_enable and clk_disable functions. MIPS: AR7: Fix trailing semicolon bug in clock.c MAINTAINERS: Update MIPS entry. MIPS: BCM63xx: Remove duplicate PERF_IRQSTAT_REG definition ...
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kbuild.platforms1
-rw-r--r--arch/mips/Makefile12
-rw-r--r--arch/mips/ar7/clock.c2
-rw-r--r--arch/mips/ar7/platform.c2
-rw-r--r--arch/mips/ar7/prom.c2
-rw-r--r--arch/mips/include/asm/fixmap.h10
-rw-r--r--arch/mips/include/asm/gt64120.h2
-rw-r--r--arch/mips/include/asm/irq.h1
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h1
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/spaces.h17
-rw-r--r--arch/mips/include/asm/mach-generic/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-generic/spaces.h4
-rw-r--r--arch/mips/include/asm/mach-ip27/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-jazz/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-loongson/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-malta/cpu-feature-overrides.h2
-rw-r--r--arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h2
-rw-r--r--arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h59
-rw-r--r--arch/mips/include/asm/mach-powertv/dma-coherence.h1
-rw-r--r--arch/mips/include/asm/mach-tx39xx/spaces.h17
-rw-r--r--arch/mips/include/asm/mach-tx49xx/spaces.h17
-rw-r--r--arch/mips/include/asm/pgtable.h1
-rw-r--r--arch/mips/include/asm/smp-ops.h43
-rw-r--r--arch/mips/include/asm/smtc.h1
-rw-r--r--arch/mips/include/asm/uasm.h2
-rw-r--r--arch/mips/include/asm/unistd.h21
-rw-r--r--arch/mips/kernel/cpu-probe.c1
-rw-r--r--arch/mips/kernel/irq_cpu.c14
-rw-r--r--arch/mips/kernel/perf_event.c2
-rw-r--r--arch/mips/kernel/process.c1
-rw-r--r--arch/mips/kernel/scall32-o32.S1
-rw-r--r--arch/mips/kernel/scall64-64.S1
-rw-r--r--arch/mips/kernel/scall64-n32.S1
-rw-r--r--arch/mips/kernel/scall64-o32.S1
-rw-r--r--arch/mips/lantiq/clk.c13
-rw-r--r--arch/mips/loongson/lemote-2f/ec_kb3310b.c2
-rw-r--r--arch/mips/mipssim/sim_setup.c18
-rw-r--r--arch/mips/mm/c-r4k.c4
-rw-r--r--arch/mips/mm/dma-default.c114
-rw-r--r--arch/mips/mm/init.c8
-rw-r--r--arch/mips/mm/mmap.c193
-rw-r--r--arch/mips/mm/pgtable-32.c2
-rw-r--r--arch/mips/mm/pgtable-64.c2
-rw-r--r--arch/mips/mm/tlbex.c292
-rw-r--r--arch/mips/mti-malta/malta-init.c14
-rw-r--r--arch/mips/mti-malta/malta-smtc.c2
-rw-r--r--arch/mips/netlogic/Platform11
-rw-r--r--arch/mips/netlogic/xlr/irq.c2
-rw-r--r--arch/mips/netlogic/xlr/smp.c13
-rw-r--r--arch/mips/nxp/pnx8550/common/setup.c2
-rw-r--r--arch/mips/pci/ops-nile4.c1
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_setup.c8
-rw-r--r--arch/mips/pnx8550/common/setup.c2
-rw-r--r--arch/mips/rb532/devices.c24
-rw-r--r--arch/mips/sibyte/sb1250/irq.c8
55 files changed, 695 insertions, 286 deletions
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index aef6c917b45a..5ce8029f558b 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -16,6 +16,7 @@ platforms += lasat
16platforms += loongson 16platforms += loongson
17platforms += mipssim 17platforms += mipssim
18platforms += mti-malta 18platforms += mti-malta
19platforms += netlogic
19platforms += pmc-sierra 20platforms += pmc-sierra
20platforms += pnx833x 21platforms += pnx833x
21platforms += pnx8550 22platforms += pnx8550
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 884819cd0607..53e3514ba10e 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -191,18 +191,6 @@ endif
191# 191#
192include $(srctree)/arch/mips/Kbuild.platforms 192include $(srctree)/arch/mips/Kbuild.platforms
193 193
194#
195# NETLOGIC SOC Common (common)
196#
197cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/mach-netlogic
198cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/netlogic
199
200#
201# NETLOGIC XLR/XLS SoC, Simulator and boards
202#
203core-$(CONFIG_NLM_XLR) += arch/mips/netlogic/xlr/
204load-$(CONFIG_NLM_XLR_BOARD) += 0xffffffff84000000
205
206cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic 194cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic
207drivers-$(CONFIG_PCI) += arch/mips/pci/ 195drivers-$(CONFIG_PCI) += arch/mips/pci/
208 196
diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c
index 2ca4ada1c291..2460f9d23f1b 100644
--- a/arch/mips/ar7/clock.c
+++ b/arch/mips/ar7/clock.c
@@ -443,7 +443,7 @@ struct clk *clk_get(struct device *dev, const char *id)
443 return &vbus_clk; 443 return &vbus_clk;
444 if (!strcmp(id, "cpu")) 444 if (!strcmp(id, "cpu"))
445 return &cpu_clk; 445 return &cpu_clk;
446 if (!strcmp(id, "dsp")); 446 if (!strcmp(id, "dsp"))
447 return &dsp_clk; 447 return &dsp_clk;
448 if (!strcmp(id, "vbus")) 448 if (!strcmp(id, "vbus"))
449 return &vbus_clk; 449 return &vbus_clk;
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 7d2fab392327..33ffecf6a6d6 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -229,7 +229,7 @@ static struct resource cpmac_low_res[] = {
229 .name = "irq", 229 .name = "irq",
230 .flags = IORESOURCE_IRQ, 230 .flags = IORESOURCE_IRQ,
231 .start = 27, 231 .start = 27,
232 .end = 27, 232 .end = 27,
233 }, 233 },
234}; 234};
235 235
diff --git a/arch/mips/ar7/prom.c b/arch/mips/ar7/prom.c
index 23818d299127..8088c6fdb83e 100644
--- a/arch/mips/ar7/prom.c
+++ b/arch/mips/ar7/prom.c
@@ -77,7 +77,7 @@ struct psp_env_chunk {
77 u16 csum; 77 u16 csum;
78 u8 len; 78 u8 len;
79 char data[11]; 79 char data[11];
80} __attribute__ ((packed)); 80} __packed;
81 81
82struct psp_var_map_entry { 82struct psp_var_map_entry {
83 u8 num; 83 u8 num;
diff --git a/arch/mips/include/asm/fixmap.h b/arch/mips/include/asm/fixmap.h
index 0b89b83e2055..98bcc98cf29b 100644
--- a/arch/mips/include/asm/fixmap.h
+++ b/arch/mips/include/asm/fixmap.h
@@ -14,6 +14,7 @@
14#define _ASM_FIXMAP_H 14#define _ASM_FIXMAP_H
15 15
16#include <asm/page.h> 16#include <asm/page.h>
17#include <spaces.h>
17#ifdef CONFIG_HIGHMEM 18#ifdef CONFIG_HIGHMEM
18#include <linux/threads.h> 19#include <linux/threads.h>
19#include <asm/kmap_types.h> 20#include <asm/kmap_types.h>
@@ -67,15 +68,6 @@ enum fixed_addresses {
67 * the start of the fixmap, and leave one page empty 68 * the start of the fixmap, and leave one page empty
68 * at the top of mem.. 69 * at the top of mem..
69 */ 70 */
70#ifdef CONFIG_BCM63XX
71#define FIXADDR_TOP ((unsigned long)(long)(int)0xff000000)
72#else
73#if defined(CONFIG_CPU_TX39XX) || defined(CONFIG_CPU_TX49XX)
74#define FIXADDR_TOP ((unsigned long)(long)(int)(0xff000000 - 0x20000))
75#else
76#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000)
77#endif
78#endif
79#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) 71#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
80#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 72#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
81 73
diff --git a/arch/mips/include/asm/gt64120.h b/arch/mips/include/asm/gt64120.h
index e64b41093c49..0aa44abc77fe 100644
--- a/arch/mips/include/asm/gt64120.h
+++ b/arch/mips/include/asm/gt64120.h
@@ -21,8 +21,6 @@
21#ifndef _ASM_GT64120_H 21#ifndef _ASM_GT64120_H
22#define _ASM_GT64120_H 22#define _ASM_GT64120_H
23 23
24#include <linux/clocksource.h>
25
26#include <asm/addrspace.h> 24#include <asm/addrspace.h>
27#include <asm/byteorder.h> 25#include <asm/byteorder.h>
28 26
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index 0ec01294b063..2354c870a63a 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -18,7 +18,6 @@
18 18
19static inline void irq_dispose_mapping(unsigned int virq) 19static inline void irq_dispose_mapping(unsigned int virq)
20{ 20{
21 return;
22} 21}
23 22
24#ifdef CONFIG_I8259 23#ifdef CONFIG_I8259
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 85fd27509aac..0ed5230243c9 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -89,7 +89,6 @@
89 89
90/* Interrupt Mask register */ 90/* Interrupt Mask register */
91#define PERF_IRQMASK_REG 0xc 91#define PERF_IRQMASK_REG 0xc
92#define PERF_IRQSTAT_REG 0x10
93 92
94/* Interrupt Status register */ 93/* Interrupt Status register */
95#define PERF_IRQSTAT_REG 0x10 94#define PERF_IRQSTAT_REG 0x10
diff --git a/arch/mips/include/asm/mach-bcm63xx/spaces.h b/arch/mips/include/asm/mach-bcm63xx/spaces.h
new file mode 100644
index 000000000000..61e750fb4653
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/spaces.h
@@ -0,0 +1,17 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
7 * Copyright (C) 2000, 2002 Maciej W. Rozycki
8 * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
9 */
10#ifndef _ASM_BCM63XX_SPACES_H
11#define _ASM_BCM63XX_SPACES_H
12
13#define FIXADDR_TOP ((unsigned long)(long)(int)0xff000000)
14
15#include <asm/mach-generic/spaces.h>
16
17#endif /* __ASM_BCM63XX_SPACES_H */
diff --git a/arch/mips/include/asm/mach-generic/dma-coherence.h b/arch/mips/include/asm/mach-generic/dma-coherence.h
index 8da98073e952..9c95177f7a7e 100644
--- a/arch/mips/include/asm/mach-generic/dma-coherence.h
+++ b/arch/mips/include/asm/mach-generic/dma-coherence.h
@@ -49,7 +49,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
49 49
50static inline void plat_extra_sync_for_device(struct device *dev) 50static inline void plat_extra_sync_for_device(struct device *dev)
51{ 51{
52 return;
53} 52}
54 53
55static inline int plat_dma_mapping_error(struct device *dev, 54static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h
index c9fa4b14968d..d7a9efd3a5ce 100644
--- a/arch/mips/include/asm/mach-generic/spaces.h
+++ b/arch/mips/include/asm/mach-generic/spaces.h
@@ -82,4 +82,8 @@
82#define PAGE_OFFSET (CAC_BASE + PHYS_OFFSET) 82#define PAGE_OFFSET (CAC_BASE + PHYS_OFFSET)
83#endif 83#endif
84 84
85#ifndef FIXADDR_TOP
86#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000)
87#endif
88
85#endif /* __ASM_MACH_GENERIC_SPACES_H */ 89#endif /* __ASM_MACH_GENERIC_SPACES_H */
diff --git a/arch/mips/include/asm/mach-ip27/dma-coherence.h b/arch/mips/include/asm/mach-ip27/dma-coherence.h
index 016d0989b141..06c441968e6e 100644
--- a/arch/mips/include/asm/mach-ip27/dma-coherence.h
+++ b/arch/mips/include/asm/mach-ip27/dma-coherence.h
@@ -60,7 +60,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
60 60
61static inline void plat_extra_sync_for_device(struct device *dev) 61static inline void plat_extra_sync_for_device(struct device *dev)
62{ 62{
63 return;
64} 63}
65 64
66static inline int plat_dma_mapping_error(struct device *dev, 65static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-jazz/dma-coherence.h b/arch/mips/include/asm/mach-jazz/dma-coherence.h
index 302101b54acb..9fc1e9ad7038 100644
--- a/arch/mips/include/asm/mach-jazz/dma-coherence.h
+++ b/arch/mips/include/asm/mach-jazz/dma-coherence.h
@@ -50,7 +50,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
50 50
51static inline void plat_extra_sync_for_device(struct device *dev) 51static inline void plat_extra_sync_for_device(struct device *dev)
52{ 52{
53 return;
54} 53}
55 54
56static inline int plat_dma_mapping_error(struct device *dev, 55static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-loongson/dma-coherence.h b/arch/mips/include/asm/mach-loongson/dma-coherence.h
index 981c75f91a7d..e1433055fe98 100644
--- a/arch/mips/include/asm/mach-loongson/dma-coherence.h
+++ b/arch/mips/include/asm/mach-loongson/dma-coherence.h
@@ -55,7 +55,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
55 55
56static inline void plat_extra_sync_for_device(struct device *dev) 56static inline void plat_extra_sync_for_device(struct device *dev)
57{ 57{
58 return;
59} 58}
60 59
61static inline int plat_dma_mapping_error(struct device *dev, 60static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
index 2848cea42bce..37e3583a9fdd 100644
--- a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
@@ -32,6 +32,7 @@
32/* #define cpu_has_vtag_icache ? */ 32/* #define cpu_has_vtag_icache ? */
33/* #define cpu_has_dc_aliases ? */ 33/* #define cpu_has_dc_aliases ? */
34/* #define cpu_has_ic_fills_f_dc ? */ 34/* #define cpu_has_ic_fills_f_dc ? */
35#define cpu_has_clo_clz 1
35#define cpu_has_nofpuex 0 36#define cpu_has_nofpuex 0
36/* #define cpu_has_64bits ? */ 37/* #define cpu_has_64bits ? */
37/* #define cpu_has_64bit_zero_reg ? */ 38/* #define cpu_has_64bit_zero_reg ? */
@@ -58,6 +59,7 @@
58/* #define cpu_has_vtag_icache ? */ 59/* #define cpu_has_vtag_icache ? */
59/* #define cpu_has_dc_aliases ? */ 60/* #define cpu_has_dc_aliases ? */
60/* #define cpu_has_ic_fills_f_dc ? */ 61/* #define cpu_has_ic_fills_f_dc ? */
62#define cpu_has_clo_clz 1
61#define cpu_has_nofpuex 0 63#define cpu_has_nofpuex 0
62/* #define cpu_has_64bits ? */ 64/* #define cpu_has_64bits ? */
63/* #define cpu_has_64bit_zero_reg ? */ 65/* #define cpu_has_64bit_zero_reg ? */
diff --git a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
index 779b02205737..27aaaa5d925e 100644
--- a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
@@ -31,6 +31,7 @@
31/* #define cpu_has_vtag_icache ? */ 31/* #define cpu_has_vtag_icache ? */
32/* #define cpu_has_dc_aliases ? */ 32/* #define cpu_has_dc_aliases ? */
33/* #define cpu_has_ic_fills_f_dc ? */ 33/* #define cpu_has_ic_fills_f_dc ? */
34#define cpu_has_clo_clz 1
34#define cpu_has_nofpuex 0 35#define cpu_has_nofpuex 0
35/* #define cpu_has_64bits ? */ 36/* #define cpu_has_64bits ? */
36/* #define cpu_has_64bit_zero_reg ? */ 37/* #define cpu_has_64bit_zero_reg ? */
@@ -56,6 +57,7 @@
56/* #define cpu_has_vtag_icache ? */ 57/* #define cpu_has_vtag_icache ? */
57/* #define cpu_has_dc_aliases ? */ 58/* #define cpu_has_dc_aliases ? */
58/* #define cpu_has_ic_fills_f_dc ? */ 59/* #define cpu_has_ic_fills_f_dc ? */
60#define cpu_has_clo_clz 1
59#define cpu_has_nofpuex 0 61#define cpu_has_nofpuex 0
60/* #define cpu_has_64bits ? */ 62/* #define cpu_has_64bits ? */
61/* #define cpu_has_64bit_zero_reg ? */ 63/* #define cpu_has_64bit_zero_reg ? */
diff --git a/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h b/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h
new file mode 100644
index 000000000000..f751e3ec56fb
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h
@@ -0,0 +1,59 @@
1/*
2 * Copyright (C) 2010 Cisco Systems, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19#ifndef _ASM_MACH_POWERTV_CPU_FEATURE_OVERRIDES_H_
20#define _ASM_MACH_POWERTV_CPU_FEATURE_OVERRIDES_H_
21#define cpu_has_tlb 1
22#define cpu_has_4kex 1
23#define cpu_has_3k_cache 0
24#define cpu_has_4k_cache 1
25#define cpu_has_tx39_cache 0
26#define cpu_has_fpu 0
27#define cpu_has_counter 1
28#define cpu_has_watch 1
29#define cpu_has_divec 1
30#define cpu_has_vce 0
31#define cpu_has_cache_cdex_p 0
32#define cpu_has_cache_cdex_s 0
33#define cpu_has_mcheck 1
34#define cpu_has_ejtag 1
35#define cpu_has_llsc 1
36#define cpu_has_mips16 0
37#define cpu_has_mdmx 0
38#define cpu_has_mips3d 0
39#define cpu_has_smartmips 0
40#define cpu_has_vtag_icache 0
41#define cpu_has_dc_aliases 0
42#define cpu_has_ic_fills_f_dc 0
43#define cpu_has_mips32r1 0
44#define cpu_has_mips32r2 1
45#define cpu_has_mips64r1 0
46#define cpu_has_mips64r2 0
47#define cpu_has_dsp 0
48#define cpu_has_mipsmt 0
49#define cpu_has_userlocal 0
50#define cpu_has_nofpuex 0
51#define cpu_has_64bits 0
52#define cpu_has_64bit_zero_reg 0
53#define cpu_has_vint 1
54#define cpu_has_veic 1
55#define cpu_has_inclusive_pcaches 0
56
57#define cpu_dcache_line_size() 32
58#define cpu_icache_line_size() 32
59#endif
diff --git a/arch/mips/include/asm/mach-powertv/dma-coherence.h b/arch/mips/include/asm/mach-powertv/dma-coherence.h
index a8e72cf12142..62c094085947 100644
--- a/arch/mips/include/asm/mach-powertv/dma-coherence.h
+++ b/arch/mips/include/asm/mach-powertv/dma-coherence.h
@@ -102,7 +102,6 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
102 102
103static inline void plat_extra_sync_for_device(struct device *dev) 103static inline void plat_extra_sync_for_device(struct device *dev)
104{ 104{
105 return;
106} 105}
107 106
108static inline int plat_dma_mapping_error(struct device *dev, 107static inline int plat_dma_mapping_error(struct device *dev,
diff --git a/arch/mips/include/asm/mach-tx39xx/spaces.h b/arch/mips/include/asm/mach-tx39xx/spaces.h
new file mode 100644
index 000000000000..151fe7a1cf1d
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx39xx/spaces.h
@@ -0,0 +1,17 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
7 * Copyright (C) 2000, 2002 Maciej W. Rozycki
8 * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
9 */
10#ifndef _ASM_TX39XX_SPACES_H
11#define _ASM_TX39XX_SPACES_H
12
13#define FIXADDR_TOP ((unsigned long)(long)(int)0xfefe0000)
14
15#include <asm/mach-generic/spaces.h>
16
17#endif /* __ASM_TX39XX_SPACES_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/spaces.h b/arch/mips/include/asm/mach-tx49xx/spaces.h
new file mode 100644
index 000000000000..0cb10a6f489e
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx49xx/spaces.h
@@ -0,0 +1,17 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
7 * Copyright (C) 2000, 2002 Maciej W. Rozycki
8 * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
9 */
10#ifndef _ASM_TX49XX_SPACES_H
11#define _ASM_TX49XX_SPACES_H
12
13#define FIXADDR_TOP ((unsigned long)(long)(int)0xfefe0000)
14
15#include <asm/mach-generic/spaces.h>
16
17#endif /* __ASM_TX49XX_SPACES_H */
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index 7e40f3778179..b2202a68cf0f 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -414,6 +414,7 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
414 * constraints placed on us by the cache architecture. 414 * constraints placed on us by the cache architecture.
415 */ 415 */
416#define HAVE_ARCH_UNMAPPED_AREA 416#define HAVE_ARCH_UNMAPPED_AREA
417#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
417 418
418/* 419/*
419 * No page table caches to initialise 420 * No page table caches to initialise
diff --git a/arch/mips/include/asm/smp-ops.h b/arch/mips/include/asm/smp-ops.h
index 9e09af34c8a8..ef2a8041e78b 100644
--- a/arch/mips/include/asm/smp-ops.h
+++ b/arch/mips/include/asm/smp-ops.h
@@ -11,6 +11,8 @@
11#ifndef __ASM_SMP_OPS_H 11#ifndef __ASM_SMP_OPS_H
12#define __ASM_SMP_OPS_H 12#define __ASM_SMP_OPS_H
13 13
14#include <linux/errno.h>
15
14#ifdef CONFIG_SMP 16#ifdef CONFIG_SMP
15 17
16#include <linux/cpumask.h> 18#include <linux/cpumask.h>
@@ -56,8 +58,43 @@ static inline void register_smp_ops(struct plat_smp_ops *ops)
56 58
57#endif /* !CONFIG_SMP */ 59#endif /* !CONFIG_SMP */
58 60
59extern struct plat_smp_ops up_smp_ops; 61static inline int register_up_smp_ops(void)
60extern struct plat_smp_ops cmp_smp_ops; 62{
61extern struct plat_smp_ops vsmp_smp_ops; 63#ifdef CONFIG_SMP_UP
64 extern struct plat_smp_ops up_smp_ops;
65
66 register_smp_ops(&up_smp_ops);
67
68 return 0;
69#else
70 return -ENODEV;
71#endif
72}
73
74static inline int register_cmp_smp_ops(void)
75{
76#ifdef CONFIG_MIPS_CMP
77 extern struct plat_smp_ops cmp_smp_ops;
78
79 register_smp_ops(&cmp_smp_ops);
80
81 return 0;
82#else
83 return -ENODEV;
84#endif
85}
86
87static inline int register_vsmp_smp_ops(void)
88{
89#ifdef CONFIG_MIPS_MT_SMP
90 extern struct plat_smp_ops vsmp_smp_ops;
91
92 register_smp_ops(&vsmp_smp_ops);
93
94 return 0;
95#else
96 return -ENODEV;
97#endif
98}
62 99
63#endif /* __ASM_SMP_OPS_H */ 100#endif /* __ASM_SMP_OPS_H */
diff --git a/arch/mips/include/asm/smtc.h b/arch/mips/include/asm/smtc.h
index ea60bf08dcb0..c9736fc06325 100644
--- a/arch/mips/include/asm/smtc.h
+++ b/arch/mips/include/asm/smtc.h
@@ -46,6 +46,7 @@ extern void smtc_prepare_cpus(int cpus);
46extern void smtc_smp_finish(void); 46extern void smtc_smp_finish(void);
47extern void smtc_boot_secondary(int cpu, struct task_struct *t); 47extern void smtc_boot_secondary(int cpu, struct task_struct *t);
48extern void smtc_cpus_done(void); 48extern void smtc_cpus_done(void);
49extern void smtc_init_secondary(void);
49 50
50 51
51/* 52/*
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index dcbd4bb417ec..504d40aedfae 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -150,6 +150,7 @@ static inline void __uasminit uasm_l##lb(struct uasm_label **lab, u32 *addr) \
150# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh) 150# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
151# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh) 151# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
152# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh) 152# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
153# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
153# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh) 154# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
154# define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd) 155# define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
155# define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd) 156# define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
@@ -165,6 +166,7 @@ static inline void __uasminit uasm_l##lb(struct uasm_label **lab, u32 *addr) \
165# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh) 166# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
166# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh) 167# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
167# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh) 168# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
169# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
168# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh) 170# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
169# define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd) 171# define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
170# define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd) 172# define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 6fcfc480e9d0..ecea7871dec2 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -363,17 +363,18 @@
363#define __NR_open_by_handle_at (__NR_Linux + 340) 363#define __NR_open_by_handle_at (__NR_Linux + 340)
364#define __NR_clock_adjtime (__NR_Linux + 341) 364#define __NR_clock_adjtime (__NR_Linux + 341)
365#define __NR_syncfs (__NR_Linux + 342) 365#define __NR_syncfs (__NR_Linux + 342)
366#define __NR_setns (__NR_Linux + 343) 366#define __NR_sendmmsg (__NR_Linux + 343)
367#define __NR_setns (__NR_Linux + 344)
367 368
368/* 369/*
369 * Offset of the last Linux o32 flavoured syscall 370 * Offset of the last Linux o32 flavoured syscall
370 */ 371 */
371#define __NR_Linux_syscalls 343 372#define __NR_Linux_syscalls 344
372 373
373#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 374#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
374 375
375#define __NR_O32_Linux 4000 376#define __NR_O32_Linux 4000
376#define __NR_O32_Linux_syscalls 343 377#define __NR_O32_Linux_syscalls 344
377 378
378#if _MIPS_SIM == _MIPS_SIM_ABI64 379#if _MIPS_SIM == _MIPS_SIM_ABI64
379 380
@@ -683,17 +684,18 @@
683#define __NR_open_by_handle_at (__NR_Linux + 299) 684#define __NR_open_by_handle_at (__NR_Linux + 299)
684#define __NR_clock_adjtime (__NR_Linux + 300) 685#define __NR_clock_adjtime (__NR_Linux + 300)
685#define __NR_syncfs (__NR_Linux + 301) 686#define __NR_syncfs (__NR_Linux + 301)
686#define __NR_setns (__NR_Linux + 302) 687#define __NR_sendmmsg (__NR_Linux + 302)
688#define __NR_setns (__NR_Linux + 303)
687 689
688/* 690/*
689 * Offset of the last Linux 64-bit flavoured syscall 691 * Offset of the last Linux 64-bit flavoured syscall
690 */ 692 */
691#define __NR_Linux_syscalls 302 693#define __NR_Linux_syscalls 303
692 694
693#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 695#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
694 696
695#define __NR_64_Linux 5000 697#define __NR_64_Linux 5000
696#define __NR_64_Linux_syscalls 302 698#define __NR_64_Linux_syscalls 303
697 699
698#if _MIPS_SIM == _MIPS_SIM_NABI32 700#if _MIPS_SIM == _MIPS_SIM_NABI32
699 701
@@ -1008,17 +1010,18 @@
1008#define __NR_open_by_handle_at (__NR_Linux + 304) 1010#define __NR_open_by_handle_at (__NR_Linux + 304)
1009#define __NR_clock_adjtime (__NR_Linux + 305) 1011#define __NR_clock_adjtime (__NR_Linux + 305)
1010#define __NR_syncfs (__NR_Linux + 306) 1012#define __NR_syncfs (__NR_Linux + 306)
1011#define __NR_setns (__NR_Linux + 307) 1013#define __NR_sendmmsg (__NR_Linux + 307)
1014#define __NR_setns (__NR_Linux + 308)
1012 1015
1013/* 1016/*
1014 * Offset of the last N32 flavoured syscall 1017 * Offset of the last N32 flavoured syscall
1015 */ 1018 */
1016#define __NR_Linux_syscalls 307 1019#define __NR_Linux_syscalls 308
1017 1020
1018#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1021#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1019 1022
1020#define __NR_N32_Linux 6000 1023#define __NR_N32_Linux 6000
1021#define __NR_N32_Linux_syscalls 307 1024#define __NR_N32_Linux_syscalls 308
1022 1025
1023#ifdef __KERNEL__ 1026#ifdef __KERNEL__
1024 1027
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index bb133d10b145..ebc0cd20b35d 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -71,7 +71,6 @@ void r4k_wait_irqoff(void)
71 local_irq_enable(); 71 local_irq_enable();
72 __asm__(" .globl __pastwait \n" 72 __asm__(" .globl __pastwait \n"
73 "__pastwait: \n"); 73 "__pastwait: \n");
74 return;
75} 74}
76 75
77/* 76/*
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 6e71b284f6c9..191eb52228c4 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -103,14 +103,12 @@ void __init mips_cpu_irq_init(void)
103 clear_c0_status(ST0_IM); 103 clear_c0_status(ST0_IM);
104 clear_c0_cause(CAUSEF_IP); 104 clear_c0_cause(CAUSEF_IP);
105 105
106 /* 106 /* Software interrupts are used for MT/CMT IPI */
107 * Only MT is using the software interrupts currently, so we just 107 for (i = irq_base; i < irq_base + 2; i++)
108 * leave them uninitialized for other processors. 108 irq_set_chip_and_handler(i, cpu_has_mipsmt ?
109 */ 109 &mips_mt_cpu_irq_controller :
110 if (cpu_has_mipsmt) 110 &mips_cpu_irq_controller,
111 for (i = irq_base; i < irq_base + 2; i++) 111 handle_percpu_irq);
112 irq_set_chip_and_handler(i, &mips_mt_cpu_irq_controller,
113 handle_percpu_irq);
114 112
115 for (i = irq_base + 2; i < irq_base + 8; i++) 113 for (i = irq_base + 2; i < irq_base + 8; i++)
116 irq_set_chip_and_handler(i, &mips_cpu_irq_controller, 114 irq_set_chip_and_handler(i, &mips_cpu_irq_controller,
diff --git a/arch/mips/kernel/perf_event.c b/arch/mips/kernel/perf_event.c
index d0deaab9ace2..0aee944ac380 100644
--- a/arch/mips/kernel/perf_event.c
+++ b/arch/mips/kernel/perf_event.c
@@ -192,8 +192,6 @@ again:
192 192
193 local64_add(delta, &event->count); 193 local64_add(delta, &event->count);
194 local64_sub(delta, &hwc->period_left); 194 local64_sub(delta, &hwc->period_left);
195
196 return;
197} 195}
198 196
199static void mipspmu_start(struct perf_event *event, int flags) 197static void mipspmu_start(struct perf_event *event, int flags)
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index c28fbe6107bc..b30cb2573aaf 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -103,7 +103,6 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
103 __init_dsp(); 103 __init_dsp();
104 regs->cp0_epc = pc; 104 regs->cp0_epc = pc;
105 regs->regs[29] = sp; 105 regs->regs[29] = sp;
106 current_thread_info()->addr_limit = USER_DS;
107} 106}
108 107
109void exit_thread(void) 108void exit_thread(void)
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 99e656e425f3..e521420a45a5 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -589,6 +589,7 @@ einval: li v0, -ENOSYS
589 sys sys_open_by_handle_at 3 /* 4340 */ 589 sys sys_open_by_handle_at 3 /* 4340 */
590 sys sys_clock_adjtime 2 590 sys sys_clock_adjtime 2
591 sys sys_syncfs 1 591 sys sys_syncfs 1
592 sys sys_sendmmsg 4
592 sys sys_setns 2 593 sys sys_setns 2
593 .endm 594 .endm
594 595
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index fb0575f47f3d..85874d6a8a70 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -428,5 +428,6 @@ sys_call_table:
428 PTR sys_open_by_handle_at 428 PTR sys_open_by_handle_at
429 PTR sys_clock_adjtime /* 5300 */ 429 PTR sys_clock_adjtime /* 5300 */
430 PTR sys_syncfs 430 PTR sys_syncfs
431 PTR sys_sendmmsg
431 PTR sys_setns 432 PTR sys_setns
432 .size sys_call_table,.-sys_call_table 433 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 4de0c5534e73..b85842fc87ae 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -428,5 +428,6 @@ EXPORT(sysn32_call_table)
428 PTR sys_open_by_handle_at 428 PTR sys_open_by_handle_at
429 PTR compat_sys_clock_adjtime /* 6305 */ 429 PTR compat_sys_clock_adjtime /* 6305 */
430 PTR sys_syncfs 430 PTR sys_syncfs
431 PTR compat_sys_sendmmsg
431 PTR sys_setns 432 PTR sys_setns
432 .size sysn32_call_table,.-sysn32_call_table 433 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 4a387de08bfa..46c4763edf21 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -546,5 +546,6 @@ sys_call_table:
546 PTR compat_sys_open_by_handle_at /* 4340 */ 546 PTR compat_sys_open_by_handle_at /* 4340 */
547 PTR compat_sys_clock_adjtime 547 PTR compat_sys_clock_adjtime
548 PTR sys_syncfs 548 PTR sys_syncfs
549 PTR compat_sys_sendmmsg
549 PTR sys_setns 550 PTR sys_setns
550 .size sys_call_table,.-sys_call_table 551 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c
index 94560899d13e..7e9c0ffc11a5 100644
--- a/arch/mips/lantiq/clk.c
+++ b/arch/mips/lantiq/clk.c
@@ -100,6 +100,19 @@ void clk_put(struct clk *clk)
100} 100}
101EXPORT_SYMBOL(clk_put); 101EXPORT_SYMBOL(clk_put);
102 102
103int clk_enable(struct clk *clk)
104{
105 /* not used */
106 return 0;
107}
108EXPORT_SYMBOL(clk_enable);
109
110void clk_disable(struct clk *clk)
111{
112 /* not used */
113}
114EXPORT_SYMBOL(clk_disable);
115
103static inline u32 ltq_get_counter_resolution(void) 116static inline u32 ltq_get_counter_resolution(void)
104{ 117{
105 u32 res; 118 u32 res;
diff --git a/arch/mips/loongson/lemote-2f/ec_kb3310b.c b/arch/mips/loongson/lemote-2f/ec_kb3310b.c
index 64057244eec5..2b666d3a3947 100644
--- a/arch/mips/loongson/lemote-2f/ec_kb3310b.c
+++ b/arch/mips/loongson/lemote-2f/ec_kb3310b.c
@@ -45,8 +45,6 @@ void ec_write(unsigned short addr, unsigned char val)
45 /* flush the write action */ 45 /* flush the write action */
46 inb(EC_IO_PORT_DATA); 46 inb(EC_IO_PORT_DATA);
47 spin_unlock_irqrestore(&index_access_lock, flags); 47 spin_unlock_irqrestore(&index_access_lock, flags);
48
49 return;
50} 48}
51EXPORT_SYMBOL_GPL(ec_write); 49EXPORT_SYMBOL_GPL(ec_write);
52 50
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c
index 55f22a3afe61..256e0cdaa499 100644
--- a/arch/mips/mipssim/sim_setup.c
+++ b/arch/mips/mipssim/sim_setup.c
@@ -34,6 +34,7 @@
34#include <asm/time.h> 34#include <asm/time.h>
35#include <asm/mips-boards/sim.h> 35#include <asm/mips-boards/sim.h>
36#include <asm/mips-boards/simint.h> 36#include <asm/mips-boards/simint.h>
37#include <asm/smp-ops.h>
37 38
38 39
39static void __init serial_init(void); 40static void __init serial_init(void);
@@ -59,18 +60,17 @@ void __init prom_init(void)
59 60
60 prom_meminit(); 61 prom_meminit();
61 62
62#ifdef CONFIG_MIPS_MT_SMP 63 if (cpu_has_mipsmt) {
63 if (cpu_has_mipsmt) 64 if (!register_vsmp_smp_ops())
64 register_smp_ops(&vsmp_smp_ops); 65 return;
65 else 66
66 register_smp_ops(&up_smp_ops);
67#endif
68#ifdef CONFIG_MIPS_MT_SMTC 67#ifdef CONFIG_MIPS_MT_SMTC
69 if (cpu_has_mipsmt)
70 register_smp_ops(&ssmtc_smp_ops); 68 register_smp_ops(&ssmtc_smp_ops);
71 else 69 return;
72 register_smp_ops(&up_smp_ops);
73#endif 70#endif
71 }
72
73 register_up_smp_ops();
74} 74}
75 75
76static void __init serial_init(void) 76static void __init serial_init(void)
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index eeb642e4066e..b9aabb998a32 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -604,6 +604,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
604 r4k_blast_scache(); 604 r4k_blast_scache();
605 else 605 else
606 blast_scache_range(addr, addr + size); 606 blast_scache_range(addr, addr + size);
607 __sync();
607 return; 608 return;
608 } 609 }
609 610
@@ -620,6 +621,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
620 } 621 }
621 622
622 bc_wback_inv(addr, size); 623 bc_wback_inv(addr, size);
624 __sync();
623} 625}
624 626
625static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) 627static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
@@ -647,6 +649,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
647 (addr + size - 1) & almask); 649 (addr + size - 1) & almask);
648 blast_inv_scache_range(addr, addr + size); 650 blast_inv_scache_range(addr, addr + size);
649 } 651 }
652 __sync();
650 return; 653 return;
651 } 654 }
652 655
@@ -663,6 +666,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
663 } 666 }
664 667
665 bc_inv(addr, size); 668 bc_inv(addr, size);
669 __sync();
666} 670}
667#endif /* CONFIG_DMA_NONCOHERENT */ 671#endif /* CONFIG_DMA_NONCOHERENT */
668 672
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 21ea14efb837..46084912e588 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -15,18 +15,18 @@
15#include <linux/scatterlist.h> 15#include <linux/scatterlist.h>
16#include <linux/string.h> 16#include <linux/string.h>
17#include <linux/gfp.h> 17#include <linux/gfp.h>
18#include <linux/highmem.h>
18 19
19#include <asm/cache.h> 20#include <asm/cache.h>
20#include <asm/io.h> 21#include <asm/io.h>
21 22
22#include <dma-coherence.h> 23#include <dma-coherence.h>
23 24
24static inline unsigned long dma_addr_to_virt(struct device *dev, 25static inline struct page *dma_addr_to_page(struct device *dev,
25 dma_addr_t dma_addr) 26 dma_addr_t dma_addr)
26{ 27{
27 unsigned long addr = plat_dma_addr_to_phys(dev, dma_addr); 28 return pfn_to_page(
28 29 plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
29 return (unsigned long)phys_to_virt(addr);
30} 30}
31 31
32/* 32/*
@@ -148,20 +148,20 @@ static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
148 free_pages(addr, get_order(size)); 148 free_pages(addr, get_order(size));
149} 149}
150 150
151static inline void __dma_sync(unsigned long addr, size_t size, 151static inline void __dma_sync_virtual(void *addr, size_t size,
152 enum dma_data_direction direction) 152 enum dma_data_direction direction)
153{ 153{
154 switch (direction) { 154 switch (direction) {
155 case DMA_TO_DEVICE: 155 case DMA_TO_DEVICE:
156 dma_cache_wback(addr, size); 156 dma_cache_wback((unsigned long)addr, size);
157 break; 157 break;
158 158
159 case DMA_FROM_DEVICE: 159 case DMA_FROM_DEVICE:
160 dma_cache_inv(addr, size); 160 dma_cache_inv((unsigned long)addr, size);
161 break; 161 break;
162 162
163 case DMA_BIDIRECTIONAL: 163 case DMA_BIDIRECTIONAL:
164 dma_cache_wback_inv(addr, size); 164 dma_cache_wback_inv((unsigned long)addr, size);
165 break; 165 break;
166 166
167 default: 167 default:
@@ -169,12 +169,49 @@ static inline void __dma_sync(unsigned long addr, size_t size,
169 } 169 }
170} 170}
171 171
172/*
173 * A single sg entry may refer to multiple physically contiguous
174 * pages. But we still need to process highmem pages individually.
175 * If highmem is not configured then the bulk of this loop gets
176 * optimized out.
177 */
178static inline void __dma_sync(struct page *page,
179 unsigned long offset, size_t size, enum dma_data_direction direction)
180{
181 size_t left = size;
182
183 do {
184 size_t len = left;
185
186 if (PageHighMem(page)) {
187 void *addr;
188
189 if (offset + len > PAGE_SIZE) {
190 if (offset >= PAGE_SIZE) {
191 page += offset >> PAGE_SHIFT;
192 offset &= ~PAGE_MASK;
193 }
194 len = PAGE_SIZE - offset;
195 }
196
197 addr = kmap_atomic(page);
198 __dma_sync_virtual(addr + offset, len, direction);
199 kunmap_atomic(addr);
200 } else
201 __dma_sync_virtual(page_address(page) + offset,
202 size, direction);
203 offset = 0;
204 page++;
205 left -= len;
206 } while (left);
207}
208
172static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr, 209static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
173 size_t size, enum dma_data_direction direction, struct dma_attrs *attrs) 210 size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
174{ 211{
175 if (cpu_is_noncoherent_r10000(dev)) 212 if (cpu_is_noncoherent_r10000(dev))
176 __dma_sync(dma_addr_to_virt(dev, dma_addr), size, 213 __dma_sync(dma_addr_to_page(dev, dma_addr),
177 direction); 214 dma_addr & ~PAGE_MASK, size, direction);
178 215
179 plat_unmap_dma_mem(dev, dma_addr, size, direction); 216 plat_unmap_dma_mem(dev, dma_addr, size, direction);
180} 217}
@@ -185,13 +222,11 @@ static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,
185 int i; 222 int i;
186 223
187 for (i = 0; i < nents; i++, sg++) { 224 for (i = 0; i < nents; i++, sg++) {
188 unsigned long addr; 225 if (!plat_device_is_coherent(dev))
189 226 __dma_sync(sg_page(sg), sg->offset, sg->length,
190 addr = (unsigned long) sg_virt(sg); 227 direction);
191 if (!plat_device_is_coherent(dev) && addr) 228 sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
192 __dma_sync(addr, sg->length, direction); 229 sg->offset;
193 sg->dma_address = plat_map_dma_mem(dev,
194 (void *)addr, sg->length);
195 } 230 }
196 231
197 return nents; 232 return nents;
@@ -201,30 +236,23 @@ static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
201 unsigned long offset, size_t size, enum dma_data_direction direction, 236 unsigned long offset, size_t size, enum dma_data_direction direction,
202 struct dma_attrs *attrs) 237 struct dma_attrs *attrs)
203{ 238{
204 unsigned long addr;
205
206 addr = (unsigned long) page_address(page) + offset;
207
208 if (!plat_device_is_coherent(dev)) 239 if (!plat_device_is_coherent(dev))
209 __dma_sync(addr, size, direction); 240 __dma_sync(page, offset, size, direction);
210 241
211 return plat_map_dma_mem(dev, (void *)addr, size); 242 return plat_map_dma_mem_page(dev, page) + offset;
212} 243}
213 244
214static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg, 245static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
215 int nhwentries, enum dma_data_direction direction, 246 int nhwentries, enum dma_data_direction direction,
216 struct dma_attrs *attrs) 247 struct dma_attrs *attrs)
217{ 248{
218 unsigned long addr;
219 int i; 249 int i;
220 250
221 for (i = 0; i < nhwentries; i++, sg++) { 251 for (i = 0; i < nhwentries; i++, sg++) {
222 if (!plat_device_is_coherent(dev) && 252 if (!plat_device_is_coherent(dev) &&
223 direction != DMA_TO_DEVICE) { 253 direction != DMA_TO_DEVICE)
224 addr = (unsigned long) sg_virt(sg); 254 __dma_sync(sg_page(sg), sg->offset, sg->length,
225 if (addr) 255 direction);
226 __dma_sync(addr, sg->length, direction);
227 }
228 plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction); 256 plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
229 } 257 }
230} 258}
@@ -232,24 +260,18 @@ static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
232static void mips_dma_sync_single_for_cpu(struct device *dev, 260static void mips_dma_sync_single_for_cpu(struct device *dev,
233 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) 261 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
234{ 262{
235 if (cpu_is_noncoherent_r10000(dev)) { 263 if (cpu_is_noncoherent_r10000(dev))
236 unsigned long addr; 264 __dma_sync(dma_addr_to_page(dev, dma_handle),
237 265 dma_handle & ~PAGE_MASK, size, direction);
238 addr = dma_addr_to_virt(dev, dma_handle);
239 __dma_sync(addr, size, direction);
240 }
241} 266}
242 267
243static void mips_dma_sync_single_for_device(struct device *dev, 268static void mips_dma_sync_single_for_device(struct device *dev,
244 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) 269 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
245{ 270{
246 plat_extra_sync_for_device(dev); 271 plat_extra_sync_for_device(dev);
247 if (!plat_device_is_coherent(dev)) { 272 if (!plat_device_is_coherent(dev))
248 unsigned long addr; 273 __dma_sync(dma_addr_to_page(dev, dma_handle),
249 274 dma_handle & ~PAGE_MASK, size, direction);
250 addr = dma_addr_to_virt(dev, dma_handle);
251 __dma_sync(addr, size, direction);
252 }
253} 275}
254 276
255static void mips_dma_sync_sg_for_cpu(struct device *dev, 277static void mips_dma_sync_sg_for_cpu(struct device *dev,
@@ -260,8 +282,8 @@ static void mips_dma_sync_sg_for_cpu(struct device *dev,
260 /* Make sure that gcc doesn't leave the empty loop body. */ 282 /* Make sure that gcc doesn't leave the empty loop body. */
261 for (i = 0; i < nelems; i++, sg++) { 283 for (i = 0; i < nelems; i++, sg++) {
262 if (cpu_is_noncoherent_r10000(dev)) 284 if (cpu_is_noncoherent_r10000(dev))
263 __dma_sync((unsigned long)page_address(sg_page(sg)), 285 __dma_sync(sg_page(sg), sg->offset, sg->length,
264 sg->length, direction); 286 direction);
265 } 287 }
266} 288}
267 289
@@ -273,8 +295,8 @@ static void mips_dma_sync_sg_for_device(struct device *dev,
273 /* Make sure that gcc doesn't leave the empty loop body. */ 295 /* Make sure that gcc doesn't leave the empty loop body. */
274 for (i = 0; i < nelems; i++, sg++) { 296 for (i = 0; i < nelems; i++, sg++) {
275 if (!plat_device_is_coherent(dev)) 297 if (!plat_device_is_coherent(dev))
276 __dma_sync((unsigned long)page_address(sg_page(sg)), 298 __dma_sync(sg_page(sg), sg->offset, sg->length,
277 sg->length, direction); 299 direction);
278 } 300 }
279} 301}
280 302
@@ -295,7 +317,7 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
295 317
296 plat_extra_sync_for_device(dev); 318 plat_extra_sync_for_device(dev);
297 if (!plat_device_is_coherent(dev)) 319 if (!plat_device_is_coherent(dev))
298 __dma_sync((unsigned long)vaddr, size, direction); 320 __dma_sync_virtual(vaddr, size, direction);
299} 321}
300 322
301EXPORT_SYMBOL(dma_cache_sync); 323EXPORT_SYMBOL(dma_cache_sync);
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 1aadeb42c5a5..b7ebc4fa89bc 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -277,11 +277,11 @@ void __init fixrange_init(unsigned long start, unsigned long end,
277 k = __pmd_offset(vaddr); 277 k = __pmd_offset(vaddr);
278 pgd = pgd_base + i; 278 pgd = pgd_base + i;
279 279
280 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) { 280 for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
281 pud = (pud_t *)pgd; 281 pud = (pud_t *)pgd;
282 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) { 282 for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
283 pmd = (pmd_t *)pud; 283 pmd = (pmd_t *)pud;
284 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) { 284 for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
285 if (pmd_none(*pmd)) { 285 if (pmd_none(*pmd)) {
286 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); 286 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
287 set_pmd(pmd, __pmd((unsigned long)pte)); 287 set_pmd(pmd, __pmd((unsigned long)pte));
@@ -368,7 +368,7 @@ void __init mem_init(void)
368#ifdef CONFIG_DISCONTIGMEM 368#ifdef CONFIG_DISCONTIGMEM
369#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" 369#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
370#endif 370#endif
371 max_mapnr = highend_pfn; 371 max_mapnr = highend_pfn ? highend_pfn : max_low_pfn;
372#else 372#else
373 max_mapnr = max_low_pfn; 373 max_mapnr = max_low_pfn;
374#endif 374#endif
diff --git a/arch/mips/mm/mmap.c b/arch/mips/mm/mmap.c
index ae3c20a9556e..9ff5d0fac556 100644
--- a/arch/mips/mm/mmap.c
+++ b/arch/mips/mm/mmap.c
@@ -10,6 +10,7 @@
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/mman.h> 11#include <linux/mman.h>
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/personality.h>
13#include <linux/random.h> 14#include <linux/random.h>
14#include <linux/sched.h> 15#include <linux/sched.h>
15 16
@@ -17,21 +18,65 @@ unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
17 18
18EXPORT_SYMBOL(shm_align_mask); 19EXPORT_SYMBOL(shm_align_mask);
19 20
21/* gap between mmap and stack */
22#define MIN_GAP (128*1024*1024UL)
23#define MAX_GAP ((TASK_SIZE)/6*5)
24
25static int mmap_is_legacy(void)
26{
27 if (current->personality & ADDR_COMPAT_LAYOUT)
28 return 1;
29
30 if (rlimit(RLIMIT_STACK) == RLIM_INFINITY)
31 return 1;
32
33 return sysctl_legacy_va_layout;
34}
35
36static unsigned long mmap_base(unsigned long rnd)
37{
38 unsigned long gap = rlimit(RLIMIT_STACK);
39
40 if (gap < MIN_GAP)
41 gap = MIN_GAP;
42 else if (gap > MAX_GAP)
43 gap = MAX_GAP;
44
45 return PAGE_ALIGN(TASK_SIZE - gap - rnd);
46}
47
48static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
49 unsigned long pgoff)
50{
51 unsigned long base = addr & ~shm_align_mask;
52 unsigned long off = (pgoff << PAGE_SHIFT) & shm_align_mask;
53
54 if (base + off <= addr)
55 return base + off;
56
57 return base - off;
58}
59
20#define COLOUR_ALIGN(addr,pgoff) \ 60#define COLOUR_ALIGN(addr,pgoff) \
21 ((((addr) + shm_align_mask) & ~shm_align_mask) + \ 61 ((((addr) + shm_align_mask) & ~shm_align_mask) + \
22 (((pgoff) << PAGE_SHIFT) & shm_align_mask)) 62 (((pgoff) << PAGE_SHIFT) & shm_align_mask))
23 63
24unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, 64enum mmap_allocation_direction {UP, DOWN};
25 unsigned long len, unsigned long pgoff, unsigned long flags) 65
66static unsigned long arch_get_unmapped_area_foo(struct file *filp,
67 unsigned long addr0, unsigned long len, unsigned long pgoff,
68 unsigned long flags, enum mmap_allocation_direction dir)
26{ 69{
27 struct vm_area_struct * vmm; 70 struct mm_struct *mm = current->mm;
71 struct vm_area_struct *vma;
72 unsigned long addr = addr0;
28 int do_color_align; 73 int do_color_align;
29 74
30 if (len > TASK_SIZE) 75 if (unlikely(len > TASK_SIZE))
31 return -ENOMEM; 76 return -ENOMEM;
32 77
33 if (flags & MAP_FIXED) { 78 if (flags & MAP_FIXED) {
34 /* Even MAP_FIXED mappings must reside within TASK_SIZE. */ 79 /* Even MAP_FIXED mappings must reside within TASK_SIZE */
35 if (TASK_SIZE - len < addr) 80 if (TASK_SIZE - len < addr)
36 return -EINVAL; 81 return -EINVAL;
37 82
@@ -48,34 +93,130 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
48 do_color_align = 0; 93 do_color_align = 0;
49 if (filp || (flags & MAP_SHARED)) 94 if (filp || (flags & MAP_SHARED))
50 do_color_align = 1; 95 do_color_align = 1;
96
97 /* requesting a specific address */
51 if (addr) { 98 if (addr) {
52 if (do_color_align) 99 if (do_color_align)
53 addr = COLOUR_ALIGN(addr, pgoff); 100 addr = COLOUR_ALIGN(addr, pgoff);
54 else 101 else
55 addr = PAGE_ALIGN(addr); 102 addr = PAGE_ALIGN(addr);
56 vmm = find_vma(current->mm, addr); 103
104 vma = find_vma(mm, addr);
57 if (TASK_SIZE - len >= addr && 105 if (TASK_SIZE - len >= addr &&
58 (!vmm || addr + len <= vmm->vm_start)) 106 (!vma || addr + len <= vma->vm_start))
59 return addr; 107 return addr;
60 } 108 }
61 addr = current->mm->mmap_base;
62 if (do_color_align)
63 addr = COLOUR_ALIGN(addr, pgoff);
64 else
65 addr = PAGE_ALIGN(addr);
66 109
67 for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) { 110 if (dir == UP) {
68 /* At this point: (!vmm || addr < vmm->vm_end). */ 111 addr = mm->mmap_base;
69 if (TASK_SIZE - len < addr) 112 if (do_color_align)
70 return -ENOMEM; 113 addr = COLOUR_ALIGN(addr, pgoff);
71 if (!vmm || addr + len <= vmm->vm_start) 114 else
72 return addr; 115 addr = PAGE_ALIGN(addr);
73 addr = vmm->vm_end; 116
117 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
118 /* At this point: (!vma || addr < vma->vm_end). */
119 if (TASK_SIZE - len < addr)
120 return -ENOMEM;
121 if (!vma || addr + len <= vma->vm_start)
122 return addr;
123 addr = vma->vm_end;
124 if (do_color_align)
125 addr = COLOUR_ALIGN(addr, pgoff);
126 }
127 } else {
128 /* check if free_area_cache is useful for us */
129 if (len <= mm->cached_hole_size) {
130 mm->cached_hole_size = 0;
131 mm->free_area_cache = mm->mmap_base;
132 }
133
134 /* either no address requested or can't fit in requested address hole */
135 addr = mm->free_area_cache;
136 if (do_color_align) {
137 unsigned long base =
138 COLOUR_ALIGN_DOWN(addr - len, pgoff);
139
140 addr = base + len;
141 }
142
143 /* make sure it can fit in the remaining address space */
144 if (likely(addr > len)) {
145 vma = find_vma(mm, addr - len);
146 if (!vma || addr <= vma->vm_start) {
147 /* remember the address as a hint for next time */
148 return mm->free_area_cache = addr-len;
149 }
150 }
151
152 if (unlikely(mm->mmap_base < len))
153 goto bottomup;
154
155 addr = mm->mmap_base-len;
74 if (do_color_align) 156 if (do_color_align)
75 addr = COLOUR_ALIGN(addr, pgoff); 157 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
158
159 do {
160 /*
161 * Lookup failure means no vma is above this address,
162 * else if new region fits below vma->vm_start,
163 * return with success:
164 */
165 vma = find_vma(mm, addr);
166 if (likely(!vma || addr+len <= vma->vm_start)) {
167 /* remember the address as a hint for next time */
168 return mm->free_area_cache = addr;
169 }
170
171 /* remember the largest hole we saw so far */
172 if (addr + mm->cached_hole_size < vma->vm_start)
173 mm->cached_hole_size = vma->vm_start - addr;
174
175 /* try just below the current vma->vm_start */
176 addr = vma->vm_start-len;
177 if (do_color_align)
178 addr = COLOUR_ALIGN_DOWN(addr, pgoff);
179 } while (likely(len < vma->vm_start));
180
181bottomup:
182 /*
183 * A failed mmap() very likely causes application failure,
184 * so fall back to the bottom-up function here. This scenario
185 * can happen with large stack limits and large mmap()
186 * allocations.
187 */
188 mm->cached_hole_size = ~0UL;
189 mm->free_area_cache = TASK_UNMAPPED_BASE;
190 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
191 /*
192 * Restore the topdown base:
193 */
194 mm->free_area_cache = mm->mmap_base;
195 mm->cached_hole_size = ~0UL;
196
197 return addr;
76 } 198 }
77} 199}
78 200
201unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr0,
202 unsigned long len, unsigned long pgoff, unsigned long flags)
203{
204 return arch_get_unmapped_area_foo(filp,
205 addr0, len, pgoff, flags, UP);
206}
207
208/*
209 * There is no need to export this but sched.h declares the function as
210 * extern so making it static here results in an error.
211 */
212unsigned long arch_get_unmapped_area_topdown(struct file *filp,
213 unsigned long addr0, unsigned long len, unsigned long pgoff,
214 unsigned long flags)
215{
216 return arch_get_unmapped_area_foo(filp,
217 addr0, len, pgoff, flags, DOWN);
218}
219
79void arch_pick_mmap_layout(struct mm_struct *mm) 220void arch_pick_mmap_layout(struct mm_struct *mm)
80{ 221{
81 unsigned long random_factor = 0UL; 222 unsigned long random_factor = 0UL;
@@ -89,9 +230,15 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
89 random_factor &= 0xffffffful; 230 random_factor &= 0xffffffful;
90 } 231 }
91 232
92 mm->mmap_base = TASK_UNMAPPED_BASE + random_factor; 233 if (mmap_is_legacy()) {
93 mm->get_unmapped_area = arch_get_unmapped_area; 234 mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
94 mm->unmap_area = arch_unmap_area; 235 mm->get_unmapped_area = arch_get_unmapped_area;
236 mm->unmap_area = arch_unmap_area;
237 } else {
238 mm->mmap_base = mmap_base(random_factor);
239 mm->get_unmapped_area = arch_get_unmapped_area_topdown;
240 mm->unmap_area = arch_unmap_area_topdown;
241 }
95} 242}
96 243
97static inline unsigned long brk_rnd(void) 244static inline unsigned long brk_rnd(void)
diff --git a/arch/mips/mm/pgtable-32.c b/arch/mips/mm/pgtable-32.c
index 575e4019227b..adc6911ba748 100644
--- a/arch/mips/mm/pgtable-32.c
+++ b/arch/mips/mm/pgtable-32.c
@@ -52,7 +52,7 @@ void __init pagetable_init(void)
52 * Fixed mappings: 52 * Fixed mappings:
53 */ 53 */
54 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK; 54 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
55 fixrange_init(vaddr, 0, pgd_base); 55 fixrange_init(vaddr, vaddr + FIXADDR_SIZE, pgd_base);
56 56
57#ifdef CONFIG_HIGHMEM 57#ifdef CONFIG_HIGHMEM
58 /* 58 /*
diff --git a/arch/mips/mm/pgtable-64.c b/arch/mips/mm/pgtable-64.c
index 78eaa4f0b0ec..cda4e300eb0a 100644
--- a/arch/mips/mm/pgtable-64.c
+++ b/arch/mips/mm/pgtable-64.c
@@ -76,5 +76,5 @@ void __init pagetable_init(void)
76 * Fixed mappings: 76 * Fixed mappings:
77 */ 77 */
78 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK; 78 vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
79 fixrange_init(vaddr, 0, pgd_base); 79 fixrange_init(vaddr, vaddr + FIXADDR_SIZE, pgd_base);
80} 80}
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 424ed4b92e6d..b6e1cff50667 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -42,6 +42,18 @@
42extern void tlb_do_page_fault_0(void); 42extern void tlb_do_page_fault_0(void);
43extern void tlb_do_page_fault_1(void); 43extern void tlb_do_page_fault_1(void);
44 44
45struct work_registers {
46 int r1;
47 int r2;
48 int r3;
49};
50
51struct tlb_reg_save {
52 unsigned long a;
53 unsigned long b;
54} ____cacheline_aligned_in_smp;
55
56static struct tlb_reg_save handler_reg_save[NR_CPUS];
45 57
46static inline int r45k_bvahwbug(void) 58static inline int r45k_bvahwbug(void)
47{ 59{
@@ -248,6 +260,73 @@ static int scratch_reg __cpuinitdata;
248static int pgd_reg __cpuinitdata; 260static int pgd_reg __cpuinitdata;
249enum vmalloc64_mode {not_refill, refill_scratch, refill_noscratch}; 261enum vmalloc64_mode {not_refill, refill_scratch, refill_noscratch};
250 262
263static struct work_registers __cpuinit build_get_work_registers(u32 **p)
264{
265 struct work_registers r;
266
267 int smp_processor_id_reg;
268 int smp_processor_id_sel;
269 int smp_processor_id_shift;
270
271 if (scratch_reg > 0) {
272 /* Save in CPU local C0_KScratch? */
273 UASM_i_MTC0(p, 1, 31, scratch_reg);
274 r.r1 = K0;
275 r.r2 = K1;
276 r.r3 = 1;
277 return r;
278 }
279
280 if (num_possible_cpus() > 1) {
281#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
282 smp_processor_id_shift = 51;
283 smp_processor_id_reg = 20; /* XContext */
284 smp_processor_id_sel = 0;
285#else
286# ifdef CONFIG_32BIT
287 smp_processor_id_shift = 25;
288 smp_processor_id_reg = 4; /* Context */
289 smp_processor_id_sel = 0;
290# endif
291# ifdef CONFIG_64BIT
292 smp_processor_id_shift = 26;
293 smp_processor_id_reg = 4; /* Context */
294 smp_processor_id_sel = 0;
295# endif
296#endif
297 /* Get smp_processor_id */
298 UASM_i_MFC0(p, K0, smp_processor_id_reg, smp_processor_id_sel);
299 UASM_i_SRL_SAFE(p, K0, K0, smp_processor_id_shift);
300
301 /* handler_reg_save index in K0 */
302 UASM_i_SLL(p, K0, K0, ilog2(sizeof(struct tlb_reg_save)));
303
304 UASM_i_LA(p, K1, (long)&handler_reg_save);
305 UASM_i_ADDU(p, K0, K0, K1);
306 } else {
307 UASM_i_LA(p, K0, (long)&handler_reg_save);
308 }
309 /* K0 now points to save area, save $1 and $2 */
310 UASM_i_SW(p, 1, offsetof(struct tlb_reg_save, a), K0);
311 UASM_i_SW(p, 2, offsetof(struct tlb_reg_save, b), K0);
312
313 r.r1 = K1;
314 r.r2 = 1;
315 r.r3 = 2;
316 return r;
317}
318
319static void __cpuinit build_restore_work_registers(u32 **p)
320{
321 if (scratch_reg > 0) {
322 UASM_i_MFC0(p, 1, 31, scratch_reg);
323 return;
324 }
325 /* K0 already points to save area, restore $1 and $2 */
326 UASM_i_LW(p, 1, offsetof(struct tlb_reg_save, a), K0);
327 UASM_i_LW(p, 2, offsetof(struct tlb_reg_save, b), K0);
328}
329
251#ifndef CONFIG_MIPS_PGD_C0_CONTEXT 330#ifndef CONFIG_MIPS_PGD_C0_CONTEXT
252 331
253/* 332/*
@@ -1160,9 +1239,6 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
1160 memset(relocs, 0, sizeof(relocs)); 1239 memset(relocs, 0, sizeof(relocs));
1161 memset(final_handler, 0, sizeof(final_handler)); 1240 memset(final_handler, 0, sizeof(final_handler));
1162 1241
1163 if (scratch_reg == 0)
1164 scratch_reg = allocate_kscratch();
1165
1166 if ((scratch_reg > 0 || scratchpad_available()) && use_bbit_insns()) { 1242 if ((scratch_reg > 0 || scratchpad_available()) && use_bbit_insns()) {
1167 htlb_info = build_fast_tlb_refill_handler(&p, &l, &r, K0, K1, 1243 htlb_info = build_fast_tlb_refill_handler(&p, &l, &r, K0, K1,
1168 scratch_reg); 1244 scratch_reg);
@@ -1462,22 +1538,28 @@ iPTE_SW(u32 **p, struct uasm_reloc **r, unsigned int pte, unsigned int ptr,
1462 */ 1538 */
1463static void __cpuinit 1539static void __cpuinit
1464build_pte_present(u32 **p, struct uasm_reloc **r, 1540build_pte_present(u32 **p, struct uasm_reloc **r,
1465 unsigned int pte, unsigned int ptr, enum label_id lid) 1541 int pte, int ptr, int scratch, enum label_id lid)
1466{ 1542{
1543 int t = scratch >= 0 ? scratch : pte;
1544
1467 if (kernel_uses_smartmips_rixi) { 1545 if (kernel_uses_smartmips_rixi) {
1468 if (use_bbit_insns()) { 1546 if (use_bbit_insns()) {
1469 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid); 1547 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
1470 uasm_i_nop(p); 1548 uasm_i_nop(p);
1471 } else { 1549 } else {
1472 uasm_i_andi(p, pte, pte, _PAGE_PRESENT); 1550 uasm_i_andi(p, t, pte, _PAGE_PRESENT);
1473 uasm_il_beqz(p, r, pte, lid); 1551 uasm_il_beqz(p, r, t, lid);
1474 iPTE_LW(p, pte, ptr); 1552 if (pte == t)
1553 /* You lose the SMP race :-(*/
1554 iPTE_LW(p, pte, ptr);
1475 } 1555 }
1476 } else { 1556 } else {
1477 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); 1557 uasm_i_andi(p, t, pte, _PAGE_PRESENT | _PAGE_READ);
1478 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); 1558 uasm_i_xori(p, t, t, _PAGE_PRESENT | _PAGE_READ);
1479 uasm_il_bnez(p, r, pte, lid); 1559 uasm_il_bnez(p, r, t, lid);
1480 iPTE_LW(p, pte, ptr); 1560 if (pte == t)
1561 /* You lose the SMP race :-(*/
1562 iPTE_LW(p, pte, ptr);
1481 } 1563 }
1482} 1564}
1483 1565
@@ -1497,19 +1579,19 @@ build_make_valid(u32 **p, struct uasm_reloc **r, unsigned int pte,
1497 */ 1579 */
1498static void __cpuinit 1580static void __cpuinit
1499build_pte_writable(u32 **p, struct uasm_reloc **r, 1581build_pte_writable(u32 **p, struct uasm_reloc **r,
1500 unsigned int pte, unsigned int ptr, enum label_id lid) 1582 unsigned int pte, unsigned int ptr, int scratch,
1583 enum label_id lid)
1501{ 1584{
1502 if (use_bbit_insns()) { 1585 int t = scratch >= 0 ? scratch : pte;
1503 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid); 1586
1504 uasm_i_nop(p); 1587 uasm_i_andi(p, t, pte, _PAGE_PRESENT | _PAGE_WRITE);
1505 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid); 1588 uasm_i_xori(p, t, t, _PAGE_PRESENT | _PAGE_WRITE);
1506 uasm_i_nop(p); 1589 uasm_il_bnez(p, r, t, lid);
1507 } else { 1590 if (pte == t)
1508 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); 1591 /* You lose the SMP race :-(*/
1509 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
1510 uasm_il_bnez(p, r, pte, lid);
1511 iPTE_LW(p, pte, ptr); 1592 iPTE_LW(p, pte, ptr);
1512 } 1593 else
1594 uasm_i_nop(p);
1513} 1595}
1514 1596
1515/* Make PTE writable, update software status bits as well, then store 1597/* Make PTE writable, update software status bits as well, then store
@@ -1531,15 +1613,19 @@ build_make_write(u32 **p, struct uasm_reloc **r, unsigned int pte,
1531 */ 1613 */
1532static void __cpuinit 1614static void __cpuinit
1533build_pte_modifiable(u32 **p, struct uasm_reloc **r, 1615build_pte_modifiable(u32 **p, struct uasm_reloc **r,
1534 unsigned int pte, unsigned int ptr, enum label_id lid) 1616 unsigned int pte, unsigned int ptr, int scratch,
1617 enum label_id lid)
1535{ 1618{
1536 if (use_bbit_insns()) { 1619 if (use_bbit_insns()) {
1537 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid); 1620 uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid);
1538 uasm_i_nop(p); 1621 uasm_i_nop(p);
1539 } else { 1622 } else {
1540 uasm_i_andi(p, pte, pte, _PAGE_WRITE); 1623 int t = scratch >= 0 ? scratch : pte;
1541 uasm_il_beqz(p, r, pte, lid); 1624 uasm_i_andi(p, t, pte, _PAGE_WRITE);
1542 iPTE_LW(p, pte, ptr); 1625 uasm_il_beqz(p, r, t, lid);
1626 if (pte == t)
1627 /* You lose the SMP race :-(*/
1628 iPTE_LW(p, pte, ptr);
1543 } 1629 }
1544} 1630}
1545 1631
@@ -1619,7 +1705,7 @@ static void __cpuinit build_r3000_tlb_load_handler(void)
1619 memset(relocs, 0, sizeof(relocs)); 1705 memset(relocs, 0, sizeof(relocs));
1620 1706
1621 build_r3000_tlbchange_handler_head(&p, K0, K1); 1707 build_r3000_tlbchange_handler_head(&p, K0, K1);
1622 build_pte_present(&p, &r, K0, K1, label_nopage_tlbl); 1708 build_pte_present(&p, &r, K0, K1, -1, label_nopage_tlbl);
1623 uasm_i_nop(&p); /* load delay */ 1709 uasm_i_nop(&p); /* load delay */
1624 build_make_valid(&p, &r, K0, K1); 1710 build_make_valid(&p, &r, K0, K1);
1625 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); 1711 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
@@ -1649,7 +1735,7 @@ static void __cpuinit build_r3000_tlb_store_handler(void)
1649 memset(relocs, 0, sizeof(relocs)); 1735 memset(relocs, 0, sizeof(relocs));
1650 1736
1651 build_r3000_tlbchange_handler_head(&p, K0, K1); 1737 build_r3000_tlbchange_handler_head(&p, K0, K1);
1652 build_pte_writable(&p, &r, K0, K1, label_nopage_tlbs); 1738 build_pte_writable(&p, &r, K0, K1, -1, label_nopage_tlbs);
1653 uasm_i_nop(&p); /* load delay */ 1739 uasm_i_nop(&p); /* load delay */
1654 build_make_write(&p, &r, K0, K1); 1740 build_make_write(&p, &r, K0, K1);
1655 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); 1741 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
@@ -1673,13 +1759,14 @@ static void __cpuinit build_r3000_tlb_modify_handler(void)
1673 u32 *p = handle_tlbm; 1759 u32 *p = handle_tlbm;
1674 struct uasm_label *l = labels; 1760 struct uasm_label *l = labels;
1675 struct uasm_reloc *r = relocs; 1761 struct uasm_reloc *r = relocs;
1762 struct work_registers wr;
1676 1763
1677 memset(handle_tlbm, 0, sizeof(handle_tlbm)); 1764 memset(handle_tlbm, 0, sizeof(handle_tlbm));
1678 memset(labels, 0, sizeof(labels)); 1765 memset(labels, 0, sizeof(labels));
1679 memset(relocs, 0, sizeof(relocs)); 1766 memset(relocs, 0, sizeof(relocs));
1680 1767
1681 build_r3000_tlbchange_handler_head(&p, K0, K1); 1768 build_r3000_tlbchange_handler_head(&p, K0, K1);
1682 build_pte_modifiable(&p, &r, K0, K1, label_nopage_tlbm); 1769 build_pte_modifiable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbm);
1683 uasm_i_nop(&p); /* load delay */ 1770 uasm_i_nop(&p); /* load delay */
1684 build_make_write(&p, &r, K0, K1); 1771 build_make_write(&p, &r, K0, K1);
1685 build_r3000_pte_reload_tlbwi(&p, K0, K1); 1772 build_r3000_pte_reload_tlbwi(&p, K0, K1);
@@ -1702,15 +1789,16 @@ static void __cpuinit build_r3000_tlb_modify_handler(void)
1702/* 1789/*
1703 * R4000 style TLB load/store/modify handlers. 1790 * R4000 style TLB load/store/modify handlers.
1704 */ 1791 */
1705static void __cpuinit 1792static struct work_registers __cpuinit
1706build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l, 1793build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
1707 struct uasm_reloc **r, unsigned int pte, 1794 struct uasm_reloc **r)
1708 unsigned int ptr)
1709{ 1795{
1796 struct work_registers wr = build_get_work_registers(p);
1797
1710#ifdef CONFIG_64BIT 1798#ifdef CONFIG_64BIT
1711 build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ 1799 build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
1712#else 1800#else
1713 build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ 1801 build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
1714#endif 1802#endif
1715 1803
1716#ifdef CONFIG_HUGETLB_PAGE 1804#ifdef CONFIG_HUGETLB_PAGE
@@ -1719,21 +1807,22 @@ build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
1719 * instead contains the tlb pte. Check the PAGE_HUGE bit and 1807 * instead contains the tlb pte. Check the PAGE_HUGE bit and
1720 * see if we need to jump to huge tlb processing. 1808 * see if we need to jump to huge tlb processing.
1721 */ 1809 */
1722 build_is_huge_pte(p, r, pte, ptr, label_tlb_huge_update); 1810 build_is_huge_pte(p, r, wr.r1, wr.r2, label_tlb_huge_update);
1723#endif 1811#endif
1724 1812
1725 UASM_i_MFC0(p, pte, C0_BADVADDR); 1813 UASM_i_MFC0(p, wr.r1, C0_BADVADDR);
1726 UASM_i_LW(p, ptr, 0, ptr); 1814 UASM_i_LW(p, wr.r2, 0, wr.r2);
1727 UASM_i_SRL(p, pte, pte, PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2); 1815 UASM_i_SRL(p, wr.r1, wr.r1, PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2);
1728 uasm_i_andi(p, pte, pte, (PTRS_PER_PTE - 1) << PTE_T_LOG2); 1816 uasm_i_andi(p, wr.r1, wr.r1, (PTRS_PER_PTE - 1) << PTE_T_LOG2);
1729 UASM_i_ADDU(p, ptr, ptr, pte); 1817 UASM_i_ADDU(p, wr.r2, wr.r2, wr.r1);
1730 1818
1731#ifdef CONFIG_SMP 1819#ifdef CONFIG_SMP
1732 uasm_l_smp_pgtable_change(l, *p); 1820 uasm_l_smp_pgtable_change(l, *p);
1733#endif 1821#endif
1734 iPTE_LW(p, pte, ptr); /* get even pte */ 1822 iPTE_LW(p, wr.r1, wr.r2); /* get even pte */
1735 if (!m4kc_tlbp_war()) 1823 if (!m4kc_tlbp_war())
1736 build_tlb_probe_entry(p); 1824 build_tlb_probe_entry(p);
1825 return wr;
1737} 1826}
1738 1827
1739static void __cpuinit 1828static void __cpuinit
@@ -1746,6 +1835,7 @@ build_r4000_tlbchange_handler_tail(u32 **p, struct uasm_label **l,
1746 build_update_entries(p, tmp, ptr); 1835 build_update_entries(p, tmp, ptr);
1747 build_tlb_write_entry(p, l, r, tlb_indexed); 1836 build_tlb_write_entry(p, l, r, tlb_indexed);
1748 uasm_l_leave(l, *p); 1837 uasm_l_leave(l, *p);
1838 build_restore_work_registers(p);
1749 uasm_i_eret(p); /* return from trap */ 1839 uasm_i_eret(p); /* return from trap */
1750 1840
1751#ifdef CONFIG_64BIT 1841#ifdef CONFIG_64BIT
@@ -1758,6 +1848,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1758 u32 *p = handle_tlbl; 1848 u32 *p = handle_tlbl;
1759 struct uasm_label *l = labels; 1849 struct uasm_label *l = labels;
1760 struct uasm_reloc *r = relocs; 1850 struct uasm_reloc *r = relocs;
1851 struct work_registers wr;
1761 1852
1762 memset(handle_tlbl, 0, sizeof(handle_tlbl)); 1853 memset(handle_tlbl, 0, sizeof(handle_tlbl));
1763 memset(labels, 0, sizeof(labels)); 1854 memset(labels, 0, sizeof(labels));
@@ -1777,8 +1868,8 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1777 /* No need for uasm_i_nop */ 1868 /* No need for uasm_i_nop */
1778 } 1869 }
1779 1870
1780 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); 1871 wr = build_r4000_tlbchange_handler_head(&p, &l, &r);
1781 build_pte_present(&p, &r, K0, K1, label_nopage_tlbl); 1872 build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
1782 if (m4kc_tlbp_war()) 1873 if (m4kc_tlbp_war())
1783 build_tlb_probe_entry(&p); 1874 build_tlb_probe_entry(&p);
1784 1875
@@ -1788,44 +1879,43 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1788 * have triggered it. Skip the expensive test.. 1879 * have triggered it. Skip the expensive test..
1789 */ 1880 */
1790 if (use_bbit_insns()) { 1881 if (use_bbit_insns()) {
1791 uasm_il_bbit0(&p, &r, K0, ilog2(_PAGE_VALID), 1882 uasm_il_bbit0(&p, &r, wr.r1, ilog2(_PAGE_VALID),
1792 label_tlbl_goaround1); 1883 label_tlbl_goaround1);
1793 } else { 1884 } else {
1794 uasm_i_andi(&p, K0, K0, _PAGE_VALID); 1885 uasm_i_andi(&p, wr.r3, wr.r1, _PAGE_VALID);
1795 uasm_il_beqz(&p, &r, K0, label_tlbl_goaround1); 1886 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround1);
1796 } 1887 }
1797 uasm_i_nop(&p); 1888 uasm_i_nop(&p);
1798 1889
1799 uasm_i_tlbr(&p); 1890 uasm_i_tlbr(&p);
1800 /* Examine entrylo 0 or 1 based on ptr. */ 1891 /* Examine entrylo 0 or 1 based on ptr. */
1801 if (use_bbit_insns()) { 1892 if (use_bbit_insns()) {
1802 uasm_i_bbit0(&p, K1, ilog2(sizeof(pte_t)), 8); 1893 uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
1803 } else { 1894 } else {
1804 uasm_i_andi(&p, K0, K1, sizeof(pte_t)); 1895 uasm_i_andi(&p, wr.r3, wr.r2, sizeof(pte_t));
1805 uasm_i_beqz(&p, K0, 8); 1896 uasm_i_beqz(&p, wr.r3, 8);
1806 } 1897 }
1807 1898 /* load it in the delay slot*/
1808 UASM_i_MFC0(&p, K0, C0_ENTRYLO0); /* load it in the delay slot*/ 1899 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO0);
1809 UASM_i_MFC0(&p, K0, C0_ENTRYLO1); /* load it if ptr is odd */ 1900 /* load it if ptr is odd */
1901 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO1);
1810 /* 1902 /*
1811 * If the entryLo (now in K0) is valid (bit 1), RI or 1903 * If the entryLo (now in wr.r3) is valid (bit 1), RI or
1812 * XI must have triggered it. 1904 * XI must have triggered it.
1813 */ 1905 */
1814 if (use_bbit_insns()) { 1906 if (use_bbit_insns()) {
1815 uasm_il_bbit1(&p, &r, K0, 1, label_nopage_tlbl); 1907 uasm_il_bbit1(&p, &r, wr.r3, 1, label_nopage_tlbl);
1816 /* Reload the PTE value */ 1908 uasm_i_nop(&p);
1817 iPTE_LW(&p, K0, K1);
1818 uasm_l_tlbl_goaround1(&l, p); 1909 uasm_l_tlbl_goaround1(&l, p);
1819 } else { 1910 } else {
1820 uasm_i_andi(&p, K0, K0, 2); 1911 uasm_i_andi(&p, wr.r3, wr.r3, 2);
1821 uasm_il_bnez(&p, &r, K0, label_nopage_tlbl); 1912 uasm_il_bnez(&p, &r, wr.r3, label_nopage_tlbl);
1822 uasm_l_tlbl_goaround1(&l, p); 1913 uasm_i_nop(&p);
1823 /* Reload the PTE value */
1824 iPTE_LW(&p, K0, K1);
1825 } 1914 }
1915 uasm_l_tlbl_goaround1(&l, p);
1826 } 1916 }
1827 build_make_valid(&p, &r, K0, K1); 1917 build_make_valid(&p, &r, wr.r1, wr.r2);
1828 build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); 1918 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
1829 1919
1830#ifdef CONFIG_HUGETLB_PAGE 1920#ifdef CONFIG_HUGETLB_PAGE
1831 /* 1921 /*
@@ -1833,8 +1923,8 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1833 * spots a huge page. 1923 * spots a huge page.
1834 */ 1924 */
1835 uasm_l_tlb_huge_update(&l, p); 1925 uasm_l_tlb_huge_update(&l, p);
1836 iPTE_LW(&p, K0, K1); 1926 iPTE_LW(&p, wr.r1, wr.r2);
1837 build_pte_present(&p, &r, K0, K1, label_nopage_tlbl); 1927 build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
1838 build_tlb_probe_entry(&p); 1928 build_tlb_probe_entry(&p);
1839 1929
1840 if (kernel_uses_smartmips_rixi) { 1930 if (kernel_uses_smartmips_rixi) {
@@ -1843,50 +1933,51 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1843 * have triggered it. Skip the expensive test.. 1933 * have triggered it. Skip the expensive test..
1844 */ 1934 */
1845 if (use_bbit_insns()) { 1935 if (use_bbit_insns()) {
1846 uasm_il_bbit0(&p, &r, K0, ilog2(_PAGE_VALID), 1936 uasm_il_bbit0(&p, &r, wr.r1, ilog2(_PAGE_VALID),
1847 label_tlbl_goaround2); 1937 label_tlbl_goaround2);
1848 } else { 1938 } else {
1849 uasm_i_andi(&p, K0, K0, _PAGE_VALID); 1939 uasm_i_andi(&p, wr.r3, wr.r1, _PAGE_VALID);
1850 uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2); 1940 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2);
1851 } 1941 }
1852 uasm_i_nop(&p); 1942 uasm_i_nop(&p);
1853 1943
1854 uasm_i_tlbr(&p); 1944 uasm_i_tlbr(&p);
1855 /* Examine entrylo 0 or 1 based on ptr. */ 1945 /* Examine entrylo 0 or 1 based on ptr. */
1856 if (use_bbit_insns()) { 1946 if (use_bbit_insns()) {
1857 uasm_i_bbit0(&p, K1, ilog2(sizeof(pte_t)), 8); 1947 uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
1858 } else { 1948 } else {
1859 uasm_i_andi(&p, K0, K1, sizeof(pte_t)); 1949 uasm_i_andi(&p, wr.r3, wr.r2, sizeof(pte_t));
1860 uasm_i_beqz(&p, K0, 8); 1950 uasm_i_beqz(&p, wr.r3, 8);
1861 } 1951 }
1862 UASM_i_MFC0(&p, K0, C0_ENTRYLO0); /* load it in the delay slot*/ 1952 /* load it in the delay slot*/
1863 UASM_i_MFC0(&p, K0, C0_ENTRYLO1); /* load it if ptr is odd */ 1953 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO0);
1954 /* load it if ptr is odd */
1955 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO1);
1864 /* 1956 /*
1865 * If the entryLo (now in K0) is valid (bit 1), RI or 1957 * If the entryLo (now in wr.r3) is valid (bit 1), RI or
1866 * XI must have triggered it. 1958 * XI must have triggered it.
1867 */ 1959 */
1868 if (use_bbit_insns()) { 1960 if (use_bbit_insns()) {
1869 uasm_il_bbit0(&p, &r, K0, 1, label_tlbl_goaround2); 1961 uasm_il_bbit0(&p, &r, wr.r3, 1, label_tlbl_goaround2);
1870 } else { 1962 } else {
1871 uasm_i_andi(&p, K0, K0, 2); 1963 uasm_i_andi(&p, wr.r3, wr.r3, 2);
1872 uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2); 1964 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2);
1873 } 1965 }
1874 /* Reload the PTE value */
1875 iPTE_LW(&p, K0, K1);
1876 1966
1877 /* 1967 /*
1878 * We clobbered C0_PAGEMASK, restore it. On the other branch 1968 * We clobbered C0_PAGEMASK, restore it. On the other branch
1879 * it is restored in build_huge_tlb_write_entry. 1969 * it is restored in build_huge_tlb_write_entry.
1880 */ 1970 */
1881 build_restore_pagemask(&p, &r, K0, label_nopage_tlbl, 0); 1971 build_restore_pagemask(&p, &r, wr.r3, label_nopage_tlbl, 0);
1882 1972
1883 uasm_l_tlbl_goaround2(&l, p); 1973 uasm_l_tlbl_goaround2(&l, p);
1884 } 1974 }
1885 uasm_i_ori(&p, K0, K0, (_PAGE_ACCESSED | _PAGE_VALID)); 1975 uasm_i_ori(&p, wr.r1, wr.r1, (_PAGE_ACCESSED | _PAGE_VALID));
1886 build_huge_handler_tail(&p, &r, &l, K0, K1); 1976 build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2);
1887#endif 1977#endif
1888 1978
1889 uasm_l_nopage_tlbl(&l, p); 1979 uasm_l_nopage_tlbl(&l, p);
1980 build_restore_work_registers(&p);
1890 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); 1981 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff);
1891 uasm_i_nop(&p); 1982 uasm_i_nop(&p);
1892 1983
@@ -1905,17 +1996,18 @@ static void __cpuinit build_r4000_tlb_store_handler(void)
1905 u32 *p = handle_tlbs; 1996 u32 *p = handle_tlbs;
1906 struct uasm_label *l = labels; 1997 struct uasm_label *l = labels;
1907 struct uasm_reloc *r = relocs; 1998 struct uasm_reloc *r = relocs;
1999 struct work_registers wr;
1908 2000
1909 memset(handle_tlbs, 0, sizeof(handle_tlbs)); 2001 memset(handle_tlbs, 0, sizeof(handle_tlbs));
1910 memset(labels, 0, sizeof(labels)); 2002 memset(labels, 0, sizeof(labels));
1911 memset(relocs, 0, sizeof(relocs)); 2003 memset(relocs, 0, sizeof(relocs));
1912 2004
1913 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); 2005 wr = build_r4000_tlbchange_handler_head(&p, &l, &r);
1914 build_pte_writable(&p, &r, K0, K1, label_nopage_tlbs); 2006 build_pte_writable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbs);
1915 if (m4kc_tlbp_war()) 2007 if (m4kc_tlbp_war())
1916 build_tlb_probe_entry(&p); 2008 build_tlb_probe_entry(&p);
1917 build_make_write(&p, &r, K0, K1); 2009 build_make_write(&p, &r, wr.r1, wr.r2);
1918 build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); 2010 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
1919 2011
1920#ifdef CONFIG_HUGETLB_PAGE 2012#ifdef CONFIG_HUGETLB_PAGE
1921 /* 2013 /*
@@ -1923,15 +2015,16 @@ static void __cpuinit build_r4000_tlb_store_handler(void)
1923 * build_r4000_tlbchange_handler_head spots a huge page. 2015 * build_r4000_tlbchange_handler_head spots a huge page.
1924 */ 2016 */
1925 uasm_l_tlb_huge_update(&l, p); 2017 uasm_l_tlb_huge_update(&l, p);
1926 iPTE_LW(&p, K0, K1); 2018 iPTE_LW(&p, wr.r1, wr.r2);
1927 build_pte_writable(&p, &r, K0, K1, label_nopage_tlbs); 2019 build_pte_writable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbs);
1928 build_tlb_probe_entry(&p); 2020 build_tlb_probe_entry(&p);
1929 uasm_i_ori(&p, K0, K0, 2021 uasm_i_ori(&p, wr.r1, wr.r1,
1930 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY); 2022 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY);
1931 build_huge_handler_tail(&p, &r, &l, K0, K1); 2023 build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2);
1932#endif 2024#endif
1933 2025
1934 uasm_l_nopage_tlbs(&l, p); 2026 uasm_l_nopage_tlbs(&l, p);
2027 build_restore_work_registers(&p);
1935 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); 2028 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
1936 uasm_i_nop(&p); 2029 uasm_i_nop(&p);
1937 2030
@@ -1950,18 +2043,19 @@ static void __cpuinit build_r4000_tlb_modify_handler(void)
1950 u32 *p = handle_tlbm; 2043 u32 *p = handle_tlbm;
1951 struct uasm_label *l = labels; 2044 struct uasm_label *l = labels;
1952 struct uasm_reloc *r = relocs; 2045 struct uasm_reloc *r = relocs;
2046 struct work_registers wr;
1953 2047
1954 memset(handle_tlbm, 0, sizeof(handle_tlbm)); 2048 memset(handle_tlbm, 0, sizeof(handle_tlbm));
1955 memset(labels, 0, sizeof(labels)); 2049 memset(labels, 0, sizeof(labels));
1956 memset(relocs, 0, sizeof(relocs)); 2050 memset(relocs, 0, sizeof(relocs));
1957 2051
1958 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); 2052 wr = build_r4000_tlbchange_handler_head(&p, &l, &r);
1959 build_pte_modifiable(&p, &r, K0, K1, label_nopage_tlbm); 2053 build_pte_modifiable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbm);
1960 if (m4kc_tlbp_war()) 2054 if (m4kc_tlbp_war())
1961 build_tlb_probe_entry(&p); 2055 build_tlb_probe_entry(&p);
1962 /* Present and writable bits set, set accessed and dirty bits. */ 2056 /* Present and writable bits set, set accessed and dirty bits. */
1963 build_make_write(&p, &r, K0, K1); 2057 build_make_write(&p, &r, wr.r1, wr.r2);
1964 build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); 2058 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
1965 2059
1966#ifdef CONFIG_HUGETLB_PAGE 2060#ifdef CONFIG_HUGETLB_PAGE
1967 /* 2061 /*
@@ -1969,15 +2063,16 @@ static void __cpuinit build_r4000_tlb_modify_handler(void)
1969 * build_r4000_tlbchange_handler_head spots a huge page. 2063 * build_r4000_tlbchange_handler_head spots a huge page.
1970 */ 2064 */
1971 uasm_l_tlb_huge_update(&l, p); 2065 uasm_l_tlb_huge_update(&l, p);
1972 iPTE_LW(&p, K0, K1); 2066 iPTE_LW(&p, wr.r1, wr.r2);
1973 build_pte_modifiable(&p, &r, K0, K1, label_nopage_tlbm); 2067 build_pte_modifiable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbm);
1974 build_tlb_probe_entry(&p); 2068 build_tlb_probe_entry(&p);
1975 uasm_i_ori(&p, K0, K0, 2069 uasm_i_ori(&p, wr.r1, wr.r1,
1976 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY); 2070 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY);
1977 build_huge_handler_tail(&p, &r, &l, K0, K1); 2071 build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2);
1978#endif 2072#endif
1979 2073
1980 uasm_l_nopage_tlbm(&l, p); 2074 uasm_l_nopage_tlbm(&l, p);
2075 build_restore_work_registers(&p);
1981 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); 2076 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
1982 uasm_i_nop(&p); 2077 uasm_i_nop(&p);
1983 2078
@@ -2036,6 +2131,7 @@ void __cpuinit build_tlb_refill_handler(void)
2036 2131
2037 default: 2132 default:
2038 if (!run_once) { 2133 if (!run_once) {
2134 scratch_reg = allocate_kscratch();
2039#ifdef CONFIG_MIPS_PGD_C0_CONTEXT 2135#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
2040 build_r4000_setup_pgd(); 2136 build_r4000_setup_pgd();
2041#endif 2137#endif
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index 31180c321a1a..4b988b9a30d5 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -28,6 +28,7 @@
28#include <asm/io.h> 28#include <asm/io.h>
29#include <asm/system.h> 29#include <asm/system.h>
30#include <asm/cacheflush.h> 30#include <asm/cacheflush.h>
31#include <asm/smp-ops.h>
31#include <asm/traps.h> 32#include <asm/traps.h>
32 33
33#include <asm/gcmpregs.h> 34#include <asm/gcmpregs.h>
@@ -358,15 +359,14 @@ void __init prom_init(void)
358#ifdef CONFIG_SERIAL_8250_CONSOLE 359#ifdef CONFIG_SERIAL_8250_CONSOLE
359 console_config(); 360 console_config();
360#endif 361#endif
361#ifdef CONFIG_MIPS_CMP
362 /* Early detection of CMP support */ 362 /* Early detection of CMP support */
363 if (gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ)) 363 if (gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ))
364 register_smp_ops(&cmp_smp_ops); 364 if (!register_cmp_smp_ops())
365 else 365 return;
366#endif 366
367#ifdef CONFIG_MIPS_MT_SMP 367 if (!register_vsmp_smp_ops())
368 register_smp_ops(&vsmp_smp_ops); 368 return;
369#endif 369
370#ifdef CONFIG_MIPS_MT_SMTC 370#ifdef CONFIG_MIPS_MT_SMTC
371 register_smp_ops(&msmtc_smp_ops); 371 register_smp_ops(&msmtc_smp_ops);
372#endif 372#endif
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index 49a38b09a488..1efc8c394486 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -152,7 +152,7 @@ int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
152 * runtime code can anyway deal with the null set 152 * runtime code can anyway deal with the null set
153 */ 153 */
154 printk(KERN_WARNING 154 printk(KERN_WARNING
155 "IRQ affinity leaves no legal CPU for IRQ %d\n", irq); 155 "IRQ affinity leaves no legal CPU for IRQ %d\n", d->irq);
156 156
157 /* Do any generic SMTC IRQ affinity setup */ 157 /* Do any generic SMTC IRQ affinity setup */
158 smtc_set_irq_affinity(d->irq, tmask); 158 smtc_set_irq_affinity(d->irq, tmask);
diff --git a/arch/mips/netlogic/Platform b/arch/mips/netlogic/Platform
new file mode 100644
index 000000000000..f87c1640abb5
--- /dev/null
+++ b/arch/mips/netlogic/Platform
@@ -0,0 +1,11 @@
1#
2# NETLOGIC includes
3#
4cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/mach-netlogic
5cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/netlogic
6
7#
8# NETLOGIC XLR/XLS SoC, Simulator and boards
9#
10core-$(CONFIG_NLM_XLR) += arch/mips/netlogic/xlr/
11load-$(CONFIG_NLM_XLR_BOARD) += 0xffffffff84000000
diff --git a/arch/mips/netlogic/xlr/irq.c b/arch/mips/netlogic/xlr/irq.c
index 1446d58e364c..521bb7377eb0 100644
--- a/arch/mips/netlogic/xlr/irq.c
+++ b/arch/mips/netlogic/xlr/irq.c
@@ -209,7 +209,7 @@ void __init init_xlr_irqs(void)
209 irq_set_chip_and_handler(i, &xlr_pic, handle_level_irq); 209 irq_set_chip_and_handler(i, &xlr_pic, handle_level_irq);
210 else 210 else
211 irq_set_chip_and_handler(i, &nlm_cpu_intr, 211 irq_set_chip_and_handler(i, &nlm_cpu_intr,
212 handle_level_irq); 212 handle_percpu_irq);
213 } 213 }
214#ifdef CONFIG_SMP 214#ifdef CONFIG_SMP
215 irq_set_chip_and_handler(IRQ_IPI_SMP_FUNCTION, &nlm_cpu_intr, 215 irq_set_chip_and_handler(IRQ_IPI_SMP_FUNCTION, &nlm_cpu_intr,
diff --git a/arch/mips/netlogic/xlr/smp.c b/arch/mips/netlogic/xlr/smp.c
index b495a7f1433b..d842bce5c940 100644
--- a/arch/mips/netlogic/xlr/smp.c
+++ b/arch/mips/netlogic/xlr/smp.c
@@ -87,17 +87,7 @@ void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc)
87/* IRQ_IPI_SMP_RESCHEDULE handler */ 87/* IRQ_IPI_SMP_RESCHEDULE handler */
88void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc) 88void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc)
89{ 89{
90 set_need_resched(); 90 scheduler_ipi();
91}
92
93void nlm_common_ipi_handler(int irq, struct pt_regs *regs)
94{
95 if (irq == IRQ_IPI_SMP_FUNCTION) {
96 smp_call_function_interrupt();
97 } else {
98 /* Announce that we are for reschduling */
99 set_need_resched();
100 }
101} 91}
102 92
103/* 93/*
@@ -122,6 +112,7 @@ void nlm_smp_finish(void)
122#ifdef notyet 112#ifdef notyet
123 nlm_common_msgring_cpu_init(); 113 nlm_common_msgring_cpu_init();
124#endif 114#endif
115 local_irq_enable();
125} 116}
126 117
127void nlm_cpus_done(void) 118void nlm_cpus_done(void)
diff --git a/arch/mips/nxp/pnx8550/common/setup.c b/arch/mips/nxp/pnx8550/common/setup.c
index 64246c9c875c..71adac323323 100644
--- a/arch/mips/nxp/pnx8550/common/setup.c
+++ b/arch/mips/nxp/pnx8550/common/setup.c
@@ -140,6 +140,4 @@ void __init plat_mem_setup(void)
140 PNX8XXX_UART_LCR_8BIT; 140 PNX8XXX_UART_LCR_8BIT;
141 ip3106_baud(UART_BASE, pnx8550_console_port) = 5; 141 ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
142 } 142 }
143
144 return;
145} 143}
diff --git a/arch/mips/pci/ops-nile4.c b/arch/mips/pci/ops-nile4.c
index b7f0fb0210f4..99929cf88419 100644
--- a/arch/mips/pci/ops-nile4.c
+++ b/arch/mips/pci/ops-nile4.c
@@ -4,7 +4,6 @@
4#include <asm/bootinfo.h> 4#include <asm/bootinfo.h>
5 5
6#include <asm/lasat/lasat.h> 6#include <asm/lasat/lasat.h>
7#include <asm/gt64120.h>
8#include <asm/nile4.h> 7#include <asm/nile4.h>
9 8
10#define PCI_ACCESS_READ 0 9#define PCI_ACCESS_READ 0
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c
index 2413ea67877e..0abfbe04ffc9 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c
@@ -228,13 +228,11 @@ void __init prom_init(void)
228 */ 228 */
229 msp_serial_setup(); 229 msp_serial_setup();
230 230
231#ifdef CONFIG_MIPS_MT_SMP 231 if (register_vsmp_smp_ops()) {
232 register_smp_ops(&vsmp_smp_ops);
233#endif
234
235#ifdef CONFIG_MIPS_MT_SMTC 232#ifdef CONFIG_MIPS_MT_SMTC
236 register_smp_ops(&msp_smtc_smp_ops); 233 register_smp_ops(&msp_smtc_smp_ops);
237#endif 234#endif
235 }
238 236
239#ifdef CONFIG_PMCTWILED 237#ifdef CONFIG_PMCTWILED
240 /* 238 /*
diff --git a/arch/mips/pnx8550/common/setup.c b/arch/mips/pnx8550/common/setup.c
index 43cb3945fdbf..fccd6b0c6d3f 100644
--- a/arch/mips/pnx8550/common/setup.c
+++ b/arch/mips/pnx8550/common/setup.c
@@ -139,6 +139,4 @@ void __init plat_mem_setup(void)
139 PNX8XXX_UART_LCR_8BIT; 139 PNX8XXX_UART_LCR_8BIT;
140 ip3106_baud(UART_BASE, pnx8550_console_port) = 5; 140 ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
141 } 141 }
142
143 return;
144} 142}
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 041fc1afc3f4..a969eb826634 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -251,28 +251,22 @@ static struct platform_device *rb532_devs[] = {
251 251
252static void __init parse_mac_addr(char *macstr) 252static void __init parse_mac_addr(char *macstr)
253{ 253{
254 int i, j; 254 int i, h, l;
255 unsigned char result, value;
256 255
257 for (i = 0; i < 6; i++) { 256 for (i = 0; i < 6; i++) {
258 result = 0;
259
260 if (i != 5 && *(macstr + 2) != ':') 257 if (i != 5 && *(macstr + 2) != ':')
261 return; 258 return;
262 259
263 for (j = 0; j < 2; j++) { 260 h = hex_to_bin(*macstr++);
264 if (isxdigit(*macstr) 261 if (h == -1)
265 && (value = 262 return;
266 isdigit(*macstr) ? *macstr - 263
267 '0' : toupper(*macstr) - 'A' + 10) < 16) { 264 l = hex_to_bin(*macstr++);
268 result = result * 16 + value; 265 if (l == -1)
269 macstr++; 266 return;
270 } else
271 return;
272 }
273 267
274 macstr++; 268 macstr++;
275 korina_dev0_data.mac[i] = result; 269 korina_dev0_data.mac[i] = (h << 4) + l;
276 } 270 }
277} 271}
278 272
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index be4460a5f6a8..76ee045e2ce4 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -123,6 +123,13 @@ static int sb1250_set_affinity(struct irq_data *d, const struct cpumask *mask,
123} 123}
124#endif 124#endif
125 125
126static void disable_sb1250_irq(struct irq_data *d)
127{
128 unsigned int irq = d->irq;
129
130 sb1250_mask_irq(sb1250_irq_owner[irq], irq);
131}
132
126static void enable_sb1250_irq(struct irq_data *d) 133static void enable_sb1250_irq(struct irq_data *d)
127{ 134{
128 unsigned int irq = d->irq; 135 unsigned int irq = d->irq;
@@ -180,6 +187,7 @@ static struct irq_chip sb1250_irq_type = {
180 .name = "SB1250-IMR", 187 .name = "SB1250-IMR",
181 .irq_mask_ack = ack_sb1250_irq, 188 .irq_mask_ack = ack_sb1250_irq,
182 .irq_unmask = enable_sb1250_irq, 189 .irq_unmask = enable_sb1250_irq,
190 .irq_mask = disable_sb1250_irq,
183#ifdef CONFIG_SMP 191#ifdef CONFIG_SMP
184 .irq_set_affinity = sb1250_set_affinity 192 .irq_set_affinity = sb1250_set_affinity
185#endif 193#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 04:29:38 -0500