aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
authorChristoph Lameter <cl@linux.com>2014-08-17 13:30:44 -0400
committerTejun Heo <tj@kernel.org>2014-08-26 13:45:51 -0400
commit35898716b4d3382791d219be317faace580b6a41 (patch)
tree68ffb99723424ec6a259946937eada3a3f3a832c /arch/mips
parentd1cd39ad583e36f3a945ba043a0a2bfae83fe859 (diff)
mips: Replace __get_cpu_var uses
__get_cpu_var() is used for multiple purposes in the kernel source. One of them is address calculation via the form &__get_cpu_var(x). This calculates the address for the instance of the percpu variable of the current processor based on an offset. Other use cases are for storing and retrieving data from the current processors percpu area. __get_cpu_var() can be used as an lvalue when writing data or on the right side of an assignment. __get_cpu_var() is defined as : #define __get_cpu_var(var) (*this_cpu_ptr(&(var))) __get_cpu_var() always only does an address determination. However, store and retrieve operations could use a segment prefix (or global register on other platforms) to avoid the address calculation. this_cpu_write() and this_cpu_read() can directly take an offset into a percpu area and use optimized assembly code to read and write per cpu variables. This patch converts __get_cpu_var into either an explicit address calculation using this_cpu_ptr() or into a use of this_cpu operations that use the offset. Thereby address calculations are avoided and less registers are used when code is generated. At the end of the patch set all uses of __get_cpu_var have been removed so the macro is removed too. The patch set includes passes over all arches as well. Once these operations are used throughout then specialized macros can be defined in non -x86 arches as well in order to optimize per cpu access by f.e. using a global register that may be set to the per cpu base. Transformations done to __get_cpu_var() 1. Determine the address of the percpu instance of the current processor. DEFINE_PER_CPU(int, y); int *x = &__get_cpu_var(y); Converts to int *x = this_cpu_ptr(&y); 2. Same as #1 but this time an array structure is involved. DEFINE_PER_CPU(int, y[20]); int *x = __get_cpu_var(y); Converts to int *x = this_cpu_ptr(y); 3. Retrieve the content of the current processors instance of a per cpu variable. DEFINE_PER_CPU(int, y); int x = __get_cpu_var(y) Converts to int x = __this_cpu_read(y); 4. Retrieve the content of a percpu struct DEFINE_PER_CPU(struct mystruct, y); struct mystruct x = __get_cpu_var(y); Converts to memcpy(&x, this_cpu_ptr(&y), sizeof(x)); 5. Assignment to a per cpu variable DEFINE_PER_CPU(int, y) __get_cpu_var(y) = x; Converts to __this_cpu_write(y, x); 6. Increment/Decrement etc of a per cpu variable DEFINE_PER_CPU(int, y); __get_cpu_var(y)++ Converts to __this_cpu_inc(y) Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Christoph Lameter <cl@linux.com> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/cavium-octeon/octeon-irq.c30
-rw-r--r--arch/mips/kernel/kprobes.c6
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c14
-rw-r--r--arch/mips/kernel/smp-bmips.c2
-rw-r--r--arch/mips/loongson/loongson-3/smp.c6
5 files changed, 29 insertions, 29 deletions
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 1b82ac6921e0..741734049675 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -264,13 +264,13 @@ static void octeon_irq_ciu_enable_local(struct irq_data *data)
264 unsigned long *pen; 264 unsigned long *pen;
265 unsigned long flags; 265 unsigned long flags;
266 union octeon_ciu_chip_data cd; 266 union octeon_ciu_chip_data cd;
267 raw_spinlock_t *lock = &__get_cpu_var(octeon_irq_ciu_spinlock); 267 raw_spinlock_t *lock = this_cpu_ptr(&octeon_irq_ciu_spinlock);
268 268
269 cd.p = irq_data_get_irq_chip_data(data); 269 cd.p = irq_data_get_irq_chip_data(data);
270 270
271 raw_spin_lock_irqsave(lock, flags); 271 raw_spin_lock_irqsave(lock, flags);
272 if (cd.s.line == 0) { 272 if (cd.s.line == 0) {
273 pen = &__get_cpu_var(octeon_irq_ciu0_en_mirror); 273 pen = this_cpu_ptr(&octeon_irq_ciu0_en_mirror);
274 __set_bit(cd.s.bit, pen); 274 __set_bit(cd.s.bit, pen);
275 /* 275 /*
276 * Must be visible to octeon_irq_ip{2,3}_ciu() before 276 * Must be visible to octeon_irq_ip{2,3}_ciu() before
@@ -279,7 +279,7 @@ static void octeon_irq_ciu_enable_local(struct irq_data *data)
279 wmb(); 279 wmb();
280 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); 280 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);
281 } else { 281 } else {
282 pen = &__get_cpu_var(octeon_irq_ciu1_en_mirror); 282 pen = this_cpu_ptr(&octeon_irq_ciu1_en_mirror);
283 __set_bit(cd.s.bit, pen); 283 __set_bit(cd.s.bit, pen);
284 /* 284 /*
285 * Must be visible to octeon_irq_ip{2,3}_ciu() before 285 * Must be visible to octeon_irq_ip{2,3}_ciu() before
@@ -296,13 +296,13 @@ static void octeon_irq_ciu_disable_local(struct irq_data *data)
296 unsigned long *pen; 296 unsigned long *pen;
297 unsigned long flags; 297 unsigned long flags;
298 union octeon_ciu_chip_data cd; 298 union octeon_ciu_chip_data cd;
299 raw_spinlock_t *lock = &__get_cpu_var(octeon_irq_ciu_spinlock); 299 raw_spinlock_t *lock = this_cpu_ptr(&octeon_irq_ciu_spinlock);
300 300
301 cd.p = irq_data_get_irq_chip_data(data); 301 cd.p = irq_data_get_irq_chip_data(data);
302 302
303 raw_spin_lock_irqsave(lock, flags); 303 raw_spin_lock_irqsave(lock, flags);
304 if (cd.s.line == 0) { 304 if (cd.s.line == 0) {
305 pen = &__get_cpu_var(octeon_irq_ciu0_en_mirror); 305 pen = this_cpu_ptr(&octeon_irq_ciu0_en_mirror);
306 __clear_bit(cd.s.bit, pen); 306 __clear_bit(cd.s.bit, pen);
307 /* 307 /*
308 * Must be visible to octeon_irq_ip{2,3}_ciu() before 308 * Must be visible to octeon_irq_ip{2,3}_ciu() before
@@ -311,7 +311,7 @@ static void octeon_irq_ciu_disable_local(struct irq_data *data)
311 wmb(); 311 wmb();
312 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); 312 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);
313 } else { 313 } else {
314 pen = &__get_cpu_var(octeon_irq_ciu1_en_mirror); 314 pen = this_cpu_ptr(&octeon_irq_ciu1_en_mirror);
315 __clear_bit(cd.s.bit, pen); 315 __clear_bit(cd.s.bit, pen);
316 /* 316 /*
317 * Must be visible to octeon_irq_ip{2,3}_ciu() before 317 * Must be visible to octeon_irq_ip{2,3}_ciu() before
@@ -431,11 +431,11 @@ static void octeon_irq_ciu_enable_local_v2(struct irq_data *data)
431 431
432 if (cd.s.line == 0) { 432 if (cd.s.line == 0) {
433 int index = cvmx_get_core_num() * 2; 433 int index = cvmx_get_core_num() * 2;
434 set_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu0_en_mirror)); 434 set_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu0_en_mirror));
435 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); 435 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);
436 } else { 436 } else {
437 int index = cvmx_get_core_num() * 2 + 1; 437 int index = cvmx_get_core_num() * 2 + 1;
438 set_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu1_en_mirror)); 438 set_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu1_en_mirror));
439 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); 439 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);
440 } 440 }
441} 441}
@@ -450,11 +450,11 @@ static void octeon_irq_ciu_disable_local_v2(struct irq_data *data)
450 450
451 if (cd.s.line == 0) { 451 if (cd.s.line == 0) {
452 int index = cvmx_get_core_num() * 2; 452 int index = cvmx_get_core_num() * 2;
453 clear_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu0_en_mirror)); 453 clear_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu0_en_mirror));
454 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); 454 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask);
455 } else { 455 } else {
456 int index = cvmx_get_core_num() * 2 + 1; 456 int index = cvmx_get_core_num() * 2 + 1;
457 clear_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu1_en_mirror)); 457 clear_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu1_en_mirror));
458 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); 458 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask);
459 } 459 }
460} 460}
@@ -1063,7 +1063,7 @@ static void octeon_irq_ip2_ciu(void)
1063 const unsigned long core_id = cvmx_get_core_num(); 1063 const unsigned long core_id = cvmx_get_core_num();
1064 u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(core_id * 2)); 1064 u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(core_id * 2));
1065 1065
1066 ciu_sum &= __get_cpu_var(octeon_irq_ciu0_en_mirror); 1066 ciu_sum &= __this_cpu_read(octeon_irq_ciu0_en_mirror);
1067 if (likely(ciu_sum)) { 1067 if (likely(ciu_sum)) {
1068 int bit = fls64(ciu_sum) - 1; 1068 int bit = fls64(ciu_sum) - 1;
1069 int irq = octeon_irq_ciu_to_irq[0][bit]; 1069 int irq = octeon_irq_ciu_to_irq[0][bit];
@@ -1080,7 +1080,7 @@ static void octeon_irq_ip3_ciu(void)
1080{ 1080{
1081 u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1); 1081 u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1);
1082 1082
1083 ciu_sum &= __get_cpu_var(octeon_irq_ciu1_en_mirror); 1083 ciu_sum &= __this_cpu_read(octeon_irq_ciu1_en_mirror);
1084 if (likely(ciu_sum)) { 1084 if (likely(ciu_sum)) {
1085 int bit = fls64(ciu_sum) - 1; 1085 int bit = fls64(ciu_sum) - 1;
1086 int irq = octeon_irq_ciu_to_irq[1][bit]; 1086 int irq = octeon_irq_ciu_to_irq[1][bit];
@@ -1129,10 +1129,10 @@ static void octeon_irq_init_ciu_percpu(void)
1129 int coreid = cvmx_get_core_num(); 1129 int coreid = cvmx_get_core_num();
1130 1130
1131 1131
1132 __get_cpu_var(octeon_irq_ciu0_en_mirror) = 0; 1132 __this_cpu_write(octeon_irq_ciu0_en_mirror, 0);
1133 __get_cpu_var(octeon_irq_ciu1_en_mirror) = 0; 1133 __this_cpu_write(octeon_irq_ciu1_en_mirror, 0);
1134 wmb(); 1134 wmb();
1135 raw_spin_lock_init(&__get_cpu_var(octeon_irq_ciu_spinlock)); 1135 raw_spin_lock_init(this_cpu_ptr(&octeon_irq_ciu_spinlock));
1136 /* 1136 /*
1137 * Disable All CIU Interrupts. The ones we need will be 1137 * Disable All CIU Interrupts. The ones we need will be
1138 * enabled later. Read the SUM register so we know the write 1138 * enabled later. Read the SUM register so we know the write
diff --git a/arch/mips/kernel/kprobes.c b/arch/mips/kernel/kprobes.c
index 1f8187ab0997..212f46f2014e 100644
--- a/arch/mips/kernel/kprobes.c
+++ b/arch/mips/kernel/kprobes.c
@@ -224,7 +224,7 @@ static void save_previous_kprobe(struct kprobe_ctlblk *kcb)
224 224
225static void restore_previous_kprobe(struct kprobe_ctlblk *kcb) 225static void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
226{ 226{
227 __get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp; 227 __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
228 kcb->kprobe_status = kcb->prev_kprobe.status; 228 kcb->kprobe_status = kcb->prev_kprobe.status;
229 kcb->kprobe_old_SR = kcb->prev_kprobe.old_SR; 229 kcb->kprobe_old_SR = kcb->prev_kprobe.old_SR;
230 kcb->kprobe_saved_SR = kcb->prev_kprobe.saved_SR; 230 kcb->kprobe_saved_SR = kcb->prev_kprobe.saved_SR;
@@ -234,7 +234,7 @@ static void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
234static void set_current_kprobe(struct kprobe *p, struct pt_regs *regs, 234static void set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
235 struct kprobe_ctlblk *kcb) 235 struct kprobe_ctlblk *kcb)
236{ 236{
237 __get_cpu_var(current_kprobe) = p; 237 __this_cpu_write(current_kprobe, p);
238 kcb->kprobe_saved_SR = kcb->kprobe_old_SR = (regs->cp0_status & ST0_IE); 238 kcb->kprobe_saved_SR = kcb->kprobe_old_SR = (regs->cp0_status & ST0_IE);
239 kcb->kprobe_saved_epc = regs->cp0_epc; 239 kcb->kprobe_saved_epc = regs->cp0_epc;
240} 240}
@@ -385,7 +385,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
385 ret = 1; 385 ret = 1;
386 goto no_kprobe; 386 goto no_kprobe;
387 } 387 }
388 p = __get_cpu_var(current_kprobe); 388 p = __this_cpu_read(current_kprobe);
389 if (p->break_handler && p->break_handler(p, regs)) 389 if (p->break_handler && p->break_handler(p, regs))
390 goto ss_probe; 390 goto ss_probe;
391 } 391 }
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 14bf74b0f51c..abb209fa28c6 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -340,7 +340,7 @@ static int mipsxx_pmu_alloc_counter(struct cpu_hw_events *cpuc,
340 340
341static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx) 341static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
342{ 342{
343 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 343 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
344 344
345 WARN_ON(idx < 0 || idx >= mipspmu.num_counters); 345 WARN_ON(idx < 0 || idx >= mipspmu.num_counters);
346 346
@@ -360,7 +360,7 @@ static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
360 360
361static void mipsxx_pmu_disable_event(int idx) 361static void mipsxx_pmu_disable_event(int idx)
362{ 362{
363 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 363 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
364 unsigned long flags; 364 unsigned long flags;
365 365
366 WARN_ON(idx < 0 || idx >= mipspmu.num_counters); 366 WARN_ON(idx < 0 || idx >= mipspmu.num_counters);
@@ -460,7 +460,7 @@ static void mipspmu_stop(struct perf_event *event, int flags)
460 460
461static int mipspmu_add(struct perf_event *event, int flags) 461static int mipspmu_add(struct perf_event *event, int flags)
462{ 462{
463 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 463 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
464 struct hw_perf_event *hwc = &event->hw; 464 struct hw_perf_event *hwc = &event->hw;
465 int idx; 465 int idx;
466 int err = 0; 466 int err = 0;
@@ -496,7 +496,7 @@ out:
496 496
497static void mipspmu_del(struct perf_event *event, int flags) 497static void mipspmu_del(struct perf_event *event, int flags)
498{ 498{
499 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 499 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
500 struct hw_perf_event *hwc = &event->hw; 500 struct hw_perf_event *hwc = &event->hw;
501 int idx = hwc->idx; 501 int idx = hwc->idx;
502 502
@@ -1275,7 +1275,7 @@ static int __hw_perf_event_init(struct perf_event *event)
1275 1275
1276static void pause_local_counters(void) 1276static void pause_local_counters(void)
1277{ 1277{
1278 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 1278 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
1279 int ctr = mipspmu.num_counters; 1279 int ctr = mipspmu.num_counters;
1280 unsigned long flags; 1280 unsigned long flags;
1281 1281
@@ -1291,7 +1291,7 @@ static void pause_local_counters(void)
1291 1291
1292static void resume_local_counters(void) 1292static void resume_local_counters(void)
1293{ 1293{
1294 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 1294 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
1295 int ctr = mipspmu.num_counters; 1295 int ctr = mipspmu.num_counters;
1296 1296
1297 do { 1297 do {
@@ -1302,7 +1302,7 @@ static void resume_local_counters(void)
1302 1302
1303static int mipsxx_pmu_handle_shared_irq(void) 1303static int mipsxx_pmu_handle_shared_irq(void)
1304{ 1304{
1305 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 1305 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
1306 struct perf_sample_data data; 1306 struct perf_sample_data data;
1307 unsigned int counters = mipspmu.num_counters; 1307 unsigned int counters = mipspmu.num_counters;
1308 u64 counter; 1308 u64 counter;
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index df9e2bd9b2c2..06bb5ed6d80a 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -346,7 +346,7 @@ static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id)
346 int action, cpu = irq - IPI0_IRQ; 346 int action, cpu = irq - IPI0_IRQ;
347 347
348 spin_lock_irqsave(&ipi_lock, flags); 348 spin_lock_irqsave(&ipi_lock, flags);
349 action = __get_cpu_var(ipi_action_mask); 349 action = __this_cpu_read(ipi_action_mask);
350 per_cpu(ipi_action_mask, cpu) = 0; 350 per_cpu(ipi_action_mask, cpu) = 0;
351 clear_c0_cause(cpu ? C_SW1 : C_SW0); 351 clear_c0_cause(cpu ? C_SW1 : C_SW0);
352 spin_unlock_irqrestore(&ipi_lock, flags); 352 spin_unlock_irqrestore(&ipi_lock, flags);
diff --git a/arch/mips/loongson/loongson-3/smp.c b/arch/mips/loongson/loongson-3/smp.c
index 74e827b4ec8f..d8c63af6c7cc 100644
--- a/arch/mips/loongson/loongson-3/smp.c
+++ b/arch/mips/loongson/loongson-3/smp.c
@@ -299,16 +299,16 @@ static void loongson3_init_secondary(void)
299 per_cpu(cpu_state, cpu) = CPU_ONLINE; 299 per_cpu(cpu_state, cpu) = CPU_ONLINE;
300 300
301 i = 0; 301 i = 0;
302 __get_cpu_var(core0_c0count) = 0; 302 __this_cpu_write(core0_c0count, 0);
303 loongson3_send_ipi_single(0, SMP_ASK_C0COUNT); 303 loongson3_send_ipi_single(0, SMP_ASK_C0COUNT);
304 while (!__get_cpu_var(core0_c0count)) { 304 while (!__this_cpu_read(core0_c0count)) {
305 i++; 305 i++;
306 cpu_relax(); 306 cpu_relax();
307 } 307 }
308 308
309 if (i > MAX_LOOPS) 309 if (i > MAX_LOOPS)
310 i = MAX_LOOPS; 310 i = MAX_LOOPS;
311 initcount = __get_cpu_var(core0_c0count) + i; 311 initcount = __this_cpu_read(core0_c0count) + i;
312 write_c0_count(initcount); 312 write_c0_count(initcount);
313} 313}
314 314