aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
authorGabor Juhos <juhosg@openwrt.org>2011-06-20 15:26:03 -0400
committerRalf Baechle <ralf@linux-mips.org>2011-12-07 17:02:45 -0500
commit0bd3acdf7d559c8289de73c4c711fd2381e6c7ad (patch)
tree7edee8764810ff405bf14083fd285da596d1a1e9 /arch/mips
parent6d1c8fde2daa498fa6ddf8916bcfc5aee1bbe51b (diff)
MIPS: ath79: Add early printk support for the AR933X SoCs
The AR933X SoCs are using a different UART, thus require different code for early printk support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2521/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/ath79/early_printk.c76
-rw-r--r--arch/mips/include/asm/mach-ath79/ar71xx_regs.h3
-rw-r--r--arch/mips/include/asm/mach-ath79/ar933x_uart.h67
3 files changed, 137 insertions, 9 deletions
diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c
index 7499b0e9df26..6a51ced7a293 100644
--- a/arch/mips/ath79/early_printk.c
+++ b/arch/mips/ath79/early_printk.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Atheros AR71XX/AR724X/AR913X SoC early printk support 2 * Atheros AR7XXX/AR9XXX SoC early printk support
3 * 3 *
4 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> 4 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -10,27 +10,85 @@
10 */ 10 */
11 11
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/errno.h>
13#include <linux/serial_reg.h> 14#include <linux/serial_reg.h>
14#include <asm/addrspace.h> 15#include <asm/addrspace.h>
15 16
17#include <asm/mach-ath79/ath79.h>
16#include <asm/mach-ath79/ar71xx_regs.h> 18#include <asm/mach-ath79/ar71xx_regs.h>
19#include <asm/mach-ath79/ar933x_uart.h>
17 20
18static inline void prom_wait_thre(void __iomem *base) 21static void (*_prom_putchar) (unsigned char);
22
23static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
19{ 24{
20 u32 lsr; 25 u32 t;
21 26
22 do { 27 do {
23 lsr = __raw_readl(base + UART_LSR * 4); 28 t = __raw_readl(reg);
24 if (lsr & UART_LSR_THRE) 29 if ((t & mask) == val)
25 break; 30 break;
26 } while (1); 31 } while (1);
27} 32}
28 33
29void prom_putchar(unsigned char ch) 34static void prom_putchar_ar71xx(unsigned char ch)
30{ 35{
31 void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE)); 36 void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
32 37
33 prom_wait_thre(base); 38 prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
34 __raw_writel(ch, base + UART_TX * 4); 39 __raw_writel(ch, base + UART_TX * 4);
35 prom_wait_thre(base); 40 prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
41}
42
43static void prom_putchar_ar933x(unsigned char ch)
44{
45 void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE));
46
47 prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
48 AR933X_UART_DATA_TX_CSR);
49 __raw_writel(AR933X_UART_DATA_TX_CSR | ch, base + AR933X_UART_DATA_REG);
50 prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
51 AR933X_UART_DATA_TX_CSR);
52}
53
54static void prom_putchar_dummy(unsigned char ch)
55{
56 /* nothing to do */
57}
58
59static void prom_putchar_init(void)
60{
61 void __iomem *base;
62 u32 id;
63
64 base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE));
65 id = __raw_readl(base + AR71XX_RESET_REG_REV_ID);
66 id &= REV_ID_MAJOR_MASK;
67
68 switch (id) {
69 case REV_ID_MAJOR_AR71XX:
70 case REV_ID_MAJOR_AR7240:
71 case REV_ID_MAJOR_AR7241:
72 case REV_ID_MAJOR_AR7242:
73 case REV_ID_MAJOR_AR913X:
74 _prom_putchar = prom_putchar_ar71xx;
75 break;
76
77 case REV_ID_MAJOR_AR9330:
78 case REV_ID_MAJOR_AR9331:
79 _prom_putchar = prom_putchar_ar933x;
80 break;
81
82 default:
83 _prom_putchar = prom_putchar_dummy;
84 break;
85 }
86}
87
88void prom_putchar(unsigned char ch)
89{
90 if (!_prom_putchar)
91 prom_putchar_init();
92
93 _prom_putchar(ch);
36} 94}
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 929be06e1475..90223f206610 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -53,6 +53,9 @@
53#define AR913X_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) 53#define AR913X_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000)
54#define AR913X_WMAC_SIZE 0x30000 54#define AR913X_WMAC_SIZE 0x30000
55 55
56#define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000)
57#define AR933X_UART_SIZE 0x14
58
56/* 59/*
57 * DDR_CTRL block 60 * DDR_CTRL block
58 */ 61 */
diff --git a/arch/mips/include/asm/mach-ath79/ar933x_uart.h b/arch/mips/include/asm/mach-ath79/ar933x_uart.h
new file mode 100644
index 000000000000..52730555937f
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/ar933x_uart.h
@@ -0,0 +1,67 @@
1/*
2 * Atheros AR933X UART defines
3 *
4 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11#ifndef __AR933X_UART_H
12#define __AR933X_UART_H
13
14#define AR933X_UART_REGS_SIZE 20
15#define AR933X_UART_FIFO_SIZE 16
16
17#define AR933X_UART_DATA_REG 0x00
18#define AR933X_UART_CS_REG 0x04
19#define AR933X_UART_CLOCK_REG 0x08
20#define AR933X_UART_INT_REG 0x0c
21#define AR933X_UART_INT_EN_REG 0x10
22
23#define AR933X_UART_DATA_TX_RX_MASK 0xff
24#define AR933X_UART_DATA_RX_CSR BIT(8)
25#define AR933X_UART_DATA_TX_CSR BIT(9)
26
27#define AR933X_UART_CS_PARITY_S 0
28#define AR933X_UART_CS_PARITY_M 0x3
29#define AR933X_UART_CS_PARITY_NONE 0
30#define AR933X_UART_CS_PARITY_ODD 1
31#define AR933X_UART_CS_PARITY_EVEN 2
32#define AR933X_UART_CS_IF_MODE_S 2
33#define AR933X_UART_CS_IF_MODE_M 0x3
34#define AR933X_UART_CS_IF_MODE_NONE 0
35#define AR933X_UART_CS_IF_MODE_DTE 1
36#define AR933X_UART_CS_IF_MODE_DCE 2
37#define AR933X_UART_CS_FLOW_CTRL_S 4
38#define AR933X_UART_CS_FLOW_CTRL_M 0x3
39#define AR933X_UART_CS_DMA_EN BIT(6)
40#define AR933X_UART_CS_TX_READY_ORIDE BIT(7)
41#define AR933X_UART_CS_RX_READY_ORIDE BIT(8)
42#define AR933X_UART_CS_TX_READY BIT(9)
43#define AR933X_UART_CS_RX_BREAK BIT(10)
44#define AR933X_UART_CS_TX_BREAK BIT(11)
45#define AR933X_UART_CS_HOST_INT BIT(12)
46#define AR933X_UART_CS_HOST_INT_EN BIT(13)
47#define AR933X_UART_CS_TX_BUSY BIT(14)
48#define AR933X_UART_CS_RX_BUSY BIT(15)
49
50#define AR933X_UART_CLOCK_STEP_M 0xffff
51#define AR933X_UART_CLOCK_SCALE_M 0xfff
52#define AR933X_UART_CLOCK_SCALE_S 16
53#define AR933X_UART_CLOCK_STEP_M 0xffff
54
55#define AR933X_UART_INT_RX_VALID BIT(0)
56#define AR933X_UART_INT_TX_READY BIT(1)
57#define AR933X_UART_INT_RX_FRAMING_ERR BIT(2)
58#define AR933X_UART_INT_RX_OFLOW_ERR BIT(3)
59#define AR933X_UART_INT_TX_OFLOW_ERR BIT(4)
60#define AR933X_UART_INT_RX_PARITY_ERR BIT(5)
61#define AR933X_UART_INT_RX_BREAK_ON BIT(6)
62#define AR933X_UART_INT_RX_BREAK_OFF BIT(7)
63#define AR933X_UART_INT_RX_FULL BIT(8)
64#define AR933X_UART_INT_TX_EMPTY BIT(9)
65#define AR933X_UART_INT_ALLINTS 0x3ff
66
67#endif /* __AR933X_UART_H */