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authorManuel Lauss <manuel.lauss@googlemail.com>2011-08-02 09:50:58 -0400
committerRalf Baechle <ralf@linux-mips.org>2011-09-21 11:53:01 -0400
commit870168a031b3c5b78191d719d375221f01e98e11 (patch)
treee2ec484b1201cad2dcfc926076d2a07969557b05 /arch/mips
parentc78c48827336b8aec2a5afcf249f0d0a7fe16859 (diff)
MIPS: Alchemy: Include Au1100 in PM code.
The current code forgets the Au1100 when looking for the correct method to suspend the chip. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2675/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/alchemy/common/power.c22
1 files changed, 14 insertions, 8 deletions
diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c
index 647e518c90bc..b86324a42601 100644
--- a/arch/mips/alchemy/common/power.c
+++ b/arch/mips/alchemy/common/power.c
@@ -158,15 +158,21 @@ static void restore_core_regs(void)
158 158
159void au_sleep(void) 159void au_sleep(void)
160{ 160{
161 int cpuid = alchemy_get_cputype(); 161 save_core_regs();
162 if (cpuid != ALCHEMY_CPU_UNKNOWN) { 162
163 save_core_regs(); 163 switch (alchemy_get_cputype()) {
164 if (cpuid <= ALCHEMY_CPU_AU1500) 164 case ALCHEMY_CPU_AU1000:
165 alchemy_sleep_au1000(); 165 case ALCHEMY_CPU_AU1500:
166 else if (cpuid <= ALCHEMY_CPU_AU1200) 166 case ALCHEMY_CPU_AU1100:
167 alchemy_sleep_au1550(); 167 alchemy_sleep_au1000();
168 restore_core_regs(); 168 break;
169 case ALCHEMY_CPU_AU1550:
170 case ALCHEMY_CPU_AU1200:
171 alchemy_sleep_au1550();
172 break;
169 } 173 }
174
175 restore_core_regs();
170} 176}
171 177
172#endif /* CONFIG_PM */ 178#endif /* CONFIG_PM */