diff options
author | David Daney <ddaney@caviumnetworks.com> | 2010-07-23 13:57:49 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-08-05 08:26:11 -0400 |
commit | edfcbb8cac13d679c0d656fd4576b3945429f3c0 (patch) | |
tree | 7963fd5752f5ee7d5e454c87118061eebcc068d3 /arch/mips | |
parent | 7d9eee6e52e817c006666b0efc5068aa219dbecb (diff) |
MIPS: Octeon: Clean up SMP CPU numbering.
Also number offline CPUs that could potentially be brought on-line
later.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1489/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/cavium-octeon/smp.c | 37 |
1 files changed, 30 insertions, 7 deletions
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c index 6d99b9d8887d..8ff2c7b41def 100644 --- a/arch/mips/cavium-octeon/smp.c +++ b/arch/mips/cavium-octeon/smp.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2004-2008 Cavium Networks | 6 | * Copyright (C) 2004-2008, 2009, 2010 Cavium Networks |
7 | */ | 7 | */ |
8 | #include <linux/cpu.h> | 8 | #include <linux/cpu.h> |
9 | #include <linux/init.h> | 9 | #include <linux/init.h> |
@@ -102,24 +102,47 @@ static void octeon_smp_setup(void) | |||
102 | const int coreid = cvmx_get_core_num(); | 102 | const int coreid = cvmx_get_core_num(); |
103 | int cpus; | 103 | int cpus; |
104 | int id; | 104 | int id; |
105 | |||
106 | int core_mask = octeon_get_boot_coremask(); | 105 | int core_mask = octeon_get_boot_coremask(); |
106 | #ifdef CONFIG_HOTPLUG_CPU | ||
107 | unsigned int num_cores = cvmx_octeon_num_cores(); | ||
108 | #endif | ||
109 | |||
110 | /* The present CPUs are initially just the boot cpu (CPU 0). */ | ||
111 | for (id = 0; id < NR_CPUS; id++) { | ||
112 | set_cpu_possible(id, id == 0); | ||
113 | set_cpu_present(id, id == 0); | ||
114 | } | ||
107 | 115 | ||
108 | cpus_clear(cpu_possible_map); | ||
109 | __cpu_number_map[coreid] = 0; | 116 | __cpu_number_map[coreid] = 0; |
110 | __cpu_logical_map[0] = coreid; | 117 | __cpu_logical_map[0] = coreid; |
111 | cpu_set(0, cpu_possible_map); | ||
112 | 118 | ||
119 | /* The present CPUs get the lowest CPU numbers. */ | ||
113 | cpus = 1; | 120 | cpus = 1; |
114 | for (id = 0; id < 16; id++) { | 121 | for (id = 0; id < NR_CPUS; id++) { |
115 | if ((id != coreid) && (core_mask & (1 << id))) { | 122 | if ((id != coreid) && (core_mask & (1 << id))) { |
116 | cpu_set(cpus, cpu_possible_map); | 123 | set_cpu_possible(cpus, true); |
124 | set_cpu_present(cpus, true); | ||
117 | __cpu_number_map[id] = cpus; | 125 | __cpu_number_map[id] = cpus; |
118 | __cpu_logical_map[cpus] = id; | 126 | __cpu_logical_map[cpus] = id; |
119 | cpus++; | 127 | cpus++; |
120 | } | 128 | } |
121 | } | 129 | } |
122 | cpu_present_map = cpu_possible_map; | 130 | |
131 | #ifdef CONFIG_HOTPLUG_CPU | ||
132 | /* | ||
133 | * The possible CPUs are all those present on the chip. We | ||
134 | * will assign CPU numbers for possible cores as well. Cores | ||
135 | * are always consecutively numberd from 0. | ||
136 | */ | ||
137 | for (id = 0; id < num_cores && id < NR_CPUS; id++) { | ||
138 | if (!(core_mask & (1 << id))) { | ||
139 | set_cpu_possible(cpus, true); | ||
140 | __cpu_number_map[id] = cpus; | ||
141 | __cpu_logical_map[cpus] = id; | ||
142 | cpus++; | ||
143 | } | ||
144 | } | ||
145 | #endif | ||
123 | 146 | ||
124 | octeon_smp_hotplug_setup(); | 147 | octeon_smp_hotplug_setup(); |
125 | } | 148 | } |