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authorRalf Baechle <ralf@linux-mips.org>2007-04-26 10:46:24 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-04-27 11:20:23 -0400
commit78709b9df35346965b214e0e548412748d147776 (patch)
treeb2121c099b1a99901aed86921cce59e1f40d3bea /arch/mips
parent2127435e57a15f1fea8d6969e264eeb05b28ba4b (diff)
[MIPS] IP22: Get rid of volatile in IP22 core code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/sgi-ip22/ip22-nvram.c24
-rw-r--r--arch/mips/sgi-ip22/ip22-time.c14
2 files changed, 19 insertions, 19 deletions
diff --git a/arch/mips/sgi-ip22/ip22-nvram.c b/arch/mips/sgi-ip22/ip22-nvram.c
index fd29fd407ae8..e19d60d5fcc1 100644
--- a/arch/mips/sgi-ip22/ip22-nvram.c
+++ b/arch/mips/sgi-ip22/ip22-nvram.c
@@ -52,8 +52,7 @@
52 * national semiconductor nv ram chip the op code is 3 bits and 52 * national semiconductor nv ram chip the op code is 3 bits and
53 * the address is 6/8 bits. 53 * the address is 6/8 bits.
54 */ 54 */
55static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd, 55static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
56 unsigned reg)
57{ 56{
58 unsigned short ser_cmd; 57 unsigned short ser_cmd;
59 int i; 58 int i;
@@ -61,33 +60,34 @@ static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
61 ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND)); 60 ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
62 for (i = 0; i < BITS_IN_COMMAND; i++) { 61 for (i = 0; i < BITS_IN_COMMAND; i++) {
63 if (ser_cmd & (1<<15)) /* if high order bit set */ 62 if (ser_cmd & (1<<15)) /* if high order bit set */
64 *ctrl |= EEPROM_DATO; 63 writel(readl(ctrl) | EEPROM_DATO, ctrl);
65 else 64 else
66 *ctrl &= ~EEPROM_DATO; 65 writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
67 *ctrl &= ~EEPROM_ECLK; 66 writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
68 *ctrl |= EEPROM_ECLK; 67 writel(readl(ctrl) | EEPROM_ECLK, ctrl);
69 ser_cmd <<= 1; 68 ser_cmd <<= 1;
70 } 69 }
71 *ctrl &= ~EEPROM_DATO; /* see data sheet timing diagram */ 70 /* see data sheet timing diagram */
71 writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
72} 72}
73 73
74unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg) 74unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
75{ 75{
76 unsigned short res = 0; 76 unsigned short res = 0;
77 int i; 77 int i;
78 78
79 *ctrl &= ~EEPROM_EPROT; 79 writel(readl(ctrl) & ~EEPROM_EPROT, ctrl);
80 eeprom_cs_on(ctrl); 80 eeprom_cs_on(ctrl);
81 eeprom_cmd(ctrl, EEPROM_READ, reg); 81 eeprom_cmd(ctrl, EEPROM_READ, reg);
82 82
83 /* clock the data ouf of serial mem */ 83 /* clock the data ouf of serial mem */
84 for (i = 0; i < 16; i++) { 84 for (i = 0; i < 16; i++) {
85 *ctrl &= ~EEPROM_ECLK; 85 writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
86 delay(); 86 delay();
87 *ctrl |= EEPROM_ECLK; 87 writel(readl(ctrl) | EEPROM_ECLK, ctrl);
88 delay(); 88 delay();
89 res <<= 1; 89 res <<= 1;
90 if (*ctrl & EEPROM_DATI) 90 if (readl(ctrl) & EEPROM_DATI)
91 res |= 1; 91 res |= 1;
92 } 92 }
93 93
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 205554734099..8e88a442b22a 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -94,7 +94,7 @@ static int indy_rtc_set_time(unsigned long tim)
94static unsigned long dosample(void) 94static unsigned long dosample(void)
95{ 95{
96 u32 ct0, ct1; 96 u32 ct0, ct1;
97 volatile u8 msb, lsb; 97 u8 msb, lsb;
98 98
99 /* Start the counter. */ 99 /* Start the counter. */
100 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | 100 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
@@ -107,21 +107,21 @@ static unsigned long dosample(void)
107 107
108 /* Latch and spin until top byte of counter2 is zero */ 108 /* Latch and spin until top byte of counter2 is zero */
109 do { 109 do {
110 sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT; 110 writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT, &sgint->tcword);
111 lsb = sgint->tcnt2; 111 lsb = readb(&sgint->tcnt2);
112 msb = sgint->tcnt2; 112 msb = readb(&sgint->tcnt2);
113 ct1 = read_c0_count(); 113 ct1 = read_c0_count();
114 } while (msb); 114 } while (msb);
115 115
116 /* Stop the counter. */ 116 /* Stop the counter. */
117 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | 117 writeb(sgint->tcword, (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
118 SGINT_TCWORD_MSWST); 118 SGINT_TCWORD_MSWST));
119 /* 119 /*
120 * Return the difference, this is how far the r4k counter increments 120 * Return the difference, this is how far the r4k counter increments
121 * for every 1/HZ seconds. We round off the nearest 1 MHz of master 121 * for every 1/HZ seconds. We round off the nearest 1 MHz of master
122 * clock (= 1000000 / HZ / 2). 122 * clock (= 1000000 / HZ / 2).
123 */ 123 */
124 /*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/ 124
125 return (ct1 - ct0) / (500000/HZ) * (500000/HZ); 125 return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
126} 126}
127 127