diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2008-08-19 09:55:12 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 11:18:43 -0400 |
commit | 74894363499942a76f2c20e41e8bfebc9fdc267a (patch) | |
tree | 8fbd3b9ab9827e5aff75236b32818822c1b8a4ce /arch/mips | |
parent | 51f607c76e1e7bd089dcad97b6b0a58649be06a3 (diff) |
MIPS: TXx9: Raise priority of interrupts for errors, timers, SIO
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/txx9/generic/irq_tx4927.c | 11 | ||||
-rw-r--r-- | arch/mips/txx9/generic/irq_tx4938.c | 11 |
2 files changed, 22 insertions, 0 deletions
diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c index cbea1fdde82b..ad2870def8f1 100644 --- a/arch/mips/txx9/generic/irq_tx4927.c +++ b/arch/mips/txx9/generic/irq_tx4927.c | |||
@@ -30,8 +30,19 @@ | |||
30 | 30 | ||
31 | void __init tx4927_irq_init(void) | 31 | void __init tx4927_irq_init(void) |
32 | { | 32 | { |
33 | int i; | ||
34 | |||
33 | mips_cpu_irq_init(); | 35 | mips_cpu_irq_init(); |
34 | txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL); | 36 | txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL); |
35 | set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT, | 37 | set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT, |
36 | handle_simple_irq); | 38 | handle_simple_irq); |
39 | /* raise priority for errors, timers, SIO */ | ||
40 | txx9_irq_set_pri(TX4927_IR_ECCERR, 7); | ||
41 | txx9_irq_set_pri(TX4927_IR_WTOERR, 7); | ||
42 | txx9_irq_set_pri(TX4927_IR_PCIERR, 7); | ||
43 | txx9_irq_set_pri(TX4927_IR_PCIPME, 7); | ||
44 | for (i = 0; i < TX4927_NUM_IR_TMR; i++) | ||
45 | txx9_irq_set_pri(TX4927_IR_TMR(i), 6); | ||
46 | for (i = 0; i < TX4927_NUM_IR_SIO; i++) | ||
47 | txx9_irq_set_pri(TX4927_IR_SIO(i), 5); | ||
37 | } | 48 | } |
diff --git a/arch/mips/txx9/generic/irq_tx4938.c b/arch/mips/txx9/generic/irq_tx4938.c index 6eac684bf190..025ae11359a8 100644 --- a/arch/mips/txx9/generic/irq_tx4938.c +++ b/arch/mips/txx9/generic/irq_tx4938.c | |||
@@ -18,8 +18,19 @@ | |||
18 | 18 | ||
19 | void __init tx4938_irq_init(void) | 19 | void __init tx4938_irq_init(void) |
20 | { | 20 | { |
21 | int i; | ||
22 | |||
21 | mips_cpu_irq_init(); | 23 | mips_cpu_irq_init(); |
22 | txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL); | 24 | txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL); |
23 | set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT, | 25 | set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT, |
24 | handle_simple_irq); | 26 | handle_simple_irq); |
27 | /* raise priority for errors, timers, SIO */ | ||
28 | txx9_irq_set_pri(TX4938_IR_ECCERR, 7); | ||
29 | txx9_irq_set_pri(TX4938_IR_WTOERR, 7); | ||
30 | txx9_irq_set_pri(TX4938_IR_PCIERR, 7); | ||
31 | txx9_irq_set_pri(TX4938_IR_PCIPME, 7); | ||
32 | for (i = 0; i < TX4938_NUM_IR_TMR; i++) | ||
33 | txx9_irq_set_pri(TX4938_IR_TMR(i), 6); | ||
34 | for (i = 0; i < TX4938_NUM_IR_SIO; i++) | ||
35 | txx9_irq_set_pri(TX4938_IR_SIO(i), 5); | ||
25 | } | 36 | } |