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author | Borislav Petkov <borislav.petkov@amd.com> | 2010-04-22 10:06:58 -0400 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2010-04-22 20:17:20 -0400 |
commit | b1ab1b4d9ab9812c77843abec79030292ef0a544 (patch) | |
tree | e0405fa695565e9cc6b3510a70168bd10bbd8f3c /arch/mips | |
parent | 6dad2a29646ce3792c40cfc52d77e9b65a7bb143 (diff) |
x86, cacheinfo: Unify AMD L3 cache index disable checking
All F10h CPUs starting with model 8 resp. 9, stepping 1, support L3
cache index disable. Concentrate the family, model, stepping checking at
one place and enable the feature implicitly on upcoming Fam10h models.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <1271945222-5283-2-git-send-email-bp@amd64.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/mips')
0 files changed, 0 insertions, 0 deletions