diff options
author | David S. Miller <davem@davemloft.net> | 2009-06-15 06:02:23 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-06-15 06:02:23 -0400 |
commit | 9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb (patch) | |
tree | 8d104ec2a459346b99413b0b77421ca7b9936c1a /arch/mips | |
parent | ca44d6e60f9de26281fda203f58b570e1748c015 (diff) | |
parent | 45e3e1935e2857c54783291107d33323b3ef33c8 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
Documentation/feature-removal-schedule.txt
drivers/scsi/fcoe/fcoe.c
net/core/drop_monitor.c
net/core/net-traces.c
Diffstat (limited to 'arch/mips')
28 files changed, 123 insertions, 146 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 09b1287a92ce..25f3b0a11ca8 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -72,6 +72,7 @@ config MIPS_COBALT | |||
72 | select IRQ_CPU | 72 | select IRQ_CPU |
73 | select IRQ_GT641XX | 73 | select IRQ_GT641XX |
74 | select PCI_GT64XXX_PCI0 | 74 | select PCI_GT64XXX_PCI0 |
75 | select PCI | ||
75 | select SYS_HAS_CPU_NEVADA | 76 | select SYS_HAS_CPU_NEVADA |
76 | select SYS_HAS_EARLY_PRINTK | 77 | select SYS_HAS_EARLY_PRINTK |
77 | select SYS_SUPPORTS_32BIT_KERNEL | 78 | select SYS_SUPPORTS_32BIT_KERNEL |
@@ -593,7 +594,7 @@ config WR_PPMC | |||
593 | board, which is based on GT64120 bridge chip. | 594 | board, which is based on GT64120 bridge chip. |
594 | 595 | ||
595 | config CAVIUM_OCTEON_SIMULATOR | 596 | config CAVIUM_OCTEON_SIMULATOR |
596 | bool "Support for the Cavium Networks Octeon Simulator" | 597 | bool "Cavium Networks Octeon Simulator" |
597 | select CEVT_R4K | 598 | select CEVT_R4K |
598 | select 64BIT_PHYS_ADDR | 599 | select 64BIT_PHYS_ADDR |
599 | select DMA_COHERENT | 600 | select DMA_COHERENT |
@@ -607,7 +608,7 @@ config CAVIUM_OCTEON_SIMULATOR | |||
607 | hardware. | 608 | hardware. |
608 | 609 | ||
609 | config CAVIUM_OCTEON_REFERENCE_BOARD | 610 | config CAVIUM_OCTEON_REFERENCE_BOARD |
610 | bool "Support for the Cavium Networks Octeon reference board" | 611 | bool "Cavium Networks Octeon reference board" |
611 | select CEVT_R4K | 612 | select CEVT_R4K |
612 | select 64BIT_PHYS_ADDR | 613 | select 64BIT_PHYS_ADDR |
613 | select DMA_COHERENT | 614 | select DMA_COHERENT |
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 26947ab85260..c4cae9e6b802 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -473,12 +473,12 @@ endif | |||
473 | # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys | 473 | # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys |
474 | # | 474 | # |
475 | ifdef CONFIG_SGI_IP28 | 475 | ifdef CONFIG_SGI_IP28 |
476 | ifeq ($(call cc-option-yn,-mr10k-cache-barrier=1), n) | 476 | ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n) |
477 | $(error gcc doesn't support needed option -mr10k-cache-barrier=1) | 477 | $(error gcc doesn't support needed option -mr10k-cache-barrier=store) |
478 | endif | 478 | endif |
479 | endif | 479 | endif |
480 | core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/ | 480 | core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/ |
481 | cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28 | 481 | cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28 |
482 | load-$(CONFIG_SGI_IP28) += 0xa800000020004000 | 482 | load-$(CONFIG_SGI_IP28) += 0xa800000020004000 |
483 | 483 | ||
484 | # | 484 | # |
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 1c19af8daa62..d3a0c8154bec 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c | |||
@@ -177,7 +177,7 @@ static void octeon_irq_ciu0_disable(unsigned int irq) | |||
177 | } | 177 | } |
178 | 178 | ||
179 | #ifdef CONFIG_SMP | 179 | #ifdef CONFIG_SMP |
180 | static void octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest) | 180 | static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest) |
181 | { | 181 | { |
182 | int cpu; | 182 | int cpu; |
183 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ | 183 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ |
@@ -199,6 +199,8 @@ static void octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask | |||
199 | */ | 199 | */ |
200 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); | 200 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); |
201 | write_unlock(&octeon_irq_ciu0_rwlock); | 201 | write_unlock(&octeon_irq_ciu0_rwlock); |
202 | |||
203 | return 0; | ||
202 | } | 204 | } |
203 | #endif | 205 | #endif |
204 | 206 | ||
@@ -292,7 +294,7 @@ static void octeon_irq_ciu1_disable(unsigned int irq) | |||
292 | } | 294 | } |
293 | 295 | ||
294 | #ifdef CONFIG_SMP | 296 | #ifdef CONFIG_SMP |
295 | static void octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest) | 297 | static int octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest) |
296 | { | 298 | { |
297 | int cpu; | 299 | int cpu; |
298 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ | 300 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ |
@@ -315,6 +317,8 @@ static void octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask | |||
315 | */ | 317 | */ |
316 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); | 318 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); |
317 | write_unlock(&octeon_irq_ciu1_rwlock); | 319 | write_unlock(&octeon_irq_ciu1_rwlock); |
320 | |||
321 | return 0; | ||
318 | } | 322 | } |
319 | #endif | 323 | #endif |
320 | 324 | ||
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index 1b332e15ab52..eb7f01cfd1ac 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h | |||
@@ -793,6 +793,6 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) | |||
793 | #define smp_mb__before_atomic_inc() smp_llsc_mb() | 793 | #define smp_mb__before_atomic_inc() smp_llsc_mb() |
794 | #define smp_mb__after_atomic_inc() smp_llsc_mb() | 794 | #define smp_mb__after_atomic_inc() smp_llsc_mb() |
795 | 795 | ||
796 | #include <asm-generic/atomic.h> | 796 | #include <asm-generic/atomic-long.h> |
797 | 797 | ||
798 | #endif /* _ASM_ATOMIC_H */ | 798 | #endif /* _ASM_ATOMIC_H */ |
diff --git a/arch/mips/include/asm/bitsperlong.h b/arch/mips/include/asm/bitsperlong.h new file mode 100644 index 000000000000..3e4c10a8e787 --- /dev/null +++ b/arch/mips/include/asm/bitsperlong.h | |||
@@ -0,0 +1,8 @@ | |||
1 | #ifndef __ASM_MIPS_BITSPERLONG_H | ||
2 | #define __ASM_MIPS_BITSPERLONG_H | ||
3 | |||
4 | #define __BITS_PER_LONG _MIPS_SZLONG | ||
5 | |||
6 | #include <asm-generic/bitsperlong.h> | ||
7 | |||
8 | #endif /* __ASM_MIPS_BITSPERLONG_H */ | ||
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index 744cd8fb107f..126044308dec 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h | |||
@@ -39,8 +39,8 @@ struct cache_desc { | |||
39 | #define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ | 39 | #define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ |
40 | 40 | ||
41 | struct cpuinfo_mips { | 41 | struct cpuinfo_mips { |
42 | unsigned long udelay_val; | 42 | unsigned int udelay_val; |
43 | unsigned long asid_cache; | 43 | unsigned int asid_cache; |
44 | 44 | ||
45 | /* | 45 | /* |
46 | * Capability and feature descriptor structure for MIPS CPU | 46 | * Capability and feature descriptor structure for MIPS CPU |
diff --git a/arch/mips/include/asm/delay.h b/arch/mips/include/asm/delay.h index b0bccd2c4ed5..a07e51b2be13 100644 --- a/arch/mips/include/asm/delay.h +++ b/arch/mips/include/asm/delay.h | |||
@@ -11,94 +11,12 @@ | |||
11 | #ifndef _ASM_DELAY_H | 11 | #ifndef _ASM_DELAY_H |
12 | #define _ASM_DELAY_H | 12 | #define _ASM_DELAY_H |
13 | 13 | ||
14 | #include <linux/param.h> | 14 | extern void __delay(unsigned int loops); |
15 | #include <linux/smp.h> | 15 | extern void __ndelay(unsigned int ns); |
16 | extern void __udelay(unsigned int us); | ||
16 | 17 | ||
17 | #include <asm/compiler.h> | 18 | #define ndelay(ns) __udelay(ns) |
18 | #include <asm/war.h> | 19 | #define udelay(us) __udelay(us) |
19 | |||
20 | static inline void __delay(unsigned long loops) | ||
21 | { | ||
22 | if (sizeof(long) == 4) | ||
23 | __asm__ __volatile__ ( | ||
24 | " .set noreorder \n" | ||
25 | " .align 3 \n" | ||
26 | "1: bnez %0, 1b \n" | ||
27 | " subu %0, 1 \n" | ||
28 | " .set reorder \n" | ||
29 | : "=r" (loops) | ||
30 | : "0" (loops)); | ||
31 | else if (sizeof(long) == 8 && !DADDI_WAR) | ||
32 | __asm__ __volatile__ ( | ||
33 | " .set noreorder \n" | ||
34 | " .align 3 \n" | ||
35 | "1: bnez %0, 1b \n" | ||
36 | " dsubu %0, 1 \n" | ||
37 | " .set reorder \n" | ||
38 | : "=r" (loops) | ||
39 | : "0" (loops)); | ||
40 | else if (sizeof(long) == 8 && DADDI_WAR) | ||
41 | __asm__ __volatile__ ( | ||
42 | " .set noreorder \n" | ||
43 | " .align 3 \n" | ||
44 | "1: bnez %0, 1b \n" | ||
45 | " dsubu %0, %2 \n" | ||
46 | " .set reorder \n" | ||
47 | : "=r" (loops) | ||
48 | : "0" (loops), "r" (1)); | ||
49 | } | ||
50 | |||
51 | |||
52 | /* | ||
53 | * Division by multiplication: you don't have to worry about | ||
54 | * loss of precision. | ||
55 | * | ||
56 | * Use only for very small delays ( < 1 msec). Should probably use a | ||
57 | * lookup table, really, as the multiplications take much too long with | ||
58 | * short delays. This is a "reasonable" implementation, though (and the | ||
59 | * first constant multiplications gets optimized away if the delay is | ||
60 | * a constant) | ||
61 | */ | ||
62 | |||
63 | static inline void __udelay(unsigned long usecs, unsigned long lpj) | ||
64 | { | ||
65 | unsigned long hi, lo; | ||
66 | |||
67 | /* | ||
68 | * The rates of 128 is rounded wrongly by the catchall case | ||
69 | * for 64-bit. Excessive precission? Probably ... | ||
70 | */ | ||
71 | #if defined(CONFIG_64BIT) && (HZ == 128) | ||
72 | usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */ | ||
73 | #elif defined(CONFIG_64BIT) | ||
74 | usecs *= (0x8000000000000000UL / (500000 / HZ)); | ||
75 | #else /* 32-bit junk follows here */ | ||
76 | usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) + | ||
77 | 0x80000000ULL) >> 32); | ||
78 | #endif | ||
79 | |||
80 | if (sizeof(long) == 4) | ||
81 | __asm__("multu\t%2, %3" | ||
82 | : "=h" (usecs), "=l" (lo) | ||
83 | : "r" (usecs), "r" (lpj) | ||
84 | : GCC_REG_ACCUM); | ||
85 | else if (sizeof(long) == 8 && !R4000_WAR) | ||
86 | __asm__("dmultu\t%2, %3" | ||
87 | : "=h" (usecs), "=l" (lo) | ||
88 | : "r" (usecs), "r" (lpj) | ||
89 | : GCC_REG_ACCUM); | ||
90 | else if (sizeof(long) == 8 && R4000_WAR) | ||
91 | __asm__("dmultu\t%3, %4\n\tmfhi\t%0" | ||
92 | : "=r" (usecs), "=h" (hi), "=l" (lo) | ||
93 | : "r" (usecs), "r" (lpj) | ||
94 | : GCC_REG_ACCUM); | ||
95 | |||
96 | __delay(usecs); | ||
97 | } | ||
98 | |||
99 | #define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val | ||
100 | |||
101 | #define udelay(usecs) __udelay((usecs), __udelay_val) | ||
102 | 20 | ||
103 | /* make sure "usecs *= ..." in udelay do not overflow. */ | 21 | /* make sure "usecs *= ..." in udelay do not overflow. */ |
104 | #if HZ >= 1000 | 22 | #if HZ >= 1000 |
diff --git a/arch/mips/include/asm/ioctl.h b/arch/mips/include/asm/ioctl.h index 85067e248a83..916163401b2c 100644 --- a/arch/mips/include/asm/ioctl.h +++ b/arch/mips/include/asm/ioctl.h | |||
@@ -60,12 +60,16 @@ | |||
60 | ((nr) << _IOC_NRSHIFT) | \ | 60 | ((nr) << _IOC_NRSHIFT) | \ |
61 | ((size) << _IOC_SIZESHIFT)) | 61 | ((size) << _IOC_SIZESHIFT)) |
62 | 62 | ||
63 | #ifdef __KERNEL__ | ||
63 | /* provoke compile error for invalid uses of size argument */ | 64 | /* provoke compile error for invalid uses of size argument */ |
64 | extern unsigned int __invalid_size_argument_for_IOC; | 65 | extern unsigned int __invalid_size_argument_for_IOC; |
65 | #define _IOC_TYPECHECK(t) \ | 66 | #define _IOC_TYPECHECK(t) \ |
66 | ((sizeof(t) == sizeof(t[1]) && \ | 67 | ((sizeof(t) == sizeof(t[1]) && \ |
67 | sizeof(t) < (1 << _IOC_SIZEBITS)) ? \ | 68 | sizeof(t) < (1 << _IOC_SIZEBITS)) ? \ |
68 | sizeof(t) : __invalid_size_argument_for_IOC) | 69 | sizeof(t) : __invalid_size_argument_for_IOC) |
70 | #else | ||
71 | #define _IOC_TYPECHECK(t) (sizeof(t)) | ||
72 | #endif | ||
69 | 73 | ||
70 | /* used to create numbers */ | 74 | /* used to create numbers */ |
71 | #define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0) | 75 | #define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0) |
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index 3214ade02d10..4f1eed107b08 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h | |||
@@ -49,7 +49,7 @@ static inline void smtc_im_ack_irq(unsigned int irq) | |||
49 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF | 49 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF |
50 | #include <linux/cpumask.h> | 50 | #include <linux/cpumask.h> |
51 | 51 | ||
52 | extern void plat_set_irq_affinity(unsigned int irq, | 52 | extern int plat_set_irq_affinity(unsigned int irq, |
53 | const struct cpumask *affinity); | 53 | const struct cpumask *affinity); |
54 | extern void smtc_forward_irq(unsigned int irq); | 54 | extern void smtc_forward_irq(unsigned int irq); |
55 | 55 | ||
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index 9f946e4ca057..72c80d2034c2 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h | |||
@@ -189,6 +189,6 @@ typedef struct { unsigned long pgprot; } pgprot_t; | |||
189 | #define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) | 189 | #define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) |
190 | 190 | ||
191 | #include <asm-generic/memory_model.h> | 191 | #include <asm-generic/memory_model.h> |
192 | #include <asm-generic/page.h> | 192 | #include <asm-generic/getorder.h> |
193 | 193 | ||
194 | #endif /* _ASM_PAGE_H */ | 194 | #endif /* _ASM_PAGE_H */ |
diff --git a/arch/mips/include/asm/signal.h b/arch/mips/include/asm/signal.h index bee5153aca48..c783f364938c 100644 --- a/arch/mips/include/asm/signal.h +++ b/arch/mips/include/asm/signal.h | |||
@@ -109,7 +109,7 @@ typedef unsigned long old_sigset_t; /* at least 32 bits */ | |||
109 | #define SIG_UNBLOCK 2 /* for unblocking signals */ | 109 | #define SIG_UNBLOCK 2 /* for unblocking signals */ |
110 | #define SIG_SETMASK 3 /* for setting the signal mask */ | 110 | #define SIG_SETMASK 3 /* for setting the signal mask */ |
111 | 111 | ||
112 | #include <asm-generic/signal.h> | 112 | #include <asm-generic/signal-defs.h> |
113 | 113 | ||
114 | struct sigaction { | 114 | struct sigaction { |
115 | unsigned int sa_flags; | 115 | unsigned int sa_flags; |
diff --git a/arch/mips/include/asm/suspend.h b/arch/mips/include/asm/suspend.h deleted file mode 100644 index 2562f8f9be0e..000000000000 --- a/arch/mips/include/asm/suspend.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_SUSPEND_H | ||
2 | #define __ASM_SUSPEND_H | ||
3 | |||
4 | /* Somewhen... Maybe :-) */ | ||
5 | |||
6 | #endif /* __ASM_SUSPEND_H */ | ||
diff --git a/arch/mips/include/asm/types.h b/arch/mips/include/asm/types.h index 7956e69a3bd5..544a2854598f 100644 --- a/arch/mips/include/asm/types.h +++ b/arch/mips/include/asm/types.h | |||
@@ -31,9 +31,6 @@ typedef unsigned short umode_t; | |||
31 | * These aren't exported outside the kernel to avoid name space clashes | 31 | * These aren't exported outside the kernel to avoid name space clashes |
32 | */ | 32 | */ |
33 | #ifdef __KERNEL__ | 33 | #ifdef __KERNEL__ |
34 | |||
35 | #define BITS_PER_LONG _MIPS_SZLONG | ||
36 | |||
37 | #ifndef __ASSEMBLY__ | 34 | #ifndef __ASSEMBLY__ |
38 | 35 | ||
39 | #if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \ | 36 | #if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \ |
diff --git a/arch/mips/include/asm/uaccess.h b/arch/mips/include/asm/uaccess.h index 8de858f5449f..c2d53c18fd36 100644 --- a/arch/mips/include/asm/uaccess.h +++ b/arch/mips/include/asm/uaccess.h | |||
@@ -956,7 +956,7 @@ __clear_user(void __user *addr, __kernel_size_t size) | |||
956 | void __user * __cl_addr = (addr); \ | 956 | void __user * __cl_addr = (addr); \ |
957 | unsigned long __cl_size = (n); \ | 957 | unsigned long __cl_size = (n); \ |
958 | if (__cl_size && access_ok(VERIFY_WRITE, \ | 958 | if (__cl_size && access_ok(VERIFY_WRITE, \ |
959 | ((unsigned long)(__cl_addr)), __cl_size)) \ | 959 | __cl_addr, __cl_size)) \ |
960 | __cl_size = __clear_user(__cl_addr, __cl_size); \ | 960 | __cl_size = __clear_user(__cl_addr, __cl_size); \ |
961 | __cl_size; \ | 961 | __cl_size; \ |
962 | }) | 962 | }) |
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c index 87deb8f6c458..3f43c2e3aa5a 100644 --- a/arch/mips/kernel/irq-gic.c +++ b/arch/mips/kernel/irq-gic.c | |||
@@ -155,7 +155,7 @@ static void gic_unmask_irq(unsigned int irq) | |||
155 | 155 | ||
156 | static DEFINE_SPINLOCK(gic_lock); | 156 | static DEFINE_SPINLOCK(gic_lock); |
157 | 157 | ||
158 | static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | 158 | static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) |
159 | { | 159 | { |
160 | cpumask_t tmp = CPU_MASK_NONE; | 160 | cpumask_t tmp = CPU_MASK_NONE; |
161 | unsigned long flags; | 161 | unsigned long flags; |
@@ -166,7 +166,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
166 | 166 | ||
167 | cpumask_and(&tmp, cpumask, cpu_online_mask); | 167 | cpumask_and(&tmp, cpumask, cpu_online_mask); |
168 | if (cpus_empty(tmp)) | 168 | if (cpus_empty(tmp)) |
169 | return; | 169 | return -1; |
170 | 170 | ||
171 | /* Assumption : cpumask refers to a single CPU */ | 171 | /* Assumption : cpumask refers to a single CPU */ |
172 | spin_lock_irqsave(&gic_lock, flags); | 172 | spin_lock_irqsave(&gic_lock, flags); |
@@ -190,6 +190,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
190 | cpumask_copy(irq_desc[irq].affinity, cpumask); | 190 | cpumask_copy(irq_desc[irq].affinity, cpumask); |
191 | spin_unlock_irqrestore(&gic_lock, flags); | 191 | spin_unlock_irqrestore(&gic_lock, flags); |
192 | 192 | ||
193 | return 0; | ||
193 | } | 194 | } |
194 | #endif | 195 | #endif |
195 | 196 | ||
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c index 1f60e27523d9..3e9100dcc12d 100644 --- a/arch/mips/kernel/module.c +++ b/arch/mips/kernel/module.c | |||
@@ -68,8 +68,6 @@ void *module_alloc(unsigned long size) | |||
68 | void module_free(struct module *mod, void *module_region) | 68 | void module_free(struct module *mod, void *module_region) |
69 | { | 69 | { |
70 | vfree(module_region); | 70 | vfree(module_region); |
71 | /* FIXME: If module_region == mod->init_region, trim exception | ||
72 | table entries. */ | ||
73 | } | 71 | } |
74 | 72 | ||
75 | int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, | 73 | int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, |
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 26760cad8b69..e0a4ac18fa07 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c | |||
@@ -42,7 +42,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
42 | seq_printf(m, fmt, __cpu_name[n], | 42 | seq_printf(m, fmt, __cpu_name[n], |
43 | (version >> 4) & 0x0f, version & 0x0f, | 43 | (version >> 4) & 0x0f, version & 0x0f, |
44 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); | 44 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); |
45 | seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", | 45 | seq_printf(m, "BogoMIPS\t\t: %u.%02u\n", |
46 | cpu_data[n].udelay_val / (500000/HZ), | 46 | cpu_data[n].udelay_val / (500000/HZ), |
47 | (cpu_data[n].udelay_val / (5000/HZ)) % 100); | 47 | (cpu_data[n].udelay_val / (5000/HZ)) % 100); |
48 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); | 48 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); |
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index c13c7ad2cdae..2adead5a8a37 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile | |||
@@ -2,8 +2,8 @@ | |||
2 | # Makefile for MIPS-specific library files.. | 2 | # Makefile for MIPS-specific library files.. |
3 | # | 3 | # |
4 | 4 | ||
5 | lib-y += csum_partial.o memcpy.o memcpy-inatomic.o memset.o strlen_user.o \ | 5 | lib-y += csum_partial.o delay.o memcpy.o memcpy-inatomic.o memset.o \ |
6 | strncpy_user.o strnlen_user.o uncached.o | 6 | strlen_user.o strncpy_user.o strnlen_user.o uncached.o |
7 | 7 | ||
8 | obj-y += iomap.o | 8 | obj-y += iomap.o |
9 | obj-$(CONFIG_PCI) += iomap-pci.o | 9 | obj-$(CONFIG_PCI) += iomap-pci.o |
diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c new file mode 100644 index 000000000000..f69c6b569eb3 --- /dev/null +++ b/arch/mips/lib/delay.c | |||
@@ -0,0 +1,56 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1994 by Waldorf Electronics | ||
7 | * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle | ||
8 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | ||
9 | * Copyright (C) 2007 Maciej W. Rozycki | ||
10 | */ | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/param.h> | ||
13 | #include <linux/smp.h> | ||
14 | |||
15 | #include <asm/compiler.h> | ||
16 | #include <asm/war.h> | ||
17 | |||
18 | inline void __delay(unsigned int loops) | ||
19 | { | ||
20 | __asm__ __volatile__ ( | ||
21 | " .set noreorder \n" | ||
22 | " .align 3 \n" | ||
23 | "1: bnez %0, 1b \n" | ||
24 | " subu %0, 1 \n" | ||
25 | " .set reorder \n" | ||
26 | : "=r" (loops) | ||
27 | : "0" (loops)); | ||
28 | } | ||
29 | EXPORT_SYMBOL(__delay); | ||
30 | |||
31 | /* | ||
32 | * Division by multiplication: you don't have to worry about | ||
33 | * loss of precision. | ||
34 | * | ||
35 | * Use only for very small delays ( < 1 msec). Should probably use a | ||
36 | * lookup table, really, as the multiplications take much too long with | ||
37 | * short delays. This is a "reasonable" implementation, though (and the | ||
38 | * first constant multiplications gets optimized away if the delay is | ||
39 | * a constant) | ||
40 | */ | ||
41 | |||
42 | void __udelay(unsigned long us) | ||
43 | { | ||
44 | unsigned int lpj = current_cpu_data.udelay_val; | ||
45 | |||
46 | __delay((us * 0x000010c7 * HZ * lpj) >> 32); | ||
47 | } | ||
48 | EXPORT_SYMBOL(__udelay); | ||
49 | |||
50 | void __ndelay(unsigned long ns) | ||
51 | { | ||
52 | unsigned int lpj = current_cpu_data.udelay_val; | ||
53 | |||
54 | __delay((us * 0x00000005 * HZ * lpj) >> 32); | ||
55 | } | ||
56 | EXPORT_SYMBOL(__ndelay); | ||
diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c index f0cf46adb978..1c0048a6f5cf 100644 --- a/arch/mips/mm/tlb-r3k.c +++ b/arch/mips/mm/tlb-r3k.c | |||
@@ -82,8 +82,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | |||
82 | int cpu = smp_processor_id(); | 82 | int cpu = smp_processor_id(); |
83 | 83 | ||
84 | if (cpu_context(cpu, mm) != 0) { | 84 | if (cpu_context(cpu, mm) != 0) { |
85 | unsigned long flags; | 85 | unsigned long size, flags; |
86 | int size; | ||
87 | 86 | ||
88 | #ifdef DEBUG_TLB | 87 | #ifdef DEBUG_TLB |
89 | printk("[tlbrange<%lu,0x%08lx,0x%08lx>]", | 88 | printk("[tlbrange<%lu,0x%08lx,0x%08lx>]", |
@@ -121,8 +120,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | |||
121 | 120 | ||
122 | void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) | 121 | void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) |
123 | { | 122 | { |
124 | unsigned long flags; | 123 | unsigned long size, flags; |
125 | int size; | ||
126 | 124 | ||
127 | #ifdef DEBUG_TLB | 125 | #ifdef DEBUG_TLB |
128 | printk("[tlbrange<%lu,0x%08lx,0x%08lx>]", start, end); | 126 | printk("[tlbrange<%lu,0x%08lx,0x%08lx>]", start, end); |
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 9619f66e531e..892be426787c 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c | |||
@@ -117,8 +117,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | |||
117 | int cpu = smp_processor_id(); | 117 | int cpu = smp_processor_id(); |
118 | 118 | ||
119 | if (cpu_context(cpu, mm) != 0) { | 119 | if (cpu_context(cpu, mm) != 0) { |
120 | unsigned long flags; | 120 | unsigned long size, flags; |
121 | int size; | ||
122 | 121 | ||
123 | ENTER_CRITICAL(flags); | 122 | ENTER_CRITICAL(flags); |
124 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; | 123 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; |
@@ -160,8 +159,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | |||
160 | 159 | ||
161 | void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) | 160 | void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) |
162 | { | 161 | { |
163 | unsigned long flags; | 162 | unsigned long size, flags; |
164 | int size; | ||
165 | 163 | ||
166 | ENTER_CRITICAL(flags); | 164 | ENTER_CRITICAL(flags); |
167 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; | 165 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; |
diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c index 4f01a3be215c..4ec95cc2df2f 100644 --- a/arch/mips/mm/tlb-r8k.c +++ b/arch/mips/mm/tlb-r8k.c | |||
@@ -111,8 +111,7 @@ out_restore: | |||
111 | /* Usable for KV1 addresses only! */ | 111 | /* Usable for KV1 addresses only! */ |
112 | void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) | 112 | void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) |
113 | { | 113 | { |
114 | unsigned long flags; | 114 | unsigned long size, flags; |
115 | int size; | ||
116 | 115 | ||
117 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; | 116 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; |
118 | size = (size + 1) >> 1; | 117 | size = (size + 1) >> 1; |
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c index 5ba31888fefb..499ffe5475df 100644 --- a/arch/mips/mti-malta/malta-smtc.c +++ b/arch/mips/mti-malta/malta-smtc.c | |||
@@ -114,7 +114,7 @@ struct plat_smp_ops msmtc_smp_ops = { | |||
114 | */ | 114 | */ |
115 | 115 | ||
116 | 116 | ||
117 | void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | 117 | int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) |
118 | { | 118 | { |
119 | cpumask_t tmask; | 119 | cpumask_t tmask; |
120 | int cpu = 0; | 120 | int cpu = 0; |
@@ -156,5 +156,7 @@ void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | |||
156 | 156 | ||
157 | /* Do any generic SMTC IRQ affinity setup */ | 157 | /* Do any generic SMTC IRQ affinity setup */ |
158 | smtc_set_irq_affinity(irq, tmask); | 158 | smtc_set_irq_affinity(irq, tmask); |
159 | |||
160 | return 0; | ||
159 | } | 161 | } |
160 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ | 162 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ |
diff --git a/arch/mips/sgi-ip22/ip22-reset.c b/arch/mips/sgi-ip22/ip22-reset.c index 4ad5c3393fd3..45b6694c2079 100644 --- a/arch/mips/sgi-ip22/ip22-reset.c +++ b/arch/mips/sgi-ip22/ip22-reset.c | |||
@@ -148,7 +148,7 @@ static irqreturn_t panel_int(int irq, void *dev_id) | |||
148 | 148 | ||
149 | if (sgint->istat1 & SGINT_ISTAT1_PWR) { | 149 | if (sgint->istat1 & SGINT_ISTAT1_PWR) { |
150 | /* Wait until interrupt goes away */ | 150 | /* Wait until interrupt goes away */ |
151 | disable_irq(SGI_PANEL_IRQ); | 151 | disable_irq_nosync(SGI_PANEL_IRQ); |
152 | init_timer(&debounce_timer); | 152 | init_timer(&debounce_timer); |
153 | debounce_timer.function = debounce; | 153 | debounce_timer.function = debounce; |
154 | debounce_timer.expires = jiffies + 5; | 154 | debounce_timer.expires = jiffies + 5; |
diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c index b6cab089561e..9b95d80ebc6e 100644 --- a/arch/mips/sgi-ip32/ip32-reset.c +++ b/arch/mips/sgi-ip32/ip32-reset.c | |||
@@ -53,7 +53,7 @@ static inline void ip32_machine_halt(void) | |||
53 | 53 | ||
54 | static void ip32_machine_power_off(void) | 54 | static void ip32_machine_power_off(void) |
55 | { | 55 | { |
56 | volatile unsigned char reg_a, xctrl_a, xctrl_b; | 56 | unsigned char reg_a, xctrl_a, xctrl_b; |
57 | 57 | ||
58 | disable_irq(MACEISA_RTC_IRQ); | 58 | disable_irq(MACEISA_RTC_IRQ); |
59 | reg_a = CMOS_READ(RTC_REG_A); | 59 | reg_a = CMOS_READ(RTC_REG_A); |
@@ -91,9 +91,10 @@ static void blink_timeout(unsigned long data) | |||
91 | 91 | ||
92 | static void debounce(unsigned long data) | 92 | static void debounce(unsigned long data) |
93 | { | 93 | { |
94 | volatile unsigned char reg_a, reg_c, xctrl_a; | 94 | unsigned char reg_a, reg_c, xctrl_a; |
95 | 95 | ||
96 | reg_c = CMOS_READ(RTC_INTR_FLAGS); | 96 | reg_c = CMOS_READ(RTC_INTR_FLAGS); |
97 | reg_a = CMOS_READ(RTC_REG_A); | ||
97 | CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A); | 98 | CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A); |
98 | wbflush(); | 99 | wbflush(); |
99 | xctrl_a = CMOS_READ(DS_B1_XCTRL4A); | 100 | xctrl_a = CMOS_READ(DS_B1_XCTRL4A); |
@@ -137,7 +138,7 @@ static inline void ip32_power_button(void) | |||
137 | 138 | ||
138 | static irqreturn_t ip32_rtc_int(int irq, void *dev_id) | 139 | static irqreturn_t ip32_rtc_int(int irq, void *dev_id) |
139 | { | 140 | { |
140 | volatile unsigned char reg_c; | 141 | unsigned char reg_c; |
141 | 142 | ||
142 | reg_c = CMOS_READ(RTC_INTR_FLAGS); | 143 | reg_c = CMOS_READ(RTC_INTR_FLAGS); |
143 | if (!(reg_c & RTC_IRQF)) { | 144 | if (!(reg_c & RTC_IRQF)) { |
@@ -145,7 +146,7 @@ static irqreturn_t ip32_rtc_int(int irq, void *dev_id) | |||
145 | "%s: RTC IRQ without RTC_IRQF\n", __func__); | 146 | "%s: RTC IRQ without RTC_IRQF\n", __func__); |
146 | } | 147 | } |
147 | /* Wait until interrupt goes away */ | 148 | /* Wait until interrupt goes away */ |
148 | disable_irq(MACEISA_RTC_IRQ); | 149 | disable_irq_nosync(MACEISA_RTC_IRQ); |
149 | init_timer(&debounce_timer); | 150 | init_timer(&debounce_timer); |
150 | debounce_timer.function = debounce; | 151 | debounce_timer.function = debounce; |
151 | debounce_timer.expires = jiffies + 50; | 152 | debounce_timer.expires = jiffies + 50; |
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index c147c4b35d3f..690de06bde90 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -50,7 +50,7 @@ static void enable_bcm1480_irq(unsigned int irq); | |||
50 | static void disable_bcm1480_irq(unsigned int irq); | 50 | static void disable_bcm1480_irq(unsigned int irq); |
51 | static void ack_bcm1480_irq(unsigned int irq); | 51 | static void ack_bcm1480_irq(unsigned int irq); |
52 | #ifdef CONFIG_SMP | 52 | #ifdef CONFIG_SMP |
53 | static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask); | 53 | static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask); |
54 | #endif | 54 | #endif |
55 | 55 | ||
56 | #ifdef CONFIG_PCI | 56 | #ifdef CONFIG_PCI |
@@ -109,7 +109,7 @@ void bcm1480_unmask_irq(int cpu, int irq) | |||
109 | } | 109 | } |
110 | 110 | ||
111 | #ifdef CONFIG_SMP | 111 | #ifdef CONFIG_SMP |
112 | static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | 112 | static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) |
113 | { | 113 | { |
114 | int i = 0, old_cpu, cpu, int_on, k; | 114 | int i = 0, old_cpu, cpu, int_on, k; |
115 | u64 cur_ints; | 115 | u64 cur_ints; |
@@ -118,7 +118,7 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
118 | 118 | ||
119 | if (cpumask_weight(mask) != 1) { | 119 | if (cpumask_weight(mask) != 1) { |
120 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); | 120 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); |
121 | return; | 121 | return -1; |
122 | } | 122 | } |
123 | i = cpumask_first(mask); | 123 | i = cpumask_first(mask); |
124 | 124 | ||
@@ -152,6 +152,8 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
152 | } | 152 | } |
153 | } | 153 | } |
154 | spin_unlock_irqrestore(&bcm1480_imr_lock, flags); | 154 | spin_unlock_irqrestore(&bcm1480_imr_lock, flags); |
155 | |||
156 | return 0; | ||
155 | } | 157 | } |
156 | #endif | 158 | #endif |
157 | 159 | ||
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c index 3de30f79db3f..eb5396cf81bb 100644 --- a/arch/mips/sibyte/cfe/setup.c +++ b/arch/mips/sibyte/cfe/setup.c | |||
@@ -288,13 +288,7 @@ void __init prom_init(void) | |||
288 | */ | 288 | */ |
289 | cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE); | 289 | cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE); |
290 | if (cfe_getenv("LINUX_CMDLINE", arcs_cmdline, CL_SIZE) < 0) { | 290 | if (cfe_getenv("LINUX_CMDLINE", arcs_cmdline, CL_SIZE) < 0) { |
291 | if (argc < 0) { | 291 | if (argc >= 0) { |
292 | /* | ||
293 | * It's OK for direct boot to not provide a | ||
294 | * command line | ||
295 | */ | ||
296 | strcpy(arcs_cmdline, "root=/dev/ram0 "); | ||
297 | } else { | ||
298 | /* The loader should have set the command line */ | 292 | /* The loader should have set the command line */ |
299 | /* too early for panic to do any good */ | 293 | /* too early for panic to do any good */ |
300 | printk("LINUX_CMDLINE not defined in cfe."); | 294 | printk("LINUX_CMDLINE not defined in cfe."); |
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 38cb998ade22..409dec798863 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -50,7 +50,7 @@ static void enable_sb1250_irq(unsigned int irq); | |||
50 | static void disable_sb1250_irq(unsigned int irq); | 50 | static void disable_sb1250_irq(unsigned int irq); |
51 | static void ack_sb1250_irq(unsigned int irq); | 51 | static void ack_sb1250_irq(unsigned int irq); |
52 | #ifdef CONFIG_SMP | 52 | #ifdef CONFIG_SMP |
53 | static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask); | 53 | static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask); |
54 | #endif | 54 | #endif |
55 | 55 | ||
56 | #ifdef CONFIG_SIBYTE_HAS_LDT | 56 | #ifdef CONFIG_SIBYTE_HAS_LDT |
@@ -103,7 +103,7 @@ void sb1250_unmask_irq(int cpu, int irq) | |||
103 | } | 103 | } |
104 | 104 | ||
105 | #ifdef CONFIG_SMP | 105 | #ifdef CONFIG_SMP |
106 | static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | 106 | static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) |
107 | { | 107 | { |
108 | int i = 0, old_cpu, cpu, int_on; | 108 | int i = 0, old_cpu, cpu, int_on; |
109 | u64 cur_ints; | 109 | u64 cur_ints; |
@@ -113,7 +113,7 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
113 | 113 | ||
114 | if (cpumask_weight(mask) > 1) { | 114 | if (cpumask_weight(mask) > 1) { |
115 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); | 115 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); |
116 | return; | 116 | return -1; |
117 | } | 117 | } |
118 | 118 | ||
119 | /* Convert logical CPU to physical CPU */ | 119 | /* Convert logical CPU to physical CPU */ |
@@ -143,6 +143,8 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
143 | R_IMR_INTERRUPT_MASK)); | 143 | R_IMR_INTERRUPT_MASK)); |
144 | } | 144 | } |
145 | spin_unlock_irqrestore(&sb1250_imr_lock, flags); | 145 | spin_unlock_irqrestore(&sb1250_imr_lock, flags); |
146 | |||
147 | return 0; | ||
146 | } | 148 | } |
147 | #endif | 149 | #endif |
148 | 150 | ||