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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2008-05-07 10:38:15 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-06-05 13:13:16 -0400
commitcd9da13d6ef4f4b652a9a885d4a7c80e40fed229 (patch)
treeb7083b8eea03ce4f866c973ccd4504d9823e118c /arch/mips
parent2cc3c0b67bdde7263f6eb16c16709e0b84047646 (diff)
Fix divide by zero error in build_clear_page() and build_copy_page()
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/mm/page.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index d827d6144369..cab81f42eee5 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -310,8 +310,8 @@ void __cpuinit build_clear_page(void)
310 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) 310 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
311 uasm_i_lui(&buf, AT, 0xa000); 311 uasm_i_lui(&buf, AT, 0xa000);
312 312
313 off = min(8, pref_bias_clear_store / cache_line_size) * 313 off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size)
314 cache_line_size; 314 * cache_line_size : 0;
315 while (off) { 315 while (off) {
316 build_clear_pref(&buf, -off); 316 build_clear_pref(&buf, -off);
317 off -= cache_line_size; 317 off -= cache_line_size;
@@ -454,12 +454,14 @@ void __cpuinit build_copy_page(void)
454 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) 454 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
455 uasm_i_lui(&buf, AT, 0xa000); 455 uasm_i_lui(&buf, AT, 0xa000);
456 456
457 off = min(8, pref_bias_copy_load / cache_line_size) * cache_line_size; 457 off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
458 cache_line_size : 0;
458 while (off) { 459 while (off) {
459 build_copy_load_pref(&buf, -off); 460 build_copy_load_pref(&buf, -off);
460 off -= cache_line_size; 461 off -= cache_line_size;
461 } 462 }
462 off = min(8, pref_bias_copy_store / cache_line_size) * cache_line_size; 463 off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
464 cache_line_size : 0;
463 while (off) { 465 while (off) {
464 build_copy_store_pref(&buf, -off); 466 build_copy_store_pref(&buf, -off);
465 off -= cache_line_size; 467 off -= cache_line_size;